diff options
author | Ruchi Kandoi <kandoiruchi@google.com> | 2018-05-29 12:56:53 -0700 |
---|---|---|
committer | Ruchi Kandoi <kandoiruchi@google.com> | 2018-05-29 21:34:53 +0000 |
commit | 4c4651e884927a1ad7757e4472d55e05133f4940 (patch) | |
tree | 7bfb9a78b670df4359abdaa1ba6513b5f0c92f64 /nfc | |
parent | 09036e0b7632ed94db5191f41cc6ce9ec31cf3f1 (diff) | |
download | bonito-4c4651e884927a1ad7757e4472d55e05133f4940.tar.gz |
Update config files to meet Felica Requirements
- Disable RF_STATUS_UPDATE
- Adds NXP_CORE_CONF_EXTN
- Reduces SPI timeout to 90 seconds
- P2P for Type F is disabled
- Phone off usecase for Syscode is enabled
Test: run CtsOmapiTestCases
Bug: 69876039
Bug: 79950993
Bug: 79950265
Bug: 80268581
Bug: 79954923
Bug: 79954925
Change-Id: I86d2df477fc797fc3984827663713c3051a126d7
Diffstat (limited to 'nfc')
-rw-r--r-- | nfc/libese-nxp.conf | 2 | ||||
-rw-r--r-- | nfc/libnfc-nci.conf | 2 | ||||
-rw-r--r-- | nfc/libnfc-nxp.blueline.conf | 11 | ||||
-rw-r--r-- | nfc/libnfc-nxp.crosshatch.conf | 11 |
4 files changed, 14 insertions, 12 deletions
diff --git a/nfc/libese-nxp.conf b/nfc/libese-nxp.conf index c2d9ac46..6ce399ae 100644 --- a/nfc/libese-nxp.conf +++ b/nfc/libese-nxp.conf @@ -9,7 +9,7 @@ SE_DEBUG_ENABLED=0 NXP_SWP_RD_TAG_OP_TIMEOUT=0xFF #WTX Count in secs -NXP_WTX_COUNT_VALUE=9000 +NXP_WTX_COUNT_VALUE=90 # PN67T_PWR_SCHEME 0x01 # PN80T_LEGACY_PWR_SCHEME 0x02 diff --git a/nfc/libnfc-nci.conf b/nfc/libnfc-nci.conf index d80a37fd..c2fa6e91 100644 --- a/nfc/libnfc-nci.conf +++ b/nfc/libnfc-nci.conf @@ -54,7 +54,7 @@ POLLING_TECH_MASK=0x6F # NFA_TECHNOLOGY_MASK_F 0x04 /* NFC Technology F */ # NFA_TECHNOLOGY_MASK_A_ACTIVE 0x40 /* NFC Technology A active mode */ # NFA_TECHNOLOGY_MASK_F_ACTIVE 0x80 /* NFC Technology F active mode */ -P2P_LISTEN_TECH_MASK=0x45 +P2P_LISTEN_TECH_MASK=0x41 PRESERVE_STORAGE=0x01 diff --git a/nfc/libnfc-nxp.blueline.conf b/nfc/libnfc-nxp.blueline.conf index 19cd15f7..171c709d 100644 --- a/nfc/libnfc-nxp.blueline.conf +++ b/nfc/libnfc-nxp.blueline.conf @@ -155,7 +155,7 @@ NXP_RF_CONF_BLK_5={ # SWP1A interface A0D4 # DWP intf behavior config, SVDD Load activated by default if set to 0x31 A037 # SPI CL Sync enable A098 -NXP_CORE_CONF_EXTN={20, 02, 46, 0E, +NXP_CORE_CONF_EXTN={20, 02, 4A, 0F, A0, EC, 01, 01, A0, ED, 01, 01, A0, 5E, 01, 01, @@ -166,10 +166,11 @@ NXP_CORE_CONF_EXTN={20, 02, 46, 0E, A0, 37, 01, 35, A0, D8, 01, 02, A0, D5, 01, 0A, - A0, 98, 01, 01, + A0, 98, 01, 03, A0, AA, 04, FD, 03, 2C, 01, A0, 38, 04, 14, 0B, 0B, 00, - A0, 3A, 08, B4, 00, B4, 00, B4, 00, B4, 00 + A0, 3A, 08, B4, 00, B4, 00, B4, 00, B4, 00, + A0, B2, 01, 19 } ############################################################################### @@ -239,7 +240,7 @@ NXP_SWP_SWITCH_TIMEOUT=0x0A # Enable or Disable RF_STATUS_UPDATE to EseHal module # Disable 0x00 # Enable 0x01 -RF_STATUS_UPDATE_ENABLE=0x01 +RF_STATUS_UPDATE_ENABLE=0x00 ############################################################################### # Configure the single default SE to use. The default is to use the first @@ -312,6 +313,6 @@ OFF_HOST_SIM_PIPE_ID=0x70 # bit pos 3 = Screen On lock # bit pos 4 = Screen off unlock # bit pos 5 = Screen Off lock -DEFAULT_SYS_CODE_PWR_STATE=0x39 +DEFAULT_SYS_CODE_PWR_STATE=0x3B ############################################################################### diff --git a/nfc/libnfc-nxp.crosshatch.conf b/nfc/libnfc-nxp.crosshatch.conf index 10ec45a1..ba24631e 100644 --- a/nfc/libnfc-nxp.crosshatch.conf +++ b/nfc/libnfc-nxp.crosshatch.conf @@ -155,7 +155,7 @@ NXP_RF_CONF_BLK_5={ # SWP1A interface A0D4 # DWP intf behavior config, SVDD Load activated by default if set to 0x31 A037 # SPI CL Sync enable A098 -NXP_CORE_CONF_EXTN={20, 02, 46, 0E, +NXP_CORE_CONF_EXTN={20, 02, 4A, 0F, A0, EC, 01, 01, A0, ED, 01, 01, A0, 5E, 01, 01, @@ -166,10 +166,11 @@ NXP_CORE_CONF_EXTN={20, 02, 46, 0E, A0, 37, 01, 35, A0, D8, 01, 02, A0, D5, 01, 0A, - A0, 98, 01, 01, + A0, 98, 01, 03, A0, AA, 04, FD, 03, F4, 01, A0, 38, 04, 14, 0B, 0B, 00, - A0, 3A, 08, C8, 00, C8, 00, C8, 00, C8, 00 + A0, 3A, 08, C8, 00, C8, 00, C8, 00, C8, 00, + A0, B2, 01, 19 } ############################################################################### @@ -239,7 +240,7 @@ NXP_SWP_SWITCH_TIMEOUT=0x0A # Enable or Disable RF_STATUS_UPDATE to EseHal module # Disable 0x00 # Enable 0x01 -RF_STATUS_UPDATE_ENABLE=0x01 +RF_STATUS_UPDATE_ENABLE=0x00 ############################################################################### # Configure the single default SE to use. The default is to use the first @@ -312,6 +313,6 @@ OFF_HOST_SIM_PIPE_ID=0x70 # bit pos 3 = Screen On lock # bit pos 4 = Screen off unlock # bit pos 5 = Screen Off lock -DEFAULT_SYS_CODE_PWR_STATE=0x39 +DEFAULT_SYS_CODE_PWR_STATE=0x3B ############################################################################### |