summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorHiroshi Akiyama <hiroshiakiyama@google.com>2023-11-30 19:44:58 +0000
committerHiroshi Akiyama <hiroshiakiyama@google.com>2023-12-04 21:52:04 +0000
commitc41e6f519bc79da4a1578a88a68f17d604660a3b (patch)
treeddb2e13dcea0c57481f586fd91436f258e77060d
parent3555bbe0a8ef335a95080b8b91cd3e8257785365 (diff)
downloadgs201-c41e6f519bc79da4a1578a88a68f17d604660a3b.tar.gz
bcl: adjust heavy clk divider ratio
Bug: 314168856 Test: tbd Change-Id: If32830eb480a6db99e32b3c1a277a79f058cc43f Signed-off-by: Hiroshi Akiyama <hiroshiakiyama@google.com>
-rw-r--r--conf/init.gs201.rc12
1 files changed, 6 insertions, 6 deletions
diff --git a/conf/init.gs201.rc b/conf/init.gs201.rc
index ae03ce9..4c6da6d 100644
--- a/conf/init.gs201.rc
+++ b/conf/init.gs201.rc
@@ -934,13 +934,13 @@ on post-fs-data
on property:vendor.brownout.mitigation.ready=1
# BCL
- write /sys/devices/virtual/pmic/mitigation/clock_ratio/tpu_light_clk_ratio 0xfff041c1 #DFS
- write /sys/devices/virtual/pmic/mitigation/clock_ratio/cpu1_heavy_clk_ratio 0xfff041c1 #DFS
- write /sys/devices/virtual/pmic/mitigation/clock_ratio/cpu2_heavy_clk_ratio 0xfff041c1 #DFS
- write /sys/devices/virtual/pmic/mitigation/clock_ratio/gpu_light_clk_ratio 0xfff041c1 #DFS
+ write /sys/devices/virtual/pmic/mitigation/clock_ratio/tpu_light_clk_ratio 0x80041c3 #DFS
+ write /sys/devices/virtual/pmic/mitigation/clock_ratio/cpu1_heavy_clk_ratio 0xfff041c0 #DFS
+ write /sys/devices/virtual/pmic/mitigation/clock_ratio/cpu2_heavy_clk_ratio 0xfff041c0 #DFS
+ write /sys/devices/virtual/pmic/mitigation/clock_ratio/gpu_light_clk_ratio 0x80041c3 #DFS
write /sys/devices/virtual/pmic/mitigation/clock_ratio/cpu2_light_clk_ratio 0xfff041c3 #OCP
- write /sys/devices/virtual/pmic/mitigation/clock_ratio/gpu_heavy_clk_ratio 0xfff04385 #OCP
- write /sys/devices/virtual/pmic/mitigation/clock_ratio/tpu_heavy_clk_ratio 0xfff041c3 #OCP
+ write /sys/devices/virtual/pmic/mitigation/clock_ratio/gpu_heavy_clk_ratio 0xfff04381 #OCP
+ write /sys/devices/virtual/pmic/mitigation/clock_ratio/tpu_heavy_clk_ratio 0xfff041c1 #OCP
write /sys/devices/virtual/pmic/mitigation/triggered_lvl/uvlo1_lvl 3200
write /sys/devices/virtual/pmic/mitigation/triggered_lvl/smpl_lvl 3100
write /sys/devices/virtual/pmic/mitigation/triggered_lvl/uvlo2_lvl 3000