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author | Antonio Nino Diaz <antonio.ninodiaz@arm.com> | 2017-10-05 15:19:42 +0100 |
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committer | Antonio Nino Diaz <antonio.ninodiaz@arm.com> | 2017-10-17 12:02:37 +0100 |
commit | ec0c8fdacf410b8d33891d569f0c4df6bcb41823 (patch) | |
tree | 442248a14b29c5266c04d6e5d03fad7b684d0650 | |
parent | 996d6b390d97802a3cfb7d6d48183ad5a90398ba (diff) | |
download | arm-trusted-firmware-ec0c8fdacf410b8d33891d569f0c4df6bcb41823.tar.gz |
Introduce functions to disable the MMU in EL1
The implementation is the same as those used to disable it in EL3.
Change-Id: Ibfe7e69034a691fbf57477c5a76a8cdca28f6b26
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
-rw-r--r-- | include/lib/aarch64/arch_helpers.h | 2 | ||||
-rw-r--r-- | lib/aarch64/misc_helpers.S | 30 |
2 files changed, 29 insertions, 3 deletions
diff --git a/include/lib/aarch64/arch_helpers.h b/include/lib/aarch64/arch_helpers.h index 0d0d7d33..5d20ce9c 100644 --- a/include/lib/aarch64/arch_helpers.h +++ b/include/lib/aarch64/arch_helpers.h @@ -171,7 +171,9 @@ void inv_dcache_range(uintptr_t addr, size_t size); void dcsw_op_louis(u_register_t op_type); void dcsw_op_all(u_register_t op_type); +void disable_mmu_el1(void); void disable_mmu_el3(void); +void disable_mmu_icache_el1(void); void disable_mmu_icache_el3(void); /******************************************************************************* diff --git a/lib/aarch64/misc_helpers.S b/lib/aarch64/misc_helpers.S index 78153bfb..9dfe46a2 100644 --- a/lib/aarch64/misc_helpers.S +++ b/lib/aarch64/misc_helpers.S @@ -18,7 +18,9 @@ .globl zeromem16 .globl memcpy16 + .globl disable_mmu_el1 .globl disable_mmu_el3 + .globl disable_mmu_icache_el1 .globl disable_mmu_icache_el3 #if SUPPORT_VFP @@ -451,11 +453,11 @@ endfunc memcpy16 func disable_mmu_el3 mov x1, #(SCTLR_M_BIT | SCTLR_C_BIT) -do_disable_mmu: +do_disable_mmu_el3: mrs x0, sctlr_el3 bic x0, x0, x1 msr sctlr_el3, x0 - isb // ensure MMU is off + isb /* ensure MMU is off */ dsb sy ret endfunc disable_mmu_el3 @@ -463,10 +465,32 @@ endfunc disable_mmu_el3 func disable_mmu_icache_el3 mov x1, #(SCTLR_M_BIT | SCTLR_C_BIT | SCTLR_I_BIT) - b do_disable_mmu + b do_disable_mmu_el3 endfunc disable_mmu_icache_el3 /* --------------------------------------------------------------------------- + * Disable the MMU at EL1 + * --------------------------------------------------------------------------- + */ + +func disable_mmu_el1 + mov x1, #(SCTLR_M_BIT | SCTLR_C_BIT) +do_disable_mmu_el1: + mrs x0, sctlr_el1 + bic x0, x0, x1 + msr sctlr_el1, x0 + isb /* ensure MMU is off */ + dsb sy + ret +endfunc disable_mmu_el1 + + +func disable_mmu_icache_el1 + mov x1, #(SCTLR_M_BIT | SCTLR_C_BIT | SCTLR_I_BIT) + b do_disable_mmu_el1 +endfunc disable_mmu_icache_el1 + +/* --------------------------------------------------------------------------- * Enable the use of VFP at EL3 * --------------------------------------------------------------------------- */ |