diff options
| author | Soren Brinkmann <soren.brinkmann@xilinx.com> | 2016-06-10 09:57:14 -0700 |
|---|---|---|
| committer | Soren Brinkmann <soren.brinkmann@xilinx.com> | 2016-06-15 09:05:11 -0700 |
| commit | 7de544ac04848cacb30547d3e95db138896d73a9 (patch) | |
| tree | fc24b21aff1a9295be78a36da7821ab1a65cc2cb /docs | |
| parent | 8eadeb4adeabffe25df5cbfaaa69f7f9b1f362ae (diff) | |
| download | arm-trusted-firmware-7de544ac04848cacb30547d3e95db138896d73a9.tar.gz | |
zynqmp: Add option to select between Cadence UARTs
Add build time option 'cadence1' for ZYNQMP_CONSOLE to select the 2nd
UART available in the SoC.
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'docs')
| -rw-r--r-- | docs/plat/xilinx-zynqmp.md | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/docs/plat/xilinx-zynqmp.md b/docs/plat/xilinx-zynqmp.md index 2af841b1..09546b01 100644 --- a/docs/plat/xilinx-zynqmp.md +++ b/docs/plat/xilinx-zynqmp.md @@ -26,6 +26,10 @@ make ERROR_DEPRECATED=1 RESET_TO_BL31=1 CROSS_COMPILE=aarch64-none-elf- PLAT=zyn * `ZYNQMP_BL32_MEM_BASE`: Specifies the base address of the bl32 binary. * `ZYNQMP_BL32_MEM_SIZE`: Specifies the size of the memory region of the bl32 binary. +* `ZYNQMP_CONSOLE`: Select the console driver. Options: + - `cadence`, `cadence0`: Cadence UART 0 + - `cadence1` : Cadence UART 1 + # FSBL->ATF Parameter Passing The FSBL populates a data structure with image information for the ATF. The ATF uses that data to hand off to the loaded images. The address of the handoff data |