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authorDouglas Raillard <douglas.raillard@arm.com>2016-11-07 17:29:34 +0000
committerDouglas Raillard <douglas.raillard@arm.com>2016-11-22 10:05:47 +0000
commit91a422d69f651784f8cbfbd7d2805f1beb448838 (patch)
tree35c2eab669f6893a875e37da486f9a04d7a14c9e /docs
parent686019d206949086f0c193c7b21a0cbbc3fa6dfd (diff)
downloadarm-trusted-firmware-91a422d69f651784f8cbfbd7d2805f1beb448838.tar.gz
Clarify dependency for PSCI_EXTENDED_STATE_ID
Add dependency information in the user guide for ARM_RECOM_STATE_ID_ENC that needs to be set when using PSCI_EXTENDED_STATE_ID on ARM platforms. Also clarify the build error message. Change-Id: Id125a0299b179f5f222bca4e2503204bf89a3c59 Signed-off-by: Douglas Raillard <douglas.raillard@arm.com>
Diffstat (limited to 'docs')
-rw-r--r--docs/user-guide.md3
1 files changed, 2 insertions, 1 deletions
diff --git a/docs/user-guide.md b/docs/user-guide.md
index 1aebab20..a5b30efa 100644
--- a/docs/user-guide.md
+++ b/docs/user-guide.md
@@ -380,7 +380,8 @@ performed.
means by default the original power-state format is used by the PSCI
implementation. This flag should be specified by the platform makefile
and it governs the return value of PSCI_FEATURES API for CPU_SUSPEND
- smc function id.
+ smc function id. When this option is enabled on ARM platforms, the
+ option `ARM_RECOM_STATE_ID_ENC` needs to be set to 1 as well.
* `RESET_TO_BL31`: Enable BL31 entrypoint as the CPU reset vector instead
of the BL1 entrypoint. It can take the value 0 (CPU reset to BL1