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| author | Sandrine Bailleux <sandrine.bailleux@arm.com> | 2016-04-21 11:10:52 +0100 |
|---|---|---|
| committer | Sandrine Bailleux <sandrine.bailleux@arm.com> | 2016-04-21 12:59:59 +0100 |
| commit | adeecf9219fd542379e704ce190701f6a78eb42a (patch) | |
| tree | c4ef482862847c7fbe046c9337729bfcb862d1ec /docs | |
| parent | 072888656dc331c6b4bded88738e7b34166c0933 (diff) | |
| download | arm-trusted-firmware-adeecf9219fd542379e704ce190701f6a78eb42a.tar.gz | |
Add support for Cortex-A57 erratum 833471 workaround
Change-Id: I86ac81ffd7cd094ce68c4cceb01c16563671a063
Diffstat (limited to 'docs')
| -rw-r--r-- | docs/cpu-specific-build-macros.md | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/docs/cpu-specific-build-macros.md b/docs/cpu-specific-build-macros.md index c41cbff6..202cea70 100644 --- a/docs/cpu-specific-build-macros.md +++ b/docs/cpu-specific-build-macros.md @@ -72,6 +72,9 @@ For Cortex-A57, following errata build flags are defined : * `ERRATA_A57_829520`: This applies errata 829520 workaround to Cortex-A57 CPU. This needs to be enabled only for revision <= r1p2 of the CPU. +* `ERRATA_A57_833471`: This applies errata 833471 workaround to Cortex-A57 + CPU. This needs to be enabled only for revision <= r1p2 of the CPU. + 3. CPU Specific optimizations ------------------------------ |