diff options
author | John Stultz <john.stultz@linaro.org> | 2017-10-30 12:19:50 -0700 |
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committer | John Stultz <john.stultz@linaro.org> | 2017-10-30 12:19:50 -0700 |
commit | 21de417bf7501457bbe383f551a5e012c11381ce (patch) | |
tree | eeec888aa7b85c109be64d7393a8a983711bd4bc /plat/socionext/uniphier/uniphier_xlat_setup.c | |
parent | 8fa3096942d2faed55122efd47348dacca991141 (diff) | |
parent | fd3bba4bd523ee622c448e64e946d2d3b1875d02 (diff) | |
download | arm-trusted-firmware-21de417bf7501457bbe383f551a5e012c11381ce.tar.gz |
Merge branch 'armtf/master/update' into bootloader-update
Big transition to upstream ARMTF code.
This merges the aosp/mater code with fd3bba4bd523 but merges
such that the tree should be identical with the fd3bba4bd523
side of the merge.
Change-Id: Ib416a13ce19c6c26fb62c38ccc6fdfbbdf9c4304
Signed-off-by: John Stultz <john.stultz@linaro.org>
Diffstat (limited to 'plat/socionext/uniphier/uniphier_xlat_setup.c')
-rw-r--r-- | plat/socionext/uniphier/uniphier_xlat_setup.c | 59 |
1 files changed, 59 insertions, 0 deletions
diff --git a/plat/socionext/uniphier/uniphier_xlat_setup.c b/plat/socionext/uniphier/uniphier_xlat_setup.c new file mode 100644 index 00000000..6532c493 --- /dev/null +++ b/plat/socionext/uniphier/uniphier_xlat_setup.c @@ -0,0 +1,59 @@ +/* + * Copyright (c) 2017, ARM Limited and Contributors. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#include <debug.h> +#include <platform_def.h> +#include <xlat_tables_v2.h> + +#define UNIPHIER_OCM_REGION_BASE 0x30000000 +#define UNIPHIER_OCM_REGION_SIZE 0x00040000 + +#define UNIPHIER_REG_REGION_BASE 0x50000000 +#define UNIPHIER_REG_REGION_SIZE 0x20000000 + +void uniphier_mmap_setup(uintptr_t total_base, size_t total_size, + const struct mmap_region *mmap) +{ + VERBOSE("Trusted RAM seen by this BL image: %p - %p\n", + (void *)total_base, (void *)(total_base + total_size)); + mmap_add_region(total_base, total_base, + total_size, + MT_MEMORY | MT_RW | MT_SECURE); + + /* remap the code section */ + VERBOSE("Code region: %p - %p\n", + (void *)BL_CODE_BASE, (void *)BL_CODE_END); + mmap_add_region(BL_CODE_BASE, BL_CODE_BASE, + round_up(BL_CODE_END, PAGE_SIZE) - BL_CODE_BASE, + MT_CODE | MT_SECURE); + + /* remap the coherent memory region */ + VERBOSE("Coherent region: %p - %p\n", + (void *)BL_COHERENT_RAM_BASE, (void *)BL_COHERENT_RAM_END); + mmap_add_region(BL_COHERENT_RAM_BASE, BL_COHERENT_RAM_BASE, + BL_COHERENT_RAM_END - BL_COHERENT_RAM_BASE, + MT_DEVICE | MT_RW | MT_SECURE); + + /* + * on-chip SRAM region: should be DEVICE attribute because the USB + * load functions provided by the ROM use this memory region as a work + * area, but do not cater to cache coherency. + */ + mmap_add_region(UNIPHIER_OCM_REGION_BASE, UNIPHIER_OCM_REGION_BASE, + UNIPHIER_OCM_REGION_SIZE, + MT_DEVICE | MT_RW | MT_SECURE); + + /* register region */ + mmap_add_region(UNIPHIER_REG_REGION_BASE, UNIPHIER_REG_REGION_BASE, + UNIPHIER_REG_REGION_SIZE, + MT_DEVICE | MT_RW | MT_SECURE); + + /* additional regions if needed */ + if (mmap) + mmap_add(mmap); + + init_xlat_tables(); +} |