diff options
Diffstat (limited to 'plat/hikey/bl2_plat_setup.c')
| -rw-r--r-- | plat/hikey/bl2_plat_setup.c | 367 |
1 files changed, 0 insertions, 367 deletions
diff --git a/plat/hikey/bl2_plat_setup.c b/plat/hikey/bl2_plat_setup.c deleted file mode 100644 index 0824394f..00000000 --- a/plat/hikey/bl2_plat_setup.c +++ /dev/null @@ -1,367 +0,0 @@ -/* - * Copyright (c) 2014-2015, Linaro Ltd and Contributors. All rights reserved. - * Copyright (c) 2014-2015, Hisilicon Ltd and Contributors. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * - * Neither the name of ARM nor the names of its contributors may be used - * to endorse or promote products derived from this software without specific - * prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - */ - -#include <arch_helpers.h> -#include <assert.h> -#include <bl_common.h> -#include <console.h> -#include <debug.h> -#include <partitions.h> -#include <platform.h> -#include <platform_def.h> -#include <string.h> -#include <mmio.h> -#include <hi6220.h> -#include "hikey_def.h" -#include "hikey_private.h" - -/******************************************************************************* - * Declarations of linker defined symbols which will help us find the layout - * of trusted RAM - ******************************************************************************/ -extern unsigned long __RO_START__; -extern unsigned long __RO_END__; - -extern unsigned long __COHERENT_RAM_START__; -extern unsigned long __COHERENT_RAM_END__; - -/* - * The next 2 constants identify the extents of the code & RO data region. - * These addresses are used by the MMU setup code and therefore they must be - * page-aligned. It is the responsibility of the linker script to ensure that - * __RO_START__ and __RO_END__ linker symbols refer to page-aligned addresses. - */ -#define BL2_RO_BASE (unsigned long)(&__RO_START__) -#define BL2_RO_LIMIT (unsigned long)(&__RO_END__) - -/* - * The next 2 constants identify the extents of the coherent memory region. - * These addresses are used by the MMU setup code and therefore they must be - * page-aligned. It is the responsibility of the linker script to ensure that - * __COHERENT_RAM_START__ and __COHERENT_RAM_END__ linker symbols refer to - * page-aligned addresses. - */ -#define BL2_COHERENT_RAM_BASE (unsigned long)(&__COHERENT_RAM_START__) -#define BL2_COHERENT_RAM_LIMIT (unsigned long)(&__COHERENT_RAM_END__) - -/* Data structure which holds the extents of the trusted RAM for BL2 */ -static meminfo_t bl2_tzram_layout -__attribute__ ((aligned(PLATFORM_CACHE_LINE_SIZE), - section("tzfw_coherent_mem"))); - -/******************************************************************************* - * Structure which holds the arguments which need to be passed to BL3-1 - ******************************************************************************/ -static bl2_to_bl31_params_mem_t bl31_params_mem; - -meminfo_t *bl2_plat_sec_mem_layout(void) -{ - return &bl2_tzram_layout; -} - -/******************************************************************************* - * This function assigns a pointer to the memory that the platform has kept - * aside to pass platform specific and trusted firmware related information - * to BL31. This memory is allocated by allocating memory to - * bl2_to_bl31_params_mem_t structure which is a superset of all the - * structure whose information is passed to BL31 - * NOTE: This function should be called only once and should be done - * before generating params to BL31 - ******************************************************************************/ -bl31_params_t *bl2_plat_get_bl31_params(void) -{ - bl31_params_t *bl2_to_bl31_params; - - /* - * Initialise the memory for all the arguments that needs to - * be passed to BL3-1 - */ - memset(&bl31_params_mem, 0, sizeof(bl2_to_bl31_params_mem_t)); - - /* Assign memory for TF related information */ - bl2_to_bl31_params = &bl31_params_mem.bl31_params; - SET_PARAM_HEAD(bl2_to_bl31_params, PARAM_BL31, VERSION_1, 0); - - /* Fill BL3-1 related information */ - bl2_to_bl31_params->bl31_image_info = &bl31_params_mem.bl31_image_info; - SET_PARAM_HEAD(bl2_to_bl31_params->bl31_image_info, PARAM_IMAGE_BINARY, - VERSION_1, 0); - - /* Fill BL3-2 related information if it exists */ -#if BL32_BASE - bl2_to_bl31_params->bl32_ep_info = &bl31_params_mem.bl32_ep_info; - SET_PARAM_HEAD(bl2_to_bl31_params->bl32_ep_info, PARAM_EP, - VERSION_1, 0); - bl2_to_bl31_params->bl32_image_info = &bl31_params_mem.bl32_image_info; - SET_PARAM_HEAD(bl2_to_bl31_params->bl32_image_info, PARAM_IMAGE_BINARY, - VERSION_1, 0); -#endif - - /* Fill BL3-3 related information */ - bl2_to_bl31_params->bl33_ep_info = &bl31_params_mem.bl33_ep_info; - SET_PARAM_HEAD(bl2_to_bl31_params->bl33_ep_info, - PARAM_EP, VERSION_1, 0); - - /* BL3-3 expects to receive the primary CPU MPID (through x0) */ - bl2_to_bl31_params->bl33_ep_info->args.arg0 = 0xffff & read_mpidr(); - - bl2_to_bl31_params->bl33_image_info = &bl31_params_mem.bl33_image_info; - SET_PARAM_HEAD(bl2_to_bl31_params->bl33_image_info, PARAM_IMAGE_BINARY, - VERSION_1, 0); - - return bl2_to_bl31_params; -} - -/******************************************************************************* - * This function returns a pointer to the shared memory that the platform - * has kept to point to entry point information of BL31 to BL2 - ******************************************************************************/ -struct entry_point_info *bl2_plat_get_bl31_ep_info(void) -{ - return &bl31_params_mem.bl31_ep_info; -} - -void init_boardid(void) -{ - unsigned int reg; - - /* Set chip id to sram */ - reg = read_midr_el1(); - mmio_write_32(MEMORY_AXI_CHIP_ADDR, reg); - INFO("[BDID] [%x] midr: 0x%x\n", MEMORY_AXI_CHIP_ADDR, reg); - - /* Set board type to sram */ - mmio_write_32(MEMORY_AXI_BOARD_TYPE_ADDR, 0x0); - INFO("[BDID] [%x] board type: 0\n", MEMORY_AXI_BOARD_TYPE_ADDR); - - /* Set board id to sram */ - mmio_write_32(MEMORY_AXI_BOARD_ID_ADDR, 0x2b); - INFO("[BDID] [%x] board id: 0x2b\n", MEMORY_AXI_BOARD_ID_ADDR); - - mmio_write_32(ACPU_ARM64_FLAGA, 0x1234); - mmio_write_32(ACPU_ARM64_FLAGB, 0x5678); - return; -} - -/******************************************************************************* - * BL1 has passed the extents of the trusted RAM that should be visible to BL2 - * in x0. This memory layout is sitting at the base of the free trusted RAM. - * Copy it to a safe loaction before its reclaimed by later BL2 functionality. - ******************************************************************************/ -void bl2_early_platform_setup(meminfo_t *mem_layout) -{ - /* Initialize the console to provide early debug support */ - console_init(CONSOLE_BASE, PL011_UART_CLK_IN_HZ, PL011_BAUDRATE); - - /* Setup the BL2 memory layout */ - bl2_tzram_layout = *mem_layout; - - init_boardid(); - init_acpu_dvfs(); - - io_setup(); - get_partition(); -} - -/******************************************************************************* - * Perform platform specific setup, i.e. initialize the IO layer, load BL3-0 - * image and initialise the memory location to use for passing arguments to - * BL3-1. - ******************************************************************************/ -void bl2_platform_setup(void) -{ - plat_security_setup(); -} - -/* Flush the TF params and the TF plat params */ -void bl2_plat_flush_bl31_params(void) -{ - flush_dcache_range((unsigned long)&bl31_params_mem, - sizeof(bl2_to_bl31_params_mem_t)); -} - -/******************************************************************************* - * Perform the very early platform specific architectural setup here. At the - * moment this is only intializes the mmu in a quick and dirty way. - ******************************************************************************/ -void bl2_plat_arch_setup(void) -{ - configure_mmu_el1(bl2_tzram_layout.total_base, - bl2_tzram_layout.total_size, - BL2_RO_BASE, - BL2_RO_LIMIT, - BL2_COHERENT_RAM_BASE, - BL2_COHERENT_RAM_LIMIT); -} - -/******************************************************************************* - * Populate the extents of memory available for loading BL3-0, i.e. anywhere - * in trusted RAM as long as it doesn't overwrite BL2. - ******************************************************************************/ -void bl2_plat_get_bl30_meminfo(meminfo_t *bl30_meminfo) -{ - bl30_meminfo->total_base = BL30_BASE; - bl30_meminfo->total_size = BL30_SIZE; - bl30_meminfo->free_base = BL30_BASE; - bl30_meminfo->free_size = BL30_SIZE; -} - -/******************************************************************************* - * Transfer BL3-0 from Trusted RAM using the SCP Download protocol. - * Return 0 on success, -1 otherwise. - ******************************************************************************/ -int bl2_plat_handle_bl30(image_info_t *bl30_image_info) -{ - int *buf = (int *)bl30_image_info->image_base; - - INFO("%s: [%x] %x %x %x %x\n", - __func__, buf, buf[0], buf[1], buf[2], buf[3]); - - buf += 50; - INFO("%s: [%x] %x %x %x %x\n", - __func__, buf, buf[0], buf[1], buf[2], buf[3]); - - buf += 50; - INFO("%s: [%x] %x %x %x %x\n", - __func__, buf, buf[0], buf[1], buf[2], buf[3]); - - buf = (int *)(bl30_image_info->image_base + - bl30_image_info->image_size); - buf -= 4; - INFO("%s: [%x] %x %x %x %x\n", - __func__, buf, buf[0], buf[1], buf[2], buf[3]); - - /* enable mcu sram */ - hisi_mcu_enable_sram(); - - /* load mcu binary to sram */ - hisi_mcu_load_image(bl30_image_info->image_base, - bl30_image_info->image_size); - - /* let mcu to run */ - hisi_mcu_start_run(); - - INFO("%s: mcu pc is %x\n", - __func__, mmio_read_32(AO_SC_MCU_SUBSYS_STAT2)); - - INFO("%s: AO_SC_PERIPH_CLKSTAT4 is %x\n", - __func__, mmio_read_32(AO_SC_PERIPH_CLKSTAT4)); - return 0; -} - -/******************************************************************************* - * Before calling this function BL31 is loaded in memory and its entrypoint - * is set by load_image. This is a placeholder for the platform to change - * the entrypoint of BL31 and set SPSR and security state. - * On Juno we are only setting the security state, entrypoint - ******************************************************************************/ -void bl2_plat_set_bl31_ep_info(image_info_t *bl31_image_info, - entry_point_info_t *bl31_ep_info) -{ - SET_SECURITY_STATE(bl31_ep_info->h.attr, SECURE); - bl31_ep_info->spsr = SPSR_64(MODE_EL3, MODE_SP_ELX, - DISABLE_ALL_EXCEPTIONS); -} - -/******************************************************************************* - * Before calling this function BL32 is loaded in memory and its entrypoint - * is set by load_image. This is a placeholder for the platform to change - * the entrypoint of BL32 and set SPSR and security state. - * On Juno we are only setting the security state, entrypoint - ******************************************************************************/ -void bl2_plat_set_bl32_ep_info(image_info_t *bl32_image_info, - entry_point_info_t *bl32_ep_info) -{ - SET_SECURITY_STATE(bl32_ep_info->h.attr, SECURE); - /* - * The Secure Payload Dispatcher service is responsible for - * setting the SPSR prior to entry into the BL32 image. - */ - bl32_ep_info->spsr = 0; -} - -/******************************************************************************* - * Before calling this function BL33 is loaded in memory and its entrypoint - * is set by load_image. This is a placeholder for the platform to change - * the entrypoint of BL33 and set SPSR and security state. - * On Juno we are only setting the security state, entrypoint - ******************************************************************************/ -void bl2_plat_set_bl33_ep_info(image_info_t *image, - entry_point_info_t *bl33_ep_info) -{ - unsigned long el_status; - unsigned int mode; - - /* Figure out what mode we enter the non-secure world in */ - el_status = read_id_aa64pfr0_el1() >> ID_AA64PFR0_EL2_SHIFT; - el_status &= ID_AA64PFR0_ELX_MASK; - - if (el_status) - mode = MODE_EL2; - else - mode = MODE_EL1; - - /* - * TODO: Consider the possibility of specifying the SPSR in - * the FIP ToC and allowing the platform to have a say as - * well. - */ - bl33_ep_info->spsr = SPSR_64(mode, MODE_SP_ELX, - DISABLE_ALL_EXCEPTIONS); - SET_SECURITY_STATE(bl33_ep_info->h.attr, NON_SECURE); -} - -/******************************************************************************* - * Populate the extents of memory available for loading BL3-2 - ******************************************************************************/ -void bl2_plat_get_bl32_meminfo(meminfo_t *bl32_meminfo) -{ - /* - * Populate the extents of memory available for loading BL3-2. - */ - bl32_meminfo->total_base = BL32_BASE; - bl32_meminfo->free_base = BL32_BASE; - bl32_meminfo->total_size = - (TSP_SEC_MEM_BASE + TSP_SEC_MEM_SIZE) - BL32_BASE; - bl32_meminfo->free_size = - (TSP_SEC_MEM_BASE + TSP_SEC_MEM_SIZE) - BL32_BASE; -} - -/******************************************************************************* - * Populate the extents of memory available for loading BL3-3 - ******************************************************************************/ -void bl2_plat_get_bl33_meminfo(meminfo_t *bl33_meminfo) -{ - bl33_meminfo->total_base = DRAM_NS_BASE; - bl33_meminfo->total_size = DRAM_NS_SIZE; - bl33_meminfo->free_base = DRAM_NS_BASE; - bl33_meminfo->free_size = DRAM_NS_SIZE; -} |