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path: root/plat/rockchip/rk3399/drivers/m0/include/rk3399_mcu.h
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2017-05-03Use SPDX license identifiersdp-arm
To make software license auditing simpler, use SPDX[0] license identifiers instead of duplicating the license text in every file. NOTE: Files that have been imported by FreeBSD have not been modified. [0]: https://spdx.org/ Change-Id: I80a00e1f641b8cc075ca5a95b10607ed9ed8761a Signed-off-by: dp-arm <dimitris.papastamos@arm.com>
2017-02-24rockchip: Add MIN() and MAX() macros back to M0 codeJulius Werner
These macros were accidentally deleted in a previous cleanup. This slipped through because the code using them is currently unused, but that may change in the future. Signed-off-by: Julius Werner <jwerner@chromium.org>
2017-02-24rockchip: Clean up header and referenced filesXing Zheng
So far, there are more and more features are supported on the RK3399, meanwhile, these features are increasingly being defined and intertwined. It's time to clean up and make them clearer. Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
2017-02-24rockchip: rk3399: add stopwatch functions to m0Lin Huang
There is system timer in m0, we can use it to implement a set of stopwatch functions for measuring timeouts. Signed-off-by: Lin Huang <hl@rock-chips.com> Signed-off-by: Derek Basehore <dbasehore@chromium.org>
2017-02-24rk3399: dram: use PMU M0 to do ddr frequency scalingXing Zheng
We used dcf do ddr frequency scaling, but we just include a dcf binary, it hard to maintain later, we have M0 compile flow in ATF, and M0 can also work for ddr frequency scaling, so let's use it. Signed-off-by: Lin Huang <hl@rock-chips.com> Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
2017-02-24rockchip: update the raw read/write APIs for M0Xing Zheng
Since the ATF project, we usually use the mmio_read_32 and mmio_write_32. And the mmio_write_32, the firse parameter is ADDR, the second is VALUE. In order to style consistency: 1/ rename readl/writel to mmio_read_32/mmio_write_32 2/ for keeping the same with mmio_write_32 in the ATF project, swap the order of the parameters for M0 mmio_write_32 Signed-off-by: Xing Zheng <zhengxing@rock-chips.com> Signed-off-by: Lin Huang <hl@rock-chips.com>
2016-10-25rockchip: add M0 source code and build system for RK3399Caesar Wang
This CL supports add M0 source code to built into the bl31.bin, the goal is that we can load the M0 code binary into SRAM and execute it. We need the M0 help us to clean the power_mode_en bit during the AP PMU enter the state machine with interrupt, and avoid to the AP can not exit the loop forever. Change-Id: I844582c54a1f0d44ca41290d44618df58679f341 Signed-off-by: Xing Zheng <zhengxing@rock-chips.com> Signed-off-by: Patrick Georgi <pgeorgi@google.com> Signed-off-by: Caesar Wang <wxt@rock-chips.com>