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authoroliviermartin <oliviermartin@6f19259b-4bc3-4df7-8a09-765794883524>2011-07-01 11:09:00 +0000
committeroliviermartin <oliviermartin@6f19259b-4bc3-4df7-8a09-765794883524>2011-07-01 11:09:00 +0000
commitcd872e401a057c7accfe1342c5b9d4c8f7f127c6 (patch)
tree916e9a1f6a34db356e84aa8dca2484f21dd99a01 /ArmPlatformPkg/PrePi/ModuleEntryPoint.S
parentf6eab262f09b451bf7dabbb9b7168b3b360d9632 (diff)
downloadedk2-cd872e401a057c7accfe1342c5b9d4c8f7f127c6.tar.gz
ArmPlatformPkg/PrePi: Add support for PrePi module
This module should handle the Pre PI phase before the DXE core is executed when there is no PEI Core support. It declares the required information needed by the DXE core through HOBs. git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11949 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'ArmPlatformPkg/PrePi/ModuleEntryPoint.S')
-rwxr-xr-xArmPlatformPkg/PrePi/ModuleEntryPoint.S84
1 files changed, 84 insertions, 0 deletions
diff --git a/ArmPlatformPkg/PrePi/ModuleEntryPoint.S b/ArmPlatformPkg/PrePi/ModuleEntryPoint.S
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+//
+// Copyright (c) 2011, ARM Limited. All rights reserved.
+//
+// This program and the accompanying materials
+// are licensed and made available under the terms and conditions of the BSD License
+// which accompanies this distribution. The full text of the license may be found at
+// http://opensource.org/licenses/bsd-license.php
+//
+// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+//
+//
+
+#include <AsmMacroIoLib.h>
+#include <Base.h>
+#include <Library/PcdLib.h>
+#include <AutoGen.h>
+
+#start of the code section
+.text
+.align 3
+
+#global symbols referenced by this module
+GCC_ASM_IMPORT(CEntryPoint)
+
+StartupAddr: .word CEntryPoint
+
+#make _ModuleEntryPoint as global
+GCC_ASM_EXPORT(_ModuleEntryPoint)
+
+
+ASM_PFX(_ModuleEntryPoint):
+ // Identify CPU ID
+ mrc p15, 0, r0, c0, c0, 5
+ and r0, #0xf
+
+_UefiMemoryBase:
+#if FixedPcdGet32(PcdStandalone)
+ // Compute Top of System Memory
+ LoadConstantToReg (FixedPcdGet32(PcdSystemMemoryBase), r1)
+ LoadConstantToReg (FixedPcdGet32(PcdSystemMemorySize), r2)
+ add r1, r1, r2 // r1 = SystemMemoryTop = PcdSystemMemoryBase + PcdSystemMemorySize
+#else
+ // If it is not a Standalone, we must compute the top of the UEFI memory with the base of the FD
+ LoadConstantToReg (FixedPcdGet32(PcdNormalFdBaseAddress), r1)
+#endif
+
+ // Compute Base of UEFI Memory
+ LoadConstantToReg (FixedPcdGet32(PcdSystemMemoryUefiRegionSize), r2)
+ sub r1, r1, r2 // r1 = SystemMemoryTop - PcdSystemMemoryUefiRegionSize = UefiMemoryBase
+
+_SetupStack:
+ // Compute Base of Normal stacks for CPU Cores
+ LoadConstantToReg (FixedPcdGet32(PcdCPUCoresNonSecStackSize), r2)
+ mul r3, r0, r2 // r3 = core_id * stack_size = offset from the stack base
+ sub sp, r1, r3 // r3 = UefiMemoryBase - StackOffset = TopOfStack
+
+ // Only allocate memory in top of the primary core stack
+ cmp r0, #0
+ bne _PrepareArguments
+
+_AllocateGlobalPeiVariables:
+ // Reserve top of the stack for Global PEI Variables (eg: PeiServicesTablePointer)
+ LoadConstantToReg (FixedPcdGet32(PcdPeiGlobalVariableSize), r4)
+ // The reserved place must be 8-bytes aligned for pushing 64-bit variable on the stack
+ and r5, r4, #7
+ rsb r5, r5, #8
+ add r4, r4, r5
+ sub sp, sp, r4
+
+_PrepareArguments:
+ // Pass the StackBase to the C Entrypoint (UefiMemoryBase - StackSize - StackOffset)
+ sub r2, r1, r2
+ sub r2, r3
+ // Move sec startup address into a data register
+ // Ensure we're jumping to FV version of the code (not boot remapped alias)
+ ldr r3, StartupAddr
+
+ // jump to PrePiCore C code
+ // r0 = core_id
+ // r1 = UefiMemoryBase
+ // r2 = StackBase
+ blx r3
+