path: root/hwcomposer/display.h

/*
 * Copyright (C) Texas Instruments - http://www.ti.com/
 *
 * Licensed under the Apache License, Version 2.0 (the "License");
 * you may not use this file except in compliance with the License.
 * You may obtain a copy of the License at
 *
 *      http://www.apache.org/licenses/LICENSE-2.0
 *
 * Unless required by applicable law or agreed to in writing, software
 * distributed under the License is distributed on an "AS IS" BASIS,
 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 * See the License for the specific language governing permissions and
 * limitations under the License.
 */

#ifndef __DISPLAY__
#define __DISPLAY__

#include <stdint.h>
#include <stdbool.h>

#include <hardware/hwcomposer.h>

#include "layer.h"

#include "drm_fourcc.h"
#include "xf86drm.h"
#include "xf86drmMode.h"

#define MAX_DISPLAYS 4
#define MAX_DISPLAY_CONFIGS 32

#define MAX_COMPOSITION_BUFFERS 32
#define MAX_COMPOSITION_LAYERS MAX_COMPOSITION_BUFFERS
#define HWC_DISPLAY_SECONDARY HWC_DISPLAY_EXTERNAL+1

/* Kludge
 * The MAX_DSS_OVERLAYS should be 4, as supported by DSS HW.
 * It has been reduced to 2 for the case when the primary display
 * (LCD) is the only display available.  In this case, we only
 * desire to support a single overlay plane.  So if the 2 overlays
 * are consumed and more layers are required for compositing to generate
 * the final frame, then HWC will defer composition to SF.
 * Allowing more that 2 overlays (when only LCD)  will result 
 * in incorrect blending of DSS OVERLAYs and the surfaceflinger layer 
 * when both layer/planes overlap.
 */
#define MAX_DSS_OVERLAYS 2
#define NUM_NONSCALING_OVERLAYS 1


#ifndef ARRAY_SIZE
#define ARRAY_SIZE(arr) (sizeof(arr)/sizeof((arr)[0]))
#endif

/* The three below parameters should be in sync, no scaling supported */
#define PREFERRED_HDMI_RESOLUTION "1280x720"
#define HDMI_FB_WIDTH 1280
#define HDMI_FB_HEIGHT 720

#define HWC_DRM_ZORDER_PROPERTY 7

typedef struct omap_hwc_device omap_hwc_device_t;

typedef struct dss_platform_info {
    uint8_t max_xdecim_2d;
    uint8_t max_ydecim_2d;
    uint8_t max_xdecim_1d;

    uint8_t max_ydecim_1d;
    uint32_t fclk;
    uint8_t min_width;
    uint16_t max_width;

    uint16_t max_height;
    uint8_t max_downscale;
    uint16_t integer_scale_ratio_limit;
    uint32_t tiler1d_slot_size;
}dss_platform_info_t;


struct display_transform {
    uint8_t rotation;       /* 90-degree clockwise rotations */
    bool hflip;             /* flip l-r (after rotation) */
    bool scaling;
    hwc_rect_t region;
    float matrix[2][3];
};
typedef struct display_transform display_transform_t;

struct display_config {
    int xres;
    int yres;
    int fps;
    int xdpi;
    int ydpi;
};
typedef struct display_config display_config_t;

enum disp_type {
    DISP_TYPE_UNKNOWN,
    DISP_TYPE_LCD,
    DISP_TYPE_HDMI,
    DISP_TYPE_SEC_LCD,
};

enum disp_op_mode {
    DISP_MODE_INVALID,
    DISP_MODE_LEGACY,
    DISP_MODE_PRESENTATION,
};

enum disp_role {
    DISP_ROLE_PRIMARY,
    DISP_ROLE_EXTERNAL,
    DISP_ROLE_SECONDARY,
};

struct drm_fb_info {
    uint32_t width;
    uint32_t height;
    uint32_t format;
    uint32_t bo[4];
    uint32_t pitches[4];
    uint32_t offsets[4];
    uint32_t fb_id;
    void *priv;
};
typedef struct drm_fb_info drm_fb_info_t;

struct drm_plane_props {
    hwc_layer_1_t *layer;

    uint32_t crtc_id;
    uint32_t crtc_x;
    uint32_t crtc_y;
    uint32_t crtc_w;
    uint32_t crtc_h;
    uint32_t src_x;
    uint32_t src_y;
    uint32_t src_w;
    uint32_t src_h;
    uint32_t rotation;
    uint32_t zorder;
    uint32_t pre_mult_alpha;

    drm_fb_info_t fb_info;
};
typedef struct drm_plane_props drm_plane_props_t;

struct composition {
    buffer_handle_t *buffers;
    uint32_t num_buffers;        /* # of buffers used in composition */

    bool use_sgx;
    bool use_blitter;            /* blitter usage flag */
    bool use_dss;
    bool swap_rb;

    uint32_t tiler1d_slot_size;
    uint32_t ovl_ix_base;        /* index of first overlay used in composition */
    uint32_t wanted_ovls;        /* # of overlays required for current composition */
    uint32_t avail_ovls;         /* # of overlays available for current composition */
    uint32_t scaling_ovls;       /* # of overlays available with scaling caps */
    uint32_t used_ovls;          /* # of overlays used in composition */

    drm_plane_props_t plane_info[4];

    drmModePlane planes[4];	/* TODO: Rename to dss_pipeline_planes to */
				/* from the above drm plane info distinguish */
};
typedef struct composition composition_t;

struct fb_buffers {
    drm_fb_info_t current;
    drm_fb_info_t next;
    bool updated;
};
typedef struct fb_buffers fb_buffers_t;

typedef struct kms_display {
    drmModeConnectorPtr con;
    drmModeEncoderPtr enc;
    drmModeCrtcPtr crtc;
    int is_crtc_set;
    int crtc_id;
    drmModeModeInfoPtr mode;
    drmEventContext evctx;
    drmModeFB   fb;
    int plane_id;
    drmModeAtomicReqPtr atomic_req;

    fb_buffers_t fb_bufs;
    uint32_t last_plane_fb;
    uint32_t last_plane_bo;
    int vsync_on;
    struct omap_hwc_device *ctx;
} kms_display_t;


/* TWO_FLIP_EVENTS - relative offset at which the fence will be signaled
 * in timeline. Buffer gets on to display on first increment and will
 * be replaced on second increment in timeline.
 */
#define TWO_FLIP_EVENTS   2
#define ONE_FLIP_EVENT    1


/* Sync timeline: A seperate timeline is maintained for each display and
 * the timeline is incremented on every flip.
 */
typedef struct timeline_info {
    int timeline;
    pthread_mutex_t lock;
    unsigned signaled_fences;
} timeline_info_t;

struct display {
    uint32_t num_configs;
    display_config_t *configs;
    uint32_t active_config_ix;

    uint32_t type;    /* enum disp_type */
    uint32_t role;    /* enum disp_role */
    uint32_t opmode;    /* enum disp_mode */

    uint32_t mgr_ix;

    bool blanked;

    hwc_display_contents_1_t *contents;
    layer_statistics_t layer_stats;
    composition_t composition;

    display_transform_t transform;
    bool update_transform;

    kms_display_t disp_link;
    dss_platform_info_t limits;
    timeline_info_t retire_sync;

    pthread_mutex_t lock;
    pthread_cond_t cond_flip;
    bool is_flip_pending;
};
typedef struct display display_t;

struct primary_display {
    bool use_sw_vsync;

    uint32_t orientation;
    float xpy;                      /* pixel ratio for UI */
    hwc_rect_t mirroring_region;    /* region to mirror */
};
typedef struct primary_display primary_display_t;

struct primary_lcd_display {
    display_t lcd;
    primary_display_t primary;
};
typedef struct primary_lcd_display primary_lcd_display_t;

struct hdmi_display {
    display_t base;

    uint16_t width;         /* external screen dimensions */
    uint16_t height;
    uint32_t video_mode_ix;    /* TWO's complement of video mode index */
};
typedef struct hdmi_display hdmi_display_t;

struct external_hdmi_display {
    hdmi_display_t hdmi;

    /* attributes */
    bool avoid_mode_change;        /* use HDMI mode used for mirroring if possible */
};
typedef struct external_hdmi_display external_hdmi_display_t;

int init_primary_display(omap_hwc_device_t *hwc_dev);
void reset_primary_display(omap_hwc_device_t *hwc_dev);
primary_display_t *get_primary_display_info(omap_hwc_device_t *hwc_dev);
int update_display(omap_hwc_device_t *ctx, int disp, hwc_display_contents_1_t *display);

void set_display_contents(omap_hwc_device_t *hwc_dev, size_t num_displays, hwc_display_contents_1_t **displays);

int get_display_configs(omap_hwc_device_t *hwc_dev, int disp, uint32_t *configs, size_t *numConfigs);
int get_display_attributes(omap_hwc_device_t *hwc_dev, int disp, uint32_t config, const uint32_t *attributes, int32_t *values);

bool is_valid_display(omap_hwc_device_t *hwc_dev, int disp);
bool is_supported_display(omap_hwc_device_t *hwc_dev, int disp);
bool is_active_display(omap_hwc_device_t *hwc_dev, int disp);
bool is_lcd_display(omap_hwc_device_t *hwc_dev, int disp);

int blank_display(omap_hwc_device_t *hwc_dev, int disp);
int unblank_display(omap_hwc_device_t *hwc_dev, int disp);
int disable_display(omap_hwc_device_t *hwc_dev, int disp);

int setup_display_tranfsorm(omap_hwc_device_t *hwc_dev, int disp);
int apply_display_transform(omap_hwc_device_t *hwc_dev, int disp);

int validate_display_composition(omap_hwc_device_t *hwc_dev, int disp);

void free_displays(omap_hwc_device_t *hwc_dev);

bool can_dss_render_all_layers(omap_hwc_device_t *hwc_dev, int disp);
bool can_dss_render_layer(omap_hwc_device_t *hwc_dev, int disp, hwc_layer_1_t *layer);
void adjust_drm_plane_to_layer(hwc_layer_1_t const *layer, int zorder,
        drm_plane_props_t *plane);
bool can_dss_scale(omap_hwc_device_t *hwc_dev, uint32_t src_w, uint32_t src_h,
                   uint32_t dst_w, uint32_t dst_h, bool is_2d,
                   dss_platform_info_t *limits, uint32_t pclk);

int add_external_hdmi_display(omap_hwc_device_t *hwc_dev);
void remove_external_hdmi_display(omap_hwc_device_t *hwc_dev);
int get_external_display_id(omap_hwc_device_t *hwc_dev);
bool is_hdmi_display(omap_hwc_device_t *hwc_dev, int disp);
bool is_external_display_mirroring(omap_hwc_device_t *hwc_dev, int disp);

int timeline_create_fence(timeline_info_t *timeline, const char *name, unsigned relative);
void timeline_inc(timeline_info_t *timeline);

#endif