path: root/hwcomposer/hwc.c

/*
 * Copyright (C) Texas Instruments - http://www.ti.com/
 *
 * Licensed under the Apache License, Version 2.0 (the "License");
 * you may not use this file except in compliance with the License.
 * You may obtain a copy of the License at
 *
 *      http://www.apache.org/licenses/LICENSE-2.0
 *
 * Unless required by applicable law or agreed to in writing, software
 * distributed under the License is distributed on an "AS IS" BASIS,
 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 * See the License for the specific language governing permissions and
 * limitations under the License.
 */

#include <errno.h>
#include <malloc.h>
#include <stdlib.h>
#include <stdarg.h>
#include <stdbool.h>
#include <fcntl.h>
#include <poll.h>
#include <sys/ioctl.h>
#include <sys/resource.h>
#include <cutils/trace.h>

#include <cutils/properties.h>
#include <cutils/log.h>
#include <cutils/native_handle.h>
#define HWC_REMOVE_DEPRECATED_VERSIONS 1
#include <hardware/hardware.h>
#include <hardware/hwcomposer.h>
#include <hardware_legacy/uevent.h>
#include <system/graphics.h>
#include <utils/Timers.h>
#include <EGL/egl.h>
#include <linux/omapfb.h>
#include <dirent.h>

#include "hwc_dev.h"
#include "color_fmt.h"
#include "display.h"
#include "sw_vsync.h"
#include "utils.h"

#define HWC_PRIORITY_LOW_DISPLAY (19)

static bool debug = false;


static char hdmi_sysfs_path[PATH_MAX] = {0};
static char hdmi_uevent_path[PATH_MAX] = {0};

enum omap_plane {
 OMAP_DSS_GFX,
 OMAP_DSS_VIDEO1,
 OMAP_DSS_VIDEO2,
 OMAP_DSS_VIDEO3,
};

static void showfps(void)
{
    static int framecount = 0;
    static int lastframecount = 0;
    static nsecs_t lastfpstime = 0;
    static float fps = 0;
    char value[PROPERTY_VALUE_MAX];

    property_get("debug.hwc.showfps", value, "0");
    if (!atoi(value)) {
        return;
    }

    framecount++;
    if (!(framecount & 0x7)) {
        nsecs_t now = systemTime(SYSTEM_TIME_MONOTONIC);
        nsecs_t diff = now - lastfpstime;
        fps = ((framecount - lastframecount) * (float)(s2ns(1))) / diff;
        lastfpstime = now;
        lastframecount = framecount;
        ALOGI("%d Frames, %f FPS", framecount, fps);
    }
}

static void reserve_overlays_for_displays(omap_hwc_device_t *hwc_dev)
{
    display_t *primary_display = hwc_dev->displays[HWC_DISPLAY_PRIMARY];
    display_t *hdmi_display = hwc_dev->displays[HWC_DISPLAY_EXTERNAL];

    composition_t *primary_comp = &primary_display->composition;
    uint32_t max_pipes;
    uint32_t avail_gfx_pipes = DSS_NONSCALING_PIPES;

    /* TODO: omapdrm currently assigns GFX and VID1 pipes to primary and HDMI
     * displays statically. Ideally we should be able to pick the pipe to
     * the display as per the composition needs.
     */
    if (primary_display->transform.scaling) {
        ALOGE("Fatal error: scaling is not supported for primary display");
        exit(-1);
    }

    max_pipes = hwc_dev->num_ovls;
    /* Two are currently assigned as primary planes */
    max_pipes -= 2;
    avail_gfx_pipes = 0;

    primary_comp->wanted_ovls = max_pipes;
    primary_comp->avail_ovls = max_pipes;
    primary_comp->scaling_ovls = max_pipes - avail_gfx_pipes;

    /* Not enough overlays, no DSS composition on secondary display. */
    if (hdmi_display) {
        composition_t *hdmi_comp = &hdmi_display->composition;

        hdmi_comp->wanted_ovls = max_pipes;
        hdmi_comp->avail_ovls = 0;
        primary_comp->scaling_ovls = 0;
    }
}

static void hwc_check_blitter_composition(omap_hwc_device_t *hwc_dev, int disp)
{
    display_t *display = hwc_dev->displays[disp];
    blit_device_t *bdev = hwc_dev->blitter;
    composition_t *comp = &display->composition;
    hwc_display_contents_1_t *list = display->contents;
    uint32_t ret = 0;
    uint32_t i = 0;

    if (!property_get_bool("persist.hwc.2d.comp", 1))
        return;

    if (bdev && disp == 0) {
        if (bdev->prepare)
            ret = bdev->prepare(bdev, display);

        /* For now we use blitter only if all the layers can be composed by
         * the blitter.
         */
        if (ret == list->numHwLayers - 1) {
            comp->use_blitter = true;
            comp->use_sgx = false;

            for (i = 0; i < list->numHwLayers - 1; i++) {
                hwc_layer_1_t *layer = &list->hwLayers[i];
                layer->compositionType = HWC_OVERLAY;
                /* we add hint to mark this as blitter layer */
                layer->hints |= HWC_HINT_BLITTER;
            }
        }
    }
    return;
}

static void hwc_check_dss_composition(omap_hwc_device_t *hwc_dev, int disp)
{
    composition_t *comp = &hwc_dev->displays[disp]->composition;
    hwc_display_contents_1_t *list = hwc_dev->displays[disp]->contents;
    hwc_layer_1_t *layer = NULL;
    uint32_t i, j;

#ifdef HWC_USE_DRM_PAGEFLIP_MODE
    /* DSS composition is supported only for atomic mode API usage */
    return;
#endif

    if (disp || list->numHwLayers == 1 || comp->use_blitter)
        return;

    if (!comp->avail_ovls)
        return;

    if (!property_get_bool("persist.hwc.dss.comp", 1))
        return;

    if (can_dss_render_all_layers(hwc_dev, disp)) {
        comp->use_dss = true;
        comp->use_sgx = false;
        comp->used_ovls = 0;

        for (i = 0; i < list->numHwLayers - 1; i++) {
            hwc_layer_1_t *layer = &list->hwLayers[i];
            layer->compositionType = HWC_OVERLAY;
            adjust_drm_plane_to_layer(layer, i, &comp->plane_info[i]);
            comp->used_ovls++;
            if (i) comp->avail_ovls--;
        }
        return;
    }

    /* Can't support all layers, check if we can support DSS composition on
     * last two layers
     */
    ALOGV("2 DSS + FB_TARGET composition");
    j = list->numHwLayers - 2;
    for (i = 0; i < comp->avail_ovls; i++) {
        layer = &list->hwLayers[j];

        if (!can_dss_render_layer(hwc_dev, disp, layer))
            break;
        j--;
    }
    if (i == comp->avail_ovls) {
        uint32_t zorder = 1;

        comp->use_dss = true;
        comp->use_sgx = true;

        for (; j < list->numHwLayers - 2; j++) {
            ALOGV("Layer %d for DSS composition with zorder %d", j + 1, zorder);
            layer = &list->hwLayers[j + 1];
            layer->compositionType = HWC_OVERLAY;
            adjust_drm_plane_to_layer(layer, zorder, &comp->plane_info[zorder]);
            zorder++;
        }
        comp->used_ovls += comp->avail_ovls;
        comp->avail_ovls = 0;
        return;
    }

    comp->use_dss = false;
    return;
}

static int hwc_prepare_for_display(omap_hwc_device_t *hwc_dev, int disp)
{
    if (!is_valid_display(hwc_dev, disp))
        return -ENODEV;

    if (!is_supported_display(hwc_dev, disp) || !is_active_display(hwc_dev, disp))
        return 0;

    display_t *display = hwc_dev->displays[disp];
    hwc_display_contents_1_t *list = display->contents;
    composition_t *comp = &display->composition;
    uint32_t i = 0;

    for (i = 0; i < DSS_AVAILABLE_PIPES; i++) {
        reset_drm_plane(&comp->plane_info[i]);
        comp->ovl_indices[i] = i;
    }

    /* Default composition policy */
    comp->use_sgx = true;
    comp->use_blitter = false;
    comp->use_dss = false;
    comp->used_ovls = 1;

    hwc_check_blitter_composition(hwc_dev, disp);
    hwc_check_dss_composition(hwc_dev, disp);

    if (comp->use_blitter || comp->use_sgx) {
        /* Blitter or SGX composition, need the FB_TARGET layer */
        adjust_drm_plane_to_layer(&list->hwLayers[list->numHwLayers - 1], 0,
                &comp->plane_info[0]);
    } else if (!comp->use_blitter && !comp->use_sgx && comp->use_dss) {
        /* DSS only composition */
        if (is_nv12_layer(&list->hwLayers[0])) {
            /* GFX pipe cannot handle NV12, swap out if layer[0] is NV12,
             * assuming second is non-NV12. FIXME
             */
            if (comp->used_ovls > 1) {
                adjust_drm_plane_to_layer(&list->hwLayers[0], 0, &comp->plane_info[1]);
                adjust_drm_plane_to_layer(&list->hwLayers[1], 1, &comp->plane_info[0]);
            } else {
                adjust_drm_plane_to_layer(&list->hwLayers[0], 1, &comp->plane_info[1]);
                reset_drm_plane(&comp->plane_info[0]);
            }
            comp->ovl_indices[0] = 1;
            comp->ovl_indices[1] = 0;
        }
    }

    return 0;
}

static int hwc_prepare(struct hwc_composer_device_1 *dev, size_t numDisplays,
        hwc_display_contents_1_t** displays)
{
    atrace_begin(ATRACE_TAG_HAL, "dra7xx_hwc_prepare");
    if (!numDisplays || displays == NULL) {
        return 0;
    }

    omap_hwc_device_t *hwc_dev = (omap_hwc_device_t *)dev;
    int err = 0;
    int disp_err;
    uint32_t i;

    pthread_mutex_lock(&hwc_dev->ctx_mutex);

    set_display_contents(hwc_dev, numDisplays, displays);

    for (i = 0; i < numDisplays; i++) {
        if (is_active_display(hwc_dev, i)) {
            display_t *display = hwc_dev->displays[i];
            hwc_display_contents_1_t *contents;

            if (display->update_transform) {
                disp_err = setup_display_tranfsorm(hwc_dev, i);
                if (!err && disp_err)
                    err = disp_err;
            }

            contents = display->contents;

            gather_layer_statistics(hwc_dev, i, contents);
        }
    }

    reserve_overlays_for_displays(hwc_dev);

    for (i = 0; i < numDisplays; i++) {
        if (displays[i]) {
            disp_err = hwc_prepare_for_display(hwc_dev, i);
            if (!err && disp_err)
                err = disp_err;
        }
    }

    /*
     * The display transform application has to be separated from prepare() loop so that in case
     * of mirroring we clone original overlay configuration. Otherwise cloned overlays will have
     * both primary and external display transform applied, which is not intended.
     */
    for (i = 0; i < numDisplays; i++) {
        if (is_active_display(hwc_dev, i)) {
            disp_err = apply_display_transform(hwc_dev, i);
            if (!err && disp_err)
                err = disp_err;

            disp_err = validate_display_composition(hwc_dev, i);
            if (!err && disp_err)
                err = disp_err;
        }
    }

    pthread_mutex_unlock(&hwc_dev->ctx_mutex);

    atrace_end(ATRACE_TAG_HAL);
    return err;
}

static int hwc_set_for_display(omap_hwc_device_t *hwc_dev, int disp, hwc_display_contents_1_t *list,
        bool *invalidate)
{
    if (!is_valid_display(hwc_dev, disp))
        return list ? -ENODEV : 0;

    if (!is_supported_display(hwc_dev, disp))
        return 0;

    if (!list)
        return 0;

    display_t *display = hwc_dev->displays[disp];
    layer_statistics_t *layer_stats = &display->layer_stats;
    composition_t *comp = &display->composition;
    blit_device_t *blitter = hwc_dev->blitter;
    hwc_layer_1_t *layer = NULL;
    uint32_t i = 0;
    int err = 0;

    if (disp != HWC_DISPLAY_PRIMARY) {
        if (comp->wanted_ovls && (comp->avail_ovls < comp->wanted_ovls) &&
                (layer_stats->protected || !comp->avail_ovls))
            *invalidate = true;
    }

    /* reset release and retire fence fd's, as per spec we are supposed to set
     * them to appropriate values here.
     */
    for (i = 0; i < list->numHwLayers; i++) {
        hwc_layer_1_t *layer = &list->hwLayers[i];
        layer->releaseFenceFd = -1;
    }
    list->retireFenceFd = -1;

    layer = comp->plane_info[comp->ovl_indices[0]].layer;
    if (!layer || !layer->handle) {
        ALOGE("Got empty handle, nothing we can do here");
        goto clear_acquire_fences;
    }

    if (disp == HWC_DISPLAY_PRIMARY)
    {
        if (comp->use_blitter) {
            err = blitter->set(blitter, display);
            if (err) {
                ALOGE("%s(%d): blitter set retured error %d",
                        __FUNCTION__, __LINE__, err);
            }
        }
    }

 /* Blanking primary display is necessary if the bootloader can't be trusted
    * However, this causes issues with early camera use-case. The latest
    * bootloader seems to have the same configuration what hwc expects
    * so this config could be safely disabled
    */
#ifdef BLANK_PRIMARY_DISPLAY
    static bool first_set = true;
    if (first_set) {
        reset_primary_display(hwc_dev);
        first_set = false;
    }
#endif

    err = update_display(hwc_dev, disp, list);
    if (err)
        ALOGE("Failed to update display %d\n", disp);

    if (disp == HWC_DISPLAY_PRIMARY)
        showfps();

clear_acquire_fences:
    /* hwc is exiting, clear any pending acquire fences */
    for (i = 0; i < list->numHwLayers; i++) {
        hwc_layer_1_t *layer = &list->hwLayers[i];
        if (layer->acquireFenceFd >= 0) {
            close(layer->acquireFenceFd);
        }
        layer->acquireFenceFd = -1;
    }

    return err;
}


static int hwc_set(struct hwc_composer_device_1 *dev,
        size_t numDisplays, hwc_display_contents_1_t** displays)
{
    atrace_begin(ATRACE_TAG_HAL, "dra7xx_hwc_set");
    if (!numDisplays || displays == NULL) {
        ALOGD("set: empty display list");
        return 0;
    }

    omap_hwc_device_t *hwc_dev = (omap_hwc_device_t*)dev;

    pthread_mutex_lock(&hwc_dev->ctx_mutex);

    bool invalidate = false;
    uint32_t i;
    int err = 0;

    for (i = 0; i < numDisplays; i++) {
        int disp_err = hwc_set_for_display(hwc_dev, i, displays[i], &invalidate);
        if (!err && disp_err)
            err = disp_err;
    }

    if (hwc_dev->force_sgx > 0)
        hwc_dev->force_sgx--;


    if (invalidate && hwc_dev->cb_procs && hwc_dev->cb_procs->invalidate)
        hwc_dev->cb_procs->invalidate(hwc_dev->cb_procs);

    pthread_mutex_unlock(&hwc_dev->ctx_mutex);

    atrace_end(ATRACE_TAG_HAL);
    return err;
}


static int hwc_device_close(hw_device_t* device)
{
    omap_hwc_device_t *hwc_dev = (omap_hwc_device_t *) device;;

    if (hwc_dev) {
        /* pthread will get killed when parent process exits */
        pthread_mutex_destroy(&hwc_dev->ctx_mutex);
        if (hwc_dev->blitter)
            blitter_close((hw_device_t *)hwc_dev->blitter);
        free_displays(hwc_dev);
        free(hwc_dev);
    }

    return 0;
}


static void handle_hotplug(omap_hwc_device_t *hwc_dev)
{
    /* WA: till Hotplug is integrated */
    char value[PROPERTY_VALUE_MAX];
    property_get("persist.hwc.hdmi.force.init", value, "0");
    if (atoi(value)) {
        hwc_dev->ext_disp_state = 1;
    }

    bool state = hwc_dev->ext_disp_state;

    pthread_mutex_lock(&hwc_dev->ctx_mutex);

    if (state) {
        int ext_disp = get_external_display_id(hwc_dev);
        int err = add_external_hdmi_display(hwc_dev);
        if (err) {
            remove_external_hdmi_display(hwc_dev);
            pthread_mutex_unlock(&hwc_dev->ctx_mutex);
            return;
        }
    } else
        remove_external_hdmi_display(hwc_dev);

    display_t *ext_display = hwc_dev->displays[HWC_DISPLAY_EXTERNAL];
    ALOGI("external display changed (state=%d, config={tform=%ddeg%s}, tv=%d)", state,
            ext_display ? ext_display->transform.rotation * 90 : -1,
            ext_display ? ext_display->transform.hflip ? "+hflip" : "" : "",
            is_hdmi_display(hwc_dev, HWC_DISPLAY_EXTERNAL));

    pthread_mutex_unlock(&hwc_dev->ctx_mutex);

    /* hwc_dev->cb_procs is set right after the device is opened, but there is
     * still a race condition where a hotplug event might occur after the open
     * but before the procs are registered. */
    if (hwc_dev->cb_procs) {
        if (hwc_dev->cb_procs->hotplug) {
            hwc_dev->cb_procs->hotplug(hwc_dev->cb_procs, HWC_DISPLAY_EXTERNAL, state);
        } else {
            if (hwc_dev->cb_procs->invalidate)
                hwc_dev->cb_procs->invalidate(hwc_dev->cb_procs);
        }
    }
}

static int find_hdmi_connector_status(const char *hdmi_sysfs_path) {
    FILE *ext_hdmi_fp = NULL;
    char status_string[256];
    int state = 0;

    ext_hdmi_fp = fopen(hdmi_sysfs_path, "rt");

    if (ext_hdmi_fp == NULL) {
         ALOGE("unable to open %s\n", hdmi_sysfs_path);
    } else {
        fscanf(ext_hdmi_fp, "%s",status_string);

        if(strcmp(status_string,"connected") == 0)
            state = 1;
        else
            state = 0;

      ALOGD("EXTCON HDMI STATE: %d\n", state);
      fclose(ext_hdmi_fp);
    }

    return state;
}

static void handle_uevents(omap_hwc_device_t *hwc_dev,
                           const char *buff,
                           const char *hdmi_sysfs_path)
{
    int hdmi = 0;
    int state = 0;
    const char *s = buff;

    if(strlen(hdmi_uevent_path)>0)
        hdmi = !strcmp(s, hdmi_uevent_path);

    if (!hdmi)
       return;

    state = find_hdmi_connector_status(hdmi_sysfs_path);

    hwc_dev->ext_disp_state = state;

    handle_hotplug(hwc_dev);
}

static int find_hdmi_connector_path()
{
    char path[PATH_MAX];
    char *base_path = "/sys/devices/platform/omapdrm.0/drm/card0";

    int hdmi_found = 0;
    struct dirent *dir;
    DIR *d;

    d = opendir(base_path);

    if (!d)
        return 0;

    ALOGD("Opened directory %s\n", base_path);

    while ( ((dir = readdir(d)) != NULL) && (!hdmi_found)) {
        int32_t val;
        FILE *fp;
        char *name = dir->d_name;

        if((name[0] != '.') && (strstr(name,"card0-HDMI") != NULL)) {
            sprintf(hdmi_sysfs_path, "%s/%s/status", base_path, name);
            sprintf(hdmi_uevent_path, "change@%s", &base_path[4]);
            hdmi_found = 1;
        }
    }
    closedir(d);

    return hdmi_found;
}

static void *hwc_hdmi_thread(void *data)
{
    omap_hwc_device_t *hwc_dev = data;
    static char uevent_desc[4096];
    int invalidate = 0;
    int timeout, err = 0;
    int state = 0;
    int hdmi_found = 0;
    char c[5];

    setpriority(PRIO_PROCESS, 0, HWC_PRIORITY_LOW_DISPLAY);

    uevent_init();

    struct pollfd pfds[1] = {{
        .fd = uevent_get_fd(),
        .events = POLLIN,
    }};


    memset(uevent_desc, 0, sizeof(uevent_desc));

    hdmi_found = find_hdmi_connector_path();

    if(!hdmi_found) {
        ALOGE("Did not find HDMI connector\n");
        ALOGE("Returning from HDMI polling thread\n");
        return NULL;
    }

    /* In case HWC missed the EXTCON HDMI HPD event. */
    /* Check the currect HDMI connector state. */
    state = find_hdmi_connector_status(hdmi_sysfs_path);

    if (state) {
        hwc_dev->ext_disp_state = 1;
        handle_hotplug(hwc_dev);
    }

    do {
        err = poll(pfds, ARRAY_SIZE (pfds), -1);
        if (err < 0) {
            ALOGE("received hdmi_thread poll() error event %d", err);
            break;
        } 

       	if (pfds[0].revents & POLLIN) {
            /* keep last 2 zeroes to ensure double 0 termination */
            int len = uevent_next_event(uevent_desc, sizeof(uevent_desc) - 2);
            handle_uevents(hwc_dev, uevent_desc,
                           hdmi_sysfs_path);
        }
    } while (1);

    return NULL;
}

/*
 * DRM event polling thread
 *   We poll for drm events in this thread. drm events can be vblank and/or
 *   page-flip events both occuring on Vsync.
 *
 *   vsync_thread is a misnomer here, but we will keep it for legacy reasons.
 */
static void *hwc_vsync_thread(void *data)
{
    omap_hwc_device_t *hwc_dev = data;

    setpriority(PRIO_PROCESS, 0, HAL_PRIORITY_URGENT_DISPLAY);

    struct pollfd pfds[1] = {{
	.fd = hwc_dev->drm_fd,
	.events = POLLIN
    }};

    while (1) {
        int ret = poll (pfds, ARRAY_SIZE (pfds), 60000);
        if (ret < 0) {
            ALOGE ("Event handler error %d", errno);
            break;
        } else if (ret == 0) {
            ALOGI ("Event handler timeout");
            continue;
        }
        if (pfds[0].revents & POLLIN) {
            drmHandleEvent (hwc_dev->drm_fd,
                    &(hwc_dev->displays[HWC_DISPLAY_PRIMARY]->disp_link.evctx));
        }
    }
    return NULL;
}

static void hwc_registerProcs(struct hwc_composer_device_1* dev,
                                    hwc_procs_t const* procs)
{
    omap_hwc_device_t *hwc_dev = (omap_hwc_device_t *) dev;

    hwc_dev->cb_procs = (typeof(hwc_dev->cb_procs)) procs;
}

static int hwc_query(struct hwc_composer_device_1* dev, int what, int* value)
{
    omap_hwc_device_t *hwc_dev = (omap_hwc_device_t *) dev;

    switch (what) {
    case HWC_BACKGROUND_LAYER_SUPPORTED:
        // we don't support the background layer yet
        value[0] = 0;
        break;
    case HWC_VSYNC_PERIOD:
        // vsync period in nanosecond
        value[0] = 1000000000.0 / hwc_dev->displays[0]->disp_link.mode->vrefresh;
        break;
    default:
        // unsupported query
        return -EINVAL;
    }
    return 0;
}

static int hwc_eventControl(struct hwc_composer_device_1* dev,
        int dpy, int event, int enabled)
{
    UNUSED_ARG(dpy);

    omap_hwc_device_t *hwc_dev = (omap_hwc_device_t *) dev;


    switch (event) {
    case HWC_EVENT_VSYNC:
    {
        int val = !!enabled;
        int err;

        primary_display_t *primary = get_primary_display_info(hwc_dev);
        if (!primary)
            return -ENODEV;

        if (primary->use_sw_vsync) {
            if (enabled)
                start_sw_vsync(hwc_dev);
            else
                stop_sw_vsync();
            return 0;
        } else if (enabled && !hwc_dev->vsync_thread_running) {
            /* FIXME: is this a good place to create thread? */
            err = pthread_create(&hwc_dev->vsync_thread,
                    NULL, hwc_vsync_thread, hwc_dev);
            if (!err) {
                hwc_dev->vsync_thread_running = true;
            } else {
                /* FIXME: not expecting the thread creation to fail.
                 * should we use sw vsync as fallback?
                 */
                ALOGE("argh, failed to create vsync thread");
            }
        }

        return 0;
    }
    default:
        return -EINVAL;
    }
}

static int hwc_blank(struct hwc_composer_device_1 *dev, int disp, int blank)
{
    omap_hwc_device_t *hwc_dev = (omap_hwc_device_t *) dev;

    pthread_mutex_lock(&hwc_dev->ctx_mutex);

    if (!is_valid_display(hwc_dev, disp)) {
        pthread_mutex_unlock(&hwc_dev->ctx_mutex);
        return -ENODEV;
    }

    /*
     * We're using an older method of screen blanking based on early_suspend in the kernel.
     * No need to do anything here except updating the display state.
     */
    display_t *display = hwc_dev->displays[disp];
    int err = 0;

    display->blanked = blank;


    pthread_mutex_unlock(&hwc_dev->ctx_mutex);

    return err;
}

static int hwc_getDisplayConfigs(struct hwc_composer_device_1* dev, int disp, uint32_t* configs, size_t* numConfigs)
{
    return get_display_configs((omap_hwc_device_t *)dev, disp, configs, numConfigs);
}

static int hwc_getDisplayAttributes(struct hwc_composer_device_1* dev, int disp,
                                    uint32_t config, const uint32_t* attributes, int32_t* values)
{
    return get_display_attributes((omap_hwc_device_t *)dev, disp, config, attributes, values);
}


static void hwc_dump(struct hwc_composer_device_1 *dev, char *buff, int buff_len)
{
    UNUSED_ARG(dev);
    UNUSED_ARG(buff);
    UNUSED_ARG(buff_len);
}

static int hwc_device_open(const hw_module_t* module, const char* name, hw_device_t** device)
{
    omap_hwc_module_t *hwc_mod = (omap_hwc_module_t *)module;
    omap_hwc_device_t *hwc_dev;
    hw_module_t const *bmod;
    int err = 0, i;

    if (strcmp(name, HWC_HARDWARE_COMPOSER)) {
        return -EINVAL;
    }

    hwc_dev = (omap_hwc_device_t *)malloc(sizeof(*hwc_dev));
    if (hwc_dev == NULL)
        return -ENOMEM;

    memset(hwc_dev, 0, sizeof(*hwc_dev));

    hwc_dev->device.common.tag = HARDWARE_DEVICE_TAG;
    hwc_dev->device.common.version = HWC_DEVICE_API_VERSION_1_1;

    hwc_dev->device.common.module = (hw_module_t *)module;
    hwc_dev->device.common.close = hwc_device_close;
    hwc_dev->device.prepare = hwc_prepare;
    hwc_dev->device.set = hwc_set;
    hwc_dev->device.eventControl = hwc_eventControl;
    hwc_dev->device.blank = hwc_blank;
    hwc_dev->device.dump = hwc_dump;
    hwc_dev->device.registerProcs = hwc_registerProcs;
    hwc_dev->device.getDisplayConfigs = hwc_getDisplayConfigs;
    hwc_dev->device.getDisplayAttributes = hwc_getDisplayAttributes;
    hwc_dev->device.query = hwc_query;
    hwc_dev->vsync_thread_running = false;

    *device = &hwc_dev->device.common;

    err = init_primary_display(hwc_dev);
    if (err)
        goto done;

    if (pthread_mutex_init(&hwc_dev->ctx_mutex, NULL)) {
        ALOGE("failed to create mutex (%d): %m", errno);
        err = -errno;
        goto done;
    }

    if (pthread_create(&hwc_dev->hdmi_thread, NULL, hwc_hdmi_thread, hwc_dev))
    {
        ALOGE("failed to create HDMI listening thread (%d): %m", errno);
        err = -errno;
        goto done;
    }

    char value[PROPERTY_VALUE_MAX];
    property_get("persist.hwc.upscaled_nv12_limit", value, "2.");
    sscanf(value, "%f", &hwc_dev->upscaled_nv12_limit);
    if (hwc_dev->upscaled_nv12_limit < 0. || hwc_dev->upscaled_nv12_limit > 2048.) {
        ALOGW("Invalid upscaled_nv12_limit (%s), setting to 2.", value);
        hwc_dev->upscaled_nv12_limit = 2.;
    }

#ifdef HWC_USE_DRM_PAGEFLIP_MODE
    ALOGI("Using older drm pageflip API to update display");
#endif

    /*
     * open blitter device
     */
    ALOGI("loading blitter module");
    if (hw_get_module(BLITTER_HARDWARE_MODULE_ID, &bmod) != 0) {
        ALOGE("%s module not found", BLITTER_HARDWARE_MODULE_ID);
        /* we dont fail for now */
    } else {
        ALOGI("blitter module loaded");
        int ret = 0;
        ret = blitter_open(bmod, &hwc_dev->blitter);
        if (ret) {
            ALOGE("%s device failed to initialize (%s)",
                    BLITTER_HARDWARE_0, strerror(-ret));
            /* its ok to fail here, just means no 2d hwc acceleration */
        }
    }

done:
    if (err && hwc_dev)
       hwc_device_close((hw_device_t*)hwc_dev);

    return err;
}

static struct hw_module_methods_t module_methods = {
    .open = hwc_device_open,
};

omap_hwc_module_t HAL_MODULE_INFO_SYM = {
    .base = {
        .common = {
            .tag =                  HARDWARE_MODULE_TAG,
            .module_api_version =   HWC_MODULE_API_VERSION_0_1,
            .hal_api_version =      HARDWARE_HAL_API_VERSION,
            .id =                   HWC_HARDWARE_MODULE_ID,
            .name =                 "Jacinto6 Hardware Composer HAL",
            .author =               "Texas Instruments",
            .methods =              &module_methods,
        },
    },
};