diff options
author | Angela Stegmaier <angelabaker@ti.com> | 2016-05-16 16:06:46 -0500 |
---|---|---|
committer | Angela Stegmaier <angelabaker@ti.com> | 2016-05-18 17:21:44 -0500 |
commit | 97410cfdcdc30fcf75da3007ab29862174b16cd0 (patch) | |
tree | 61bfb1ad301413bd610cd7bac010080db64541ec | |
parent | d0e4ce10afc9d7340bae53ac7c8cfc34e0134d63 (diff) | |
download | ipc-97410cfdcdc30fcf75da3007ab29862174b16cd0.tar.gz |
QNX: IPC: Handle Internal Memory Loading outside of Resource Table
This patch essentially reverts the following commits:
1. "Add fw_rsc_intmem definition to support new TYPE_INTMEM entries in QNX"
(commit 4a5f6fd0864854a99d430c6e6e7c65fb962f00e4)
2. " Add INTMEM resource type support in QNX"
(commit eb3d6bcfd35b823746c6032a9f811fc414824704)
Support for TYPE_INTMEM is being removed. Instead the internal memory
regions will be available by default from the QNX resource manager, without
the remote core image needing to speicify a special resource table
entry. The changes are being made to align with coming BIOS-side changes
to remove the TYPE_INTMEM.
Signed-off-by: Angela Stegmaier <angelabaker@ti.com>
5 files changed, 246 insertions, 90 deletions
diff --git a/qnx/src/ipc3x_dev/ti/syslink/family/common/vayu/vayudsp/VAYUDspProc.c b/qnx/src/ipc3x_dev/ti/syslink/family/common/vayu/vayudsp/VAYUDspProc.c index 3b15edc..65bd52a 100644 --- a/qnx/src/ipc3x_dev/ti/syslink/family/common/vayu/vayudsp/VAYUDspProc.c +++ b/qnx/src/ipc3x_dev/ti/syslink/family/common/vayu/vayudsp/VAYUDspProc.c @@ -11,7 +11,7 @@ * * ============================================================================ * - * Copyright (c) 2013-2015, Texas Instruments Incorporated + * Copyright (c) 2013-2016, Texas Instruments Incorporated * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -87,6 +87,10 @@ extern "C" { * ============================================================================= */ +/*! + * @brief Number of static entries in address translation table. + */ +#define AddrTable_STATIC_COUNT 3 /*! * @brief Max entries in address translation table. @@ -123,17 +127,106 @@ typedef struct VAYUDSPPROC_ModuleObject_tag { /*!< MultiProc id of DSP1 (to avoid multiple lookups) */ } VAYUDSPPROC_ModuleObject; -/* Memory region counters */ +/* Default memory regions */ static UInt32 AddrTable_count[NUM_DSPS] = { - 0, - 0 + AddrTable_STATIC_COUNT, + AddrTable_STATIC_COUNT }; /* * Address translation table + * static memory regions + * CAUTION: AddrTable_STATIC_COUNT must match number of entries below. */ -static ProcMgr_AddrInfo AddrTable_DSP1[AddrTable_SIZE]; -static ProcMgr_AddrInfo AddrTable_DSP2[AddrTable_SIZE]; +static ProcMgr_AddrInfo AddrTable_DSP1[AddrTable_SIZE] = + { + /* L2 RAM */ + { + .addr[ProcMgr_AddrType_MasterKnlVirt] = -1u, + .addr[ProcMgr_AddrType_MasterUsrVirt] = -1u, + .addr[ProcMgr_AddrType_MasterPhys] = 0x40800000u, + .addr[ProcMgr_AddrType_SlaveVirt] = 0x800000u, + .addr[ProcMgr_AddrType_SlavePhys] = -1u, + .size = 0x40000u, + .isCached = FALSE, + .mapMask = ProcMgr_SLAVEVIRT, + .isMapped = TRUE, + .refCount = 0u /* refCount set to 0 for static entry */ + }, + + /* L1P RAM */ + { + .addr[ProcMgr_AddrType_MasterKnlVirt] = -1u, + .addr[ProcMgr_AddrType_MasterUsrVirt] = -1u, + .addr[ProcMgr_AddrType_MasterPhys] = 0x40E00000u, + .addr[ProcMgr_AddrType_SlaveVirt] = 0xE00000u, + .addr[ProcMgr_AddrType_SlavePhys] = -1u, + .size = 0x8000u, + .isCached = FALSE, + .mapMask = ProcMgr_SLAVEVIRT, + .isMapped = TRUE, + .refCount = 0u /* refCount set to 0 for static entry */ + }, + + /* L1D RAM */ + { + .addr[ProcMgr_AddrType_MasterKnlVirt] = -1u, + .addr[ProcMgr_AddrType_MasterUsrVirt] = -1u, + .addr[ProcMgr_AddrType_MasterPhys] = 0x40F00000u, + .addr[ProcMgr_AddrType_SlaveVirt] = 0xF00000u, + .addr[ProcMgr_AddrType_SlavePhys] = -1u, + .size = 0x8000u, + .isCached = FALSE, + .mapMask = ProcMgr_SLAVEVIRT, + .isMapped = TRUE, + .refCount = 0u /* refCount set to 0 for static entry */ + }, + }; + +static ProcMgr_AddrInfo AddrTable_DSP2[AddrTable_SIZE] = + { + /* L2 RAM */ + { + .addr[ProcMgr_AddrType_MasterKnlVirt] = -1u, + .addr[ProcMgr_AddrType_MasterUsrVirt] = -1u, + .addr[ProcMgr_AddrType_MasterPhys] = 0x41000000u, + .addr[ProcMgr_AddrType_SlaveVirt] = 0x800000u, + .addr[ProcMgr_AddrType_SlavePhys] = -1u, + .size = 0x40000u, + .isCached = FALSE, + .mapMask = ProcMgr_SLAVEVIRT, + .isMapped = TRUE, + .refCount = 0u /* refCount set to 0 for static entry */ + }, + + /* L1P RAM */ + { + .addr[ProcMgr_AddrType_MasterKnlVirt] = -1u, + .addr[ProcMgr_AddrType_MasterUsrVirt] = -1u, + .addr[ProcMgr_AddrType_MasterPhys] = 0x41600000u, + .addr[ProcMgr_AddrType_SlaveVirt] = 0xE00000u, + .addr[ProcMgr_AddrType_SlavePhys] = -1u, + .size = 0x8000u, + .isCached = FALSE, + .mapMask = ProcMgr_SLAVEVIRT, + .isMapped = TRUE, + .refCount = 0u /* refCount set to 0 for static entry */ + }, + + /* L1D RAM */ + { + .addr[ProcMgr_AddrType_MasterKnlVirt] = -1u, + .addr[ProcMgr_AddrType_MasterUsrVirt] = -1u, + .addr[ProcMgr_AddrType_MasterPhys] = 0x41700000u, + .addr[ProcMgr_AddrType_SlaveVirt] = 0xF00000u, + .addr[ProcMgr_AddrType_SlavePhys] = -1u, + .size = 0x8000u, + .isCached = FALSE, + .mapMask = ProcMgr_SLAVEVIRT, + .isMapped = TRUE, + .refCount = 0u /* refCount set to 0 for static entry */ + }, + }; static ProcMgr_AddrInfo * AddrTable[NUM_DSPS] = { @@ -159,7 +252,7 @@ VAYUDSPPROC_ModuleObject VAYUDSPPROC_state = .isSetup = FALSE, .configSize = sizeof(VAYUDSPPROC_Config), .gateHandle = NULL, - .defInstParams.numMemEntries = 0 + .defInstParams.numMemEntries = AddrTable_STATIC_COUNT }; @@ -1112,7 +1205,7 @@ VAYUDSPPROC_detach (Processor_Handle handle) } /* delete all dynamically added entries */ - for (i = 0; i < + for (i = AddrTable_STATIC_COUNT; i < AddrTable_count[PROCID_TO_DSP(procHandle->procId)]; i++) { ai = &AddrTable[PROCID_TO_DSP(procHandle->procId)][i]; ai->addr[ProcMgr_AddrType_MasterKnlVirt] = -1u; @@ -1126,8 +1219,8 @@ VAYUDSPPROC_detach (Processor_Handle handle) ai->isMapped = FALSE; ai->refCount = 0u; } - object->params.numMemEntries = 0; - AddrTable_count[PROCID_TO_DSP(procHandle->procId)] = 0; + object->params.numMemEntries = AddrTable_STATIC_COUNT; + AddrTable_count[PROCID_TO_DSP(procHandle->procId)] = AddrTable_STATIC_COUNT; //No need to reset.. that will be done in STOP /*tmpStatus = VAYUDSP_halResetCtrl(object->halObject, @@ -1763,19 +1856,38 @@ VAYUDSPPROC_map( * is required. Add the entry only if the range does not exist * in the translation table. */ + /* check in static entries first */ for (j = 0; - j < AddrTable_count[PROCID_TO_DSP(procHandle->procId)]; j++) { + j < AddrTable_STATIC_COUNT; j++) { ai = &AddrTable[PROCID_TO_DSP(procHandle->procId)][j]; + startAddr = ai->addr[ProcMgr_AddrType_SlaveVirt]; + endAddr = startAddr + ai->size; - if (ai->isMapped == TRUE) { - startAddr = ai->addr[ProcMgr_AddrType_SlaveVirt]; - endAddr = startAddr + ai->size; + if ((startAddr <= *dstAddr) && (*dstAddr < endAddr)) { + found = TRUE; - if ((startAddr <= *dstAddr) && (*dstAddr < endAddr) - && ((*dstAddr + sglist[i].size) <= endAddr)) { - found = TRUE; - ai->refCount++; - break; + /* refCount does not need to be incremented for static entries */ + + break; + } + } + + /* if not found in static entries, check in dynamic entries */ + if (!found) { + for (j = AddrTable_STATIC_COUNT; + j < AddrTable_count[PROCID_TO_DSP(procHandle->procId)]; j++) { + ai = &AddrTable[PROCID_TO_DSP(procHandle->procId)][j]; + + if (ai->isMapped == TRUE) { + startAddr = ai->addr[ProcMgr_AddrType_SlaveVirt]; + endAddr = startAddr + ai->size; + + if ((startAddr <= *dstAddr) && (*dstAddr < endAddr) + && ((*dstAddr + sglist[i].size) <= endAddr)) { + found = TRUE; + ai->refCount++; + break; + } } } } diff --git a/qnx/src/ipc3x_dev/ti/syslink/family/common/vayu/vayuipu/vayucore0/VAYUIpuCore0Proc.c b/qnx/src/ipc3x_dev/ti/syslink/family/common/vayu/vayuipu/vayucore0/VAYUIpuCore0Proc.c index 7e596a6..a1e24e0 100644 --- a/qnx/src/ipc3x_dev/ti/syslink/family/common/vayu/vayuipu/vayucore0/VAYUIpuCore0Proc.c +++ b/qnx/src/ipc3x_dev/ti/syslink/family/common/vayu/vayuipu/vayucore0/VAYUIpuCore0Proc.c @@ -11,7 +11,7 @@ * * ============================================================================ * - * Copyright (c) 2013-2015, Texas Instruments Incorporated + * Copyright (c) 2013-2016, Texas Instruments Incorporated * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -88,6 +88,11 @@ extern "C" { */ /*! + * @brief Number of static entries in address translation table. + */ +#define AddrTable_STATIC_COUNT 1 + +/*! * @brief Max entries in address translation table. */ #define AddrTable_SIZE 32 @@ -124,15 +129,47 @@ typedef struct VAYUIPUCORE0PROC_ModuleObject_tag { /* Memory region counters */ static UInt32 AddrTable_count[NUM_IPUS] = { - 0, - 0 + AddrTable_STATIC_COUNT, + AddrTable_STATIC_COUNT, }; /* * Address translation tables + * CAUTION: AddrTable_STATIC_COUNT must match number of entries below. */ -static ProcMgr_AddrInfo AddrTable_IPU1[AddrTable_SIZE]; -static ProcMgr_AddrInfo AddrTable_IPU2[AddrTable_SIZE]; +static ProcMgr_AddrInfo AddrTable_IPU1[AddrTable_SIZE] = +{ + /* L2 RAM */ + { + .addr[ProcMgr_AddrType_MasterKnlVirt] = -1u, + .addr[ProcMgr_AddrType_MasterUsrVirt] = -1u, + .addr[ProcMgr_AddrType_MasterPhys] = 0x58820000u, + .addr[ProcMgr_AddrType_SlaveVirt] = 0x20000000u, + .addr[ProcMgr_AddrType_SlavePhys] = -1u, + .size = 0x10000u, + .isCached = FALSE, + .mapMask = ProcMgr_SLAVEVIRT, + .isMapped = TRUE, + .refCount = 0u /* refCount set to 0 for static entry */ + }, +}; + +static ProcMgr_AddrInfo AddrTable_IPU2[AddrTable_SIZE] = +{ + /* L2 RAM */ + { + .addr[ProcMgr_AddrType_MasterKnlVirt] = -1u, + .addr[ProcMgr_AddrType_MasterUsrVirt] = -1u, + .addr[ProcMgr_AddrType_MasterPhys] = 0x55020000u, + .addr[ProcMgr_AddrType_SlaveVirt] = 0x20000000u, + .addr[ProcMgr_AddrType_SlavePhys] = -1u, + .size = 0x10000u, + .isCached = FALSE, + .mapMask = ProcMgr_SLAVEVIRT, + .isMapped = TRUE, + .refCount = 0u /* refCount set to 0 for static entry */ + }, +}; static ProcMgr_AddrInfo * AddrTable[NUM_IPUS] = { @@ -158,7 +195,7 @@ VAYUIPUCORE0PROC_ModuleObject VAYUIPUCORE0PROC_state = .isSetup = FALSE, .configSize = sizeof(VAYUIPUCORE0PROC_Config), .gateHandle = NULL, - .defInstParams.numMemEntries = 0, + .defInstParams.numMemEntries = AddrTable_STATIC_COUNT, }; @@ -1118,7 +1155,7 @@ VAYUIPUCORE0PROC_detach (Processor_Handle handle) /*! @retval status */ GT_setFailureReason (curTrace, GT_4CLASS, - "VAYUIPUCORE0PROC_detach", + "VAYUIPUCORE0_halResetCtrl", status, "Reset MMU failed"); } @@ -1151,7 +1188,7 @@ VAYUIPUCORE0PROC_detach (Processor_Handle handle) } /* delete all dynamically added entries */ - for (i = 0; i < + for (i = AddrTable_STATIC_COUNT; i < AddrTable_count[PROCID_TO_IPU(procHandle->procId)]; i++) { ai = &AddrTable[PROCID_TO_IPU(procHandle->procId)][i]; ai->addr[ProcMgr_AddrType_MasterKnlVirt] = -1u; @@ -1165,8 +1202,9 @@ VAYUIPUCORE0PROC_detach (Processor_Handle handle) ai->isMapped = FALSE; ai->refCount = 0u; } - object->params.numMemEntries = 0; - AddrTable_count[PROCID_TO_IPU(procHandle->procId)] = 0; + object->params.numMemEntries = AddrTable_STATIC_COUNT; + AddrTable_count[PROCID_TO_IPU(procHandle->procId)] = + AddrTable_STATIC_COUNT; //No need to reset.. that will be done in STOP /*tmpStatus = VAYUIPUCORE0_halResetCtrl(object->halObject, @@ -1876,19 +1914,35 @@ VAYUIPUCORE0PROC_map( * is required. Add the entry only if the range does not exist * in the translation table. */ - for (j = 0; - j < AddrTable_count[PROCID_TO_IPU(procHandle->procId)]; j++) { + /* check in static entries first */ + for (j = 0; j < AddrTable_STATIC_COUNT; j++) { ai = &AddrTable[PROCID_TO_IPU(procHandle->procId)][j]; + startAddr = ai->addr[ProcMgr_AddrType_SlaveVirt]; + endAddr = startAddr + ai->size; - if (ai->isMapped == TRUE) { - startAddr = ai->addr[ProcMgr_AddrType_SlaveVirt]; - endAddr = startAddr + ai->size; + if ((startAddr <= *dstAddr) && (*dstAddr < endAddr)) { + found = TRUE; + /* refCount does not need to be incremented for static entries */ + break; + } + } - if ((startAddr <= *dstAddr) && (*dstAddr < endAddr) - && ((*dstAddr + sglist[i].size) <= endAddr)) { - found = TRUE; - ai->refCount++; - break; + /* if not found in static entries, check in dynamic entries */ + if (!found) { + for (j = AddrTable_STATIC_COUNT; + j < AddrTable_count[PROCID_TO_IPU(procHandle->procId)]; j++) { + ai = &AddrTable[PROCID_TO_IPU(procHandle->procId)][j]; + + if (ai->isMapped == TRUE) { + startAddr = ai->addr[ProcMgr_AddrType_SlaveVirt]; + endAddr = startAddr + ai->size; + + if ((startAddr <= *dstAddr) && (*dstAddr < endAddr) + && ((*dstAddr + sglist[i].size) <= endAddr)) { + found = TRUE; + ai->refCount++; + break; + } } } } @@ -1990,7 +2044,7 @@ VAYUIPUCORE0PROC_unmap( /* Delete added entries from translation * table only in last unmap called on that entry */ - for (i = 0; + for (i = AddrTable_STATIC_COUNT; i < AddrTable_count[PROCID_TO_IPU(procHandle->procId)]; i++) { ai = &AddrTable[PROCID_TO_IPU(procHandle->procId)][i]; diff --git a/qnx/src/ipc3x_dev/ti/syslink/family/omap5430/ipu/omap5430BenelliProc.c b/qnx/src/ipc3x_dev/ti/syslink/family/omap5430/ipu/omap5430BenelliProc.c index 380dc4f..e76e280 100644 --- a/qnx/src/ipc3x_dev/ti/syslink/family/omap5430/ipu/omap5430BenelliProc.c +++ b/qnx/src/ipc3x_dev/ti/syslink/family/omap5430/ipu/omap5430BenelliProc.c @@ -13,7 +13,7 @@ * * ============================================================================ * - * Copyright (c) 2010-2015, Texas Instruments Incorporated + * Copyright (c) 2010-2016, Texas Instruments Incorporated * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -94,6 +94,12 @@ extern "C" { /*! + * @brief Number of static entries in address translation table. + */ +#define AddrTable_IPU_STATIC_COUNT 1 +#define AddrTable_DSP_STATIC_COUNT 0 + +/*! * @brief max entries in translation table. */ #define AddrTable_SIZE 32 @@ -144,14 +150,31 @@ typedef struct OMAP5430TESLAPROC_module_object_tag { /* Number of memory regions */ -static UInt32 AddrTable_IPU_count = 0; -static UInt32 AddrTable_DSP_count = 0; +static UInt32 AddrTable_IPU_count = AddrTable_IPU_STATIC_COUNT; +static UInt32 AddrTable_DSP_count = AddrTable_DSP_STATIC_COUNT; /* Address translation table for IPU */ -static ProcMgr_AddrInfo OMAP5430BENELLIPROC_addrTable[AddrTable_SIZE]; +static ProcMgr_AddrInfo OMAP5430BENELLIPROC_addrTable[AddrTable_SIZE] = +{ + /* L2 RAM */ + { + .addr[ProcMgr_AddrType_MasterKnlVirt] = -1u, + .addr[ProcMgr_AddrType_MasterUsrVirt] = -1u, + .addr[ProcMgr_AddrType_MasterPhys] = 0x55020000u, + .addr[ProcMgr_AddrType_SlaveVirt] = 0x20000000u, + .addr[ProcMgr_AddrType_SlavePhys] = -1u, + .size = 0x10000u, + .isCached = FALSE, + .mapMask = ProcMgr_SLAVEVIRT, + .isMapped = TRUE, + .refCount = 0u /* refCount set to 0 for static entry */ + }, +}; /* Address translation table for DSP */ -static ProcMgr_AddrInfo OMAP5430TESLAPROC_addrTable[AddrTable_SIZE]; +static ProcMgr_AddrInfo OMAP5430TESLAPROC_addrTable[AddrTable_SIZE] = +{ +}; /* ============================================================================= * Globals @@ -168,7 +191,7 @@ static OMAP5430BENELLIPROC_ModuleObject OMAP5430IPU0PROC_state = { .config_size = sizeof (OMAP5430BENELLIPROC_Config), - .defInstParams.numMemEntries = 0, + .defInstParams.numMemEntries = AddrTable_IPU_STATIC_COUNT, .isSetup = FALSE, .procHandle = NULL, .gateHandle = NULL @@ -181,7 +204,7 @@ static OMAP5430BENELLIPROC_ModuleObject OMAP5430IPU1PROC_state = { .config_size = sizeof (OMAP5430BENELLIPROC_Config), - .defInstParams.numMemEntries = 0, + .defInstParams.numMemEntries = AddrTable_IPU_STATIC_COUNT, .isSetup = FALSE, .procHandle = NULL, .gateHandle = NULL @@ -194,7 +217,7 @@ static OMAP5430TESLAPROC_ModuleObject OMAP5430DSPPROC_state = { .config_size = sizeof (OMAP5430TESLAPROC_Config), - .defInstParams.numMemEntries = 0, + .defInstParams.numMemEntries = AddrTable_DSP_STATIC_COUNT, .isSetup = FALSE, .procHandle = NULL, .gateHandle = NULL @@ -1267,6 +1290,7 @@ OMAP5430BENELLIPROC_detach (Processor_Handle handle) Int i = 0; ProcMgr_AddrInfo * ai; ProcMgr_AddrInfo * pMemRegn = NULL; + UInt32 staticCount = 0; UInt32 * AddrTable_count = NULL; GT_1trace (curTrace, GT_ENTER, "OMAP5430BENELLIPROC_detach", handle); @@ -1277,16 +1301,19 @@ OMAP5430BENELLIPROC_detach (Processor_Handle handle) { case PROCTYPE_IPU0: pMemRegn = OMAP5430BENELLIPROC_addrTable; + staticCount = AddrTable_IPU_STATIC_COUNT; AddrTable_count = &AddrTable_IPU_count; break; #ifndef IPC_SYSBIOS_SMP case PROCTYPE_IPU1: pMemRegn = OMAP5430BENELLIPROC_addrTable; + staticCount = AddrTable_IPU_STATIC_COUNT; AddrTable_count = &AddrTable_IPU_count; break; #endif case PROCTYPE_DSP: pMemRegn = OMAP5430TESLAPROC_addrTable; + staticCount = AddrTable_DSP_STATIC_COUNT; AddrTable_count = &AddrTable_DSP_count; break; } @@ -1360,7 +1387,7 @@ OMAP5430BENELLIPROC_detach (Processor_Handle handle) } /* delete all dynamically added entries */ - for (i = 0; i < *AddrTable_count; i++) { + for (i = staticCount; i < *AddrTable_count; i++) { ai = &pMemRegn[i]; ai->addr[ProcMgr_AddrType_MasterKnlVirt] = -1u; ai->addr[ProcMgr_AddrType_MasterUsrVirt] = -1u; @@ -1373,8 +1400,8 @@ OMAP5430BENELLIPROC_detach (Processor_Handle handle) ai->isMapped = FALSE; ai->refCount = 0u; } - object->params.numMemEntries = 0; - *AddrTable_count = 0; + object->params.numMemEntries = staticCount; + *AddrTable_count = staticCount; //No need to reset.. that will be done in STOP /* tmpStatus = OMAP5430BENELLI_halResetCtrl (object->halObject, diff --git a/qnx/src/ipc3x_dev/ti/syslink/resources/RscTable.c b/qnx/src/ipc3x_dev/ti/syslink/resources/RscTable.c index 875946a..489669c 100644 --- a/qnx/src/ipc3x_dev/ti/syslink/resources/RscTable.c +++ b/qnx/src/ipc3x_dev/ti/syslink/resources/RscTable.c @@ -5,7 +5,7 @@ * * ============================================================================ * - * Copyright (c) 2012-2015, Texas Instruments Incorporated + * Copyright (c) 2012-2016, Texas Instruments Incorporated * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -471,32 +471,6 @@ RscTable_process (UInt16 procId, Bool tryAlloc, UInt32 * numBlocks, printf ("RscTable_process: carveout [%s] @ da [0x%08x] pa [0x%08x] len [0x%x]\n", cout->name, cout->da, cout->pa, cout->len); break; } - case TYPE_INTMEM : - { - struct fw_rsc_intmem * cout = (struct fw_rsc_intmem *)entry; - - if (obj->numMemEntries == IPC_MAX_MEMENTRIES) { - ret = -1; - } - else { - obj->memEntries[obj->numMemEntries].slaveVirtAddr = - cout->da; - obj->memEntries[obj->numMemEntries].masterPhysAddr = - cout->pa; - obj->memEntries[obj->numMemEntries].size = cout->len; - /* do not map to slave MMU */ - obj->memEntries[obj->numMemEntries].map = FALSE; - obj->memEntries[obj->numMemEntries].mapMask = - ProcMgr_SLAVEVIRT; - obj->memEntries[obj->numMemEntries].isCached = FALSE; - obj->memEntries[obj->numMemEntries].isValid = TRUE; - obj->numMemEntries++; - } - printf ("RscTable_process: intmem [%s] @ da [0x%08x]" - " pa [0x%08x] len [0x%x]\n", cout->name, cout->da, - cout->pa, cout->len); - break; - } case TYPE_DEVMEM : { // only care about mem in DDR for now diff --git a/qnx/src/ipc3x_dev/ti/syslink/resources/rsc_types.h b/qnx/src/ipc3x_dev/ti/syslink/resources/rsc_types.h index 4dda9e2..a6de4f9 100644 --- a/qnx/src/ipc3x_dev/ti/syslink/resources/rsc_types.h +++ b/qnx/src/ipc3x_dev/ti/syslink/resources/rsc_types.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2011-2014, Texas Instruments Incorporated + * Copyright (c) 2011-2016, Texas Instruments Incorporated * All rights reserved. * * Redistribution and use in source and binary forms, with or without @@ -72,7 +72,6 @@ #define TYPE_DEVMEM 1 #define TYPE_TRACE 2 #define TYPE_VDEV 3 -#define TYPE_INTMEM 4 /* Common Resource Structure Types */ struct fw_rsc_carveout { @@ -85,16 +84,6 @@ struct fw_rsc_carveout { Char name[32]; }; -struct fw_rsc_intmem { - UInt32 type; - UInt32 version; - UInt32 da; - UInt32 pa; - UInt32 len; - UInt32 reserved; - Char name[32]; -}; - struct fw_rsc_devmem { UInt32 type; UInt32 da; |