drm: samsung: corrrect ppc when calculating DPU ACLK

One DSC encoder provides 1 ppc capability. If DSC is enabled, we need to
consider DSC encoder number as the ppc to calculate ACLK for panel.

Bug: 257423894
Test: play various resolution videos
Change-Id: I57589c7e280b0299c16bcf96d8cfc4222679d1c0
Signed-off-by: Midas Chien <midaschieh@google.com>

3 files changed, 16 insertions, 15 deletions

diff --git a/samsung/exynos_drm_bts.c b/samsung/exynos_drm_bts.c
index f47c4b2..8bed570 100644
--- a/samsung/exynos_drm_bts.c
+++ b/samsung/exynos_drm_bts.c
@@ -343,7 +343,7 @@ static u64 dpu_bts_calc_aclk_disp(struct decon_device *decon,
 				  const struct dpu_bts_win_config *config, u64 resol_clk,
 				  u32 max_clk)
 {
-	u64 aclk_disp, aclk_base, aclk_disp_khz;
+	u64 aclk_disp, aclk_base, aclk_panel_khz, aclk_disp_khz;
 	u32 ppc;
 	u32 src_w, src_h;
 	u32 diff_w, ratio_v;
@@ -362,12 +362,16 @@ static u64 dpu_bts_calc_aclk_disp(struct decon_device *decon,
 	if (src_w > config->dst_w || src_h > config->dst_h)
 		is_downscale = true;
 
-	/* case for using dsc encoder 1ea at decon0 or decon1 */
-	if ((decon->id != 2) && (decon->config.dsc.dsc_count == 1))
-		ppc = ((decon->bts.ppc / 2UL) >= 1UL) ?
-				(decon->bts.ppc / 2UL) : 1UL;
-	else
+	/* when calculating aclk for panel, if DSC is enabled, consider DSC encoder
+	 * count as its ppc.
+	 */
+	if (decon->config.dsc.enabled) {
+		ppc = min(decon->bts.ppc, decon->config.dsc.dsc_count);
+		is_dsc = true;
+	} else {
 		ppc = decon->bts.ppc;
+	}
+	aclk_panel_khz = resol_clk / ppc;
 
 	margin = 1100 + ((48000 + 20000) / decon->config.image_width);
 	diff_w = (src_w <= config->dst_w) ? 0 : src_w - config->dst_w;
@@ -389,10 +393,10 @@ static u64 dpu_bts_calc_aclk_disp(struct decon_device *decon,
 	}
 	aclk_disp = mult_frac(aclk_disp, decon->config.image_height * decon->bts.fps, 1000);
 	aclk_disp_khz = (aclk_disp * margin / 1000) / 1000;
+	aclk_disp_khz /= decon->bts.ppc;
 
-	if (aclk_disp_khz < resol_clk)
-		aclk_disp_khz = resol_clk;
-	aclk_disp_khz /= ppc;
+	if (aclk_disp_khz < aclk_panel_khz)
+		aclk_disp_khz = aclk_panel_khz;
 
 	if (!config->is_rot)
 		return aclk_disp_khz;
@@ -403,9 +407,6 @@ static u64 dpu_bts_calc_aclk_disp(struct decon_device *decon,
 	else
 		aclk_base = max_clk;
 
-	if (decon->config.dsc.enabled)
-		is_dsc = true;
-
 	aclk_disp_khz = dpu_bts_calc_rotate_aclk(decon, (u32)aclk_base, ppc,
 			src_w, config->dst_w, config->is_comp, is_downscale, is_dsc);
 
diff --git a/samsung/exynos_drm_decon.c b/samsung/exynos_drm_decon.c
index badcb8a..f5f1e23 100644
--- a/samsung/exynos_drm_decon.c
+++ b/samsung/exynos_drm_decon.c
@@ -1757,8 +1757,8 @@ static int decon_parse_dt(struct decon_device *decon, struct device_node *np)
 	}
 
 	if (of_property_read_u32(np, "ppc", (u32 *)&decon->bts.ppc))
-		decon->bts.ppc = 2UL;
-	decon_info(decon, "PPC(%llu)\n", decon->bts.ppc);
+		decon->bts.ppc = 2U;
+	decon_info(decon, "PPC(%u)\n", decon->bts.ppc);
 
 	if (of_property_read_u32(np, "ppc_rotator",
 					(u32 *)&decon->bts.ppc_rotator)) {
diff --git a/samsung/exynos_drm_decon.h b/samsung/exynos_drm_decon.h
index 5f1f37b..e9f3fa1 100644
--- a/samsung/exynos_drm_decon.h
+++ b/samsung/exynos_drm_decon.h
@@ -141,7 +141,7 @@ struct dpu_bts {
 	u32 max_disp_freq;
 	u32 prev_max_disp_freq;
 	u32 dvfs_max_disp_freq;
-	u64 ppc;
+	u32 ppc;
 	u32 ppc_rotator;
 	u32 ppc_scaler;
 	u32 delay_comp;