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authorChris Lu <luchris@google.com>2022-05-11 22:43:38 +0800
committerTreeHugger Robot <treehugger-gerrit@google.com>2022-05-17 03:20:26 +0000
commit3a5cfaa43377bc88375492affbcd9c31d5c783fc (patch)
tree864ead241b5200b73e81784f9a11381d9746aacb
parent6769020ea46e8202962cb960881c2f66319c18b4 (diff)
downloaddisplay-3a5cfaa43377bc88375492affbcd9c31d5c783fc.tar.gz
panel: nt37290: allow OSC2 access while in AOD and OFF
We may change the OSC2 clock while in AOD and OFF states, but the commands cannot be sent to DDIC except in normal state. Add the change to allow the access but just save the value. It will be applied when the state is changed to normal. If some panel cannot allow the access, the protection can be added in the implementation in each panel file. Bug: 212601547 Test: read/write the node while in AOD and OFF states Change-Id: I49d8f54eca20b09087868dbd1d727b9687ddf894 Signed-off-by: Chris Lu <luchris@google.com>
-rw-r--r--samsung/panel/panel-boe-nt37290.c20
-rw-r--r--samsung/panel/panel-samsung-drv.c6
2 files changed, 13 insertions, 13 deletions
diff --git a/samsung/panel/panel-boe-nt37290.c b/samsung/panel/panel-boe-nt37290.c
index 874e7c6..452bd06 100644
--- a/samsung/panel/panel-boe-nt37290.c
+++ b/samsung/panel/panel-boe-nt37290.c
@@ -1210,10 +1210,6 @@ static void nt37290_set_osc2_clk_khz(struct exynos_panel *ctx, unsigned int clk_
if (!pmode)
return;
- /* don't change OSC2 clock in AOD mode */
- if (pmode->exynos_mode.is_lp_mode)
- return;
-
for (i = 0; i < num_clk; i++) {
if (clk_khz == osc2_clk_data[i].clk_khz) {
idx = i;
@@ -1230,9 +1226,19 @@ static void nt37290_set_osc2_clk_khz(struct exynos_panel *ctx, unsigned int clk_
spanel->hw_osc2_clk_idx = idx;
ctx->osc2_clk_khz = clk_khz;
- /* trigger update since OSC2 clock is changed */
- nt37290_update_panel_feat(ctx, pmode, true);
- dev_dbg(ctx->dev, "OSC2 clock is changed to %u (idx %d)\n", clk_khz, idx);
+ /**
+ * Update the clock only when panel is in normal state. For other
+ * states, the value will be saved and applied when the state is
+ * changed to normal.
+ */
+ if (ctx->panel_state == PANEL_STATE_NORMAL) {
+ /* trigger update since OSC2 clock is changed */
+ nt37290_update_panel_feat(ctx, pmode, true);
+ dev_dbg(ctx->dev, "%s: %u (idx %d)\n", __func__, clk_khz, idx);
+ } else {
+ dev_dbg(ctx->dev, "%s: pending change for %u (idx %d)\n",
+ __func__, clk_khz, idx);
+ }
}
}
diff --git a/samsung/panel/panel-samsung-drv.c b/samsung/panel/panel-samsung-drv.c
index a438798..85997fe 100644
--- a/samsung/panel/panel-samsung-drv.c
+++ b/samsung/panel/panel-samsung-drv.c
@@ -1390,9 +1390,6 @@ static ssize_t osc2_clk_khz_store(struct device *dev, struct device_attribute *a
unsigned int osc2_clk_khz;
int ret;
- if (!is_panel_active(ctx))
- return -EPERM;
-
if (!funcs || !funcs->set_osc2_clk_khz)
return -EOPNOTSUPP;
@@ -1415,9 +1412,6 @@ static ssize_t osc2_clk_khz_show(struct device *dev, struct device_attribute *at
const struct mipi_dsi_device *dsi = to_mipi_dsi_device(dev);
struct exynos_panel *ctx = mipi_dsi_get_drvdata(dsi);
- if (!is_panel_active(ctx))
- return -EPERM;
-
return scnprintf(buf, PAGE_SIZE, "%u\n", ctx->osc2_clk_khz);
}