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authorKevin DuBois <kevindubois@google.com>2023-02-15 21:42:37 +0000
committerSean Callanan <spyffe@google.com>2023-02-16 03:12:08 +0000
commit50c0ac999bcc7f2cfd186e4249d0caec1383c3a7 (patch)
treec84256046133ec9d47e9126b50bd0a6bd2e2c0c4
parente8fa58acd3f48031ac6297e64ae996d430fa31d4 (diff)
downloadgpu-50c0ac999bcc7f2cfd186e4249d0caec1383c3a7.tar.gz
Revert "kbase: Powercycle mali to recover from a PM timeout"
Revert submission 2366782 Reason for revert: b/252072919 Reverted changes: /q/submissionid:2366782 Bug: 252072919 Change-Id: I1060f7543d37bb616a1b7c2464a0929a96774415
-rw-r--r--mali_kbase/backend/gpu/mali_kbase_pm_driver.c24
-rw-r--r--mali_kbase/csf/mali_kbase_csf_defs.h2
-rw-r--r--mali_kbase/csf/mali_kbase_csf_reset_gpu.c4
-rw-r--r--mali_kbase/mali_kbase_reset_gpu.h3
4 files changed, 1 insertions, 32 deletions
diff --git a/mali_kbase/backend/gpu/mali_kbase_pm_driver.c b/mali_kbase/backend/gpu/mali_kbase_pm_driver.c
index 601e8f5..8b2779a 100644
--- a/mali_kbase/backend/gpu/mali_kbase_pm_driver.c
+++ b/mali_kbase/backend/gpu/mali_kbase_pm_driver.c
@@ -2416,22 +2416,8 @@ static void kbase_pm_timed_out(struct kbase_device *kbdev)
dev_err(kbdev->dev, "Power transition timed out unexpectedly\n");
kbase_gpu_timeout_debug_message(kbdev);
dev_err(kbdev->dev, "Sending reset to GPU - all running jobs will be lost\n");
-
- /* pixel: If either:
- * 1. L2/MCU power transition timed out, or,
- * 2. kbase state machine fell out of sync with the hw state,
- * a soft/hard reset (ie writing to SOFT/HARD_RESET regs) is insufficient to resume
- * operation.
- *
- * Besides, Odin TRM advises against touching SOFT/HARD_RESET
- * regs if L2_PWRTRANS is 1 to avoid undefined state.
- *
- * We have already lost work if we end up here, so send a powercycle to reset the hw,
- * which is more reliable.
- */
if (kbase_prepare_to_reset_gpu(kbdev,
- RESET_FLAGS_HWC_UNRECOVERABLE_ERROR |
- RESET_FLAGS_FORCE_PM_HW_RESET))
+ RESET_FLAGS_HWC_UNRECOVERABLE_ERROR))
kbase_reset_gpu(kbdev);
}
@@ -3192,14 +3178,6 @@ static int kbase_pm_do_reset(struct kbase_device *kbdev)
KBASE_TLSTREAM_JD_GPU_SOFT_RESET(kbdev, kbdev);
-#if MALI_USE_CSF
- if (kbdev->csf.reset.force_pm_hw_reset) {
- dev_err(kbdev->dev, "Power Cycle reset mali");
- kbdev->csf.reset.force_pm_hw_reset = false;
- return kbase_pm_hw_reset(kbdev);
- }
-#endif
-
if (kbdev->pm.backend.callback_soft_reset) {
ret = kbdev->pm.backend.callback_soft_reset(kbdev);
if (ret < 0)
diff --git a/mali_kbase/csf/mali_kbase_csf_defs.h b/mali_kbase/csf/mali_kbase_csf_defs.h
index 520a41b..af93fb3 100644
--- a/mali_kbase/csf/mali_kbase_csf_defs.h
+++ b/mali_kbase/csf/mali_kbase_csf_defs.h
@@ -828,7 +828,6 @@ struct kbase_csf_context {
* mechanism to check for deadlocks involving reset waits.
* @state: Tracks if the GPU reset is in progress or not.
* The state is represented by enum @kbase_csf_reset_gpu_state.
- * @force_pm_hw_reset: pixel: Powercycle the GPU instead of attempting a soft/hard reset.
*/
struct kbase_csf_reset_gpu {
struct workqueue_struct *workq;
@@ -836,7 +835,6 @@ struct kbase_csf_reset_gpu {
wait_queue_head_t wait;
struct rw_semaphore sem;
atomic_t state;
- bool force_pm_hw_reset;
};
/**
diff --git a/mali_kbase/csf/mali_kbase_csf_reset_gpu.c b/mali_kbase/csf/mali_kbase_csf_reset_gpu.c
index ea1d022..647a813 100644
--- a/mali_kbase/csf/mali_kbase_csf_reset_gpu.c
+++ b/mali_kbase/csf/mali_kbase_csf_reset_gpu.c
@@ -513,9 +513,6 @@ bool kbase_prepare_to_reset_gpu(struct kbase_device *kbdev, unsigned int flags)
/* Some other thread is already resetting the GPU */
return false;
- if (flags & RESET_FLAGS_FORCE_PM_HW_RESET)
- kbdev->csf.reset.force_pm_hw_reset = true;
-
return true;
}
KBASE_EXPORT_TEST_API(kbase_prepare_to_reset_gpu);
@@ -634,7 +631,6 @@ int kbase_reset_gpu_init(struct kbase_device *kbdev)
init_waitqueue_head(&kbdev->csf.reset.wait);
init_rwsem(&kbdev->csf.reset.sem);
- kbdev->csf.reset.force_pm_hw_reset = false;
return 0;
}
diff --git a/mali_kbase/mali_kbase_reset_gpu.h b/mali_kbase/mali_kbase_reset_gpu.h
index a78a75a..ff631e9 100644
--- a/mali_kbase/mali_kbase_reset_gpu.h
+++ b/mali_kbase/mali_kbase_reset_gpu.h
@@ -151,9 +151,6 @@ void kbase_reset_gpu_assert_failed_or_prevented(struct kbase_device *kbdev);
/* This reset should be treated as an unrecoverable error by HW counter logic */
#define RESET_FLAGS_HWC_UNRECOVERABLE_ERROR ((unsigned int)(1 << 0))
-/* pixel: Powercycle the GPU instead of attempting a soft/hard reset (only used on CSF hw). */
-#define RESET_FLAGS_FORCE_PM_HW_RESET ((unsigned int)(1 << 1))
-
/**
* kbase_prepare_to_reset_gpu_locked - Prepare for resetting the GPU.
* @kbdev: Device pointer