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| author | Sidath Senanayake <sidaths@google.com> | 2020-08-28 16:36:11 +0100 |
|---|---|---|
| committer | Sidath Senanayake <sidaths@google.com> | 2020-09-02 21:01:38 +0100 |
| commit | 01278baa0e6506d197c44bf09d2032f24dd9a1e4 (patch) | |
| tree | f043fa0881da5c5d0a1beae973427bc2217ae2b1 /mali_kbase/Kbuild | |
| parent | 6512329057af12dd9d81e23f62d890bfca7b1849 (diff) | |
| download | gpu-01278baa0e6506d197c44bf09d2032f24dd9a1e4.tar.gz | |
mali_kbase: platform: Add QOS support
This change allows the GPU DVFS table to specify clock restrictions
for INT, MIF and the CPU clusters to ensure consistent performance.
These restrictions are set via Linux's PM QOS framework and rely on
devfreq and cpufreq support. It also adds support for bus traffic
shaping scenarios.
Configuration for these features is read from the GPU's device tree
node.
Bug: 156057140
Bug: 158091247
Signed-off-by: Sidath Senanayake <sidaths@google.com>
Change-Id: I13a92c147aa0b22df2dc1207ccffda7eacd1c8d0
Diffstat (limited to 'mali_kbase/Kbuild')
| -rw-r--r-- | mali_kbase/Kbuild | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/mali_kbase/Kbuild b/mali_kbase/Kbuild index 9ed314f..d85f71c 100644 --- a/mali_kbase/Kbuild +++ b/mali_kbase/Kbuild @@ -60,7 +60,9 @@ DEFINES = \ # Pixel integration defines DEFINES += \ - -DCONFIG_MALI_MIDGARD_DVFS=y + -DCONFIG_MALI_MIDGARD_DVFS=y \ + -DCONFIG_MALI_PIXEL_GPU_QOS=y \ + -DCONFIG_MALI_PIXEL_GPU_BTS=y ifeq ($(KBUILD_EXTMOD),) # in-tree |