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authorJörg Wagner <jorwag@google.com>2023-12-14 09:44:26 +0000
committerJörg Wagner <jorwag@google.com>2023-12-14 09:44:26 +0000
commit049a542207ed694271316782397b78b2e202086a (patch)
tree105e9378d4d5062dc72109fdd4a77c915bd9425d /mali_kbase/mali_base_hwconfig_issues.h
parente61eb93296e9f940b32d4ad4b0c3a5557cbeaf17 (diff)
downloadgpu-049a542207ed694271316782397b78b2e202086a.tar.gz
Update KMD to r47p0
Provenance: ipdelivery@ad01e50d640910a99224382bb227e6d4de627657 Change-Id: I19ac9bce34a5c5a319c1b4a388e8b037b3dfe6e7
Diffstat (limited to 'mali_kbase/mali_base_hwconfig_issues.h')
-rw-r--r--mali_kbase/mali_base_hwconfig_issues.h705
1 files changed, 244 insertions, 461 deletions
diff --git a/mali_kbase/mali_base_hwconfig_issues.h b/mali_kbase/mali_base_hwconfig_issues.h
index 91b9b83..4426bd7 100644
--- a/mali_kbase/mali_base_hwconfig_issues.h
+++ b/mali_kbase/mali_base_hwconfig_issues.h
@@ -67,361 +67,199 @@ enum base_hw_issue {
BASE_HW_ISSUE_TITANHW_2710,
BASE_HW_ISSUE_TITANHW_2679,
BASE_HW_ISSUE_GPU2022PRO_148,
+ BASE_HW_ISSUE_TITANHW_2922,
+ BASE_HW_ISSUE_TITANHW_2952,
+ BASE_HW_ISSUE_KRAKEHW_2151,
+ BASE_HW_ISSUE_TITANHW_2938,
+ BASE_HW_ISSUE_KRAKEHW_2269,
BASE_HW_ISSUE_END
};
-__attribute__((unused)) static const enum base_hw_issue base_hw_issues_generic[] = {
- BASE_HW_ISSUE_END
-};
+__attribute__((
+ unused)) static const enum base_hw_issue base_hw_issues_generic[] = { BASE_HW_ISSUE_END };
__attribute__((unused)) static const enum base_hw_issue base_hw_issues_tMIx_r0p0_05dev0[] = {
- BASE_HW_ISSUE_9435,
- BASE_HW_ISSUE_10682,
- BASE_HW_ISSUE_11054,
- BASE_HW_ISSUE_T76X_3953,
- BASE_HW_ISSUE_TMIX_7891,
- BASE_HW_ISSUE_TMIX_8042,
- BASE_HW_ISSUE_TMIX_8133,
- BASE_HW_ISSUE_TMIX_8138,
- BASE_HW_ISSUE_TMIX_8206,
- BASE_HW_ISSUE_TMIX_8343,
- BASE_HW_ISSUE_TMIX_8463,
- BASE_HW_ISSUE_TMIX_8456,
- BASE_HW_ISSUE_TMIX_8438,
- BASE_HW_ISSUE_TSIX_2033,
- BASE_HW_ISSUE_TTRX_921,
- BASE_HW_ISSUE_GPU2017_1336,
- BASE_HW_ISSUE_TITANHW_2710,
- BASE_HW_ISSUE_GPU2022PRO_148,
- BASE_HW_ISSUE_END
+ BASE_HW_ISSUE_9435, BASE_HW_ISSUE_10682, BASE_HW_ISSUE_11054,
+ BASE_HW_ISSUE_T76X_3953, BASE_HW_ISSUE_TMIX_7891, BASE_HW_ISSUE_TMIX_8042,
+ BASE_HW_ISSUE_TMIX_8133, BASE_HW_ISSUE_TMIX_8138, BASE_HW_ISSUE_TMIX_8206,
+ BASE_HW_ISSUE_TMIX_8343, BASE_HW_ISSUE_TMIX_8463, BASE_HW_ISSUE_TMIX_8456,
+ BASE_HW_ISSUE_TMIX_8438, BASE_HW_ISSUE_TSIX_2033, BASE_HW_ISSUE_TTRX_921,
+ BASE_HW_ISSUE_GPU2017_1336, BASE_HW_ISSUE_TITANHW_2710, BASE_HW_ISSUE_GPU2022PRO_148,
+ BASE_HW_ISSUE_TITANHW_2938, BASE_HW_ISSUE_END
};
__attribute__((unused)) static const enum base_hw_issue base_hw_issues_tMIx_r0p0[] = {
- BASE_HW_ISSUE_9435,
- BASE_HW_ISSUE_10682,
- BASE_HW_ISSUE_11054,
- BASE_HW_ISSUE_TMIX_7891,
- BASE_HW_ISSUE_TMIX_7940,
- BASE_HW_ISSUE_TMIX_8042,
- BASE_HW_ISSUE_TMIX_8133,
- BASE_HW_ISSUE_TMIX_8138,
- BASE_HW_ISSUE_TMIX_8206,
- BASE_HW_ISSUE_TMIX_8343,
- BASE_HW_ISSUE_TMIX_8463,
- BASE_HW_ISSUE_TMIX_8456,
- BASE_HW_ISSUE_TMIX_8438,
- BASE_HW_ISSUE_TSIX_2033,
- BASE_HW_ISSUE_TTRX_921,
- BASE_HW_ISSUE_GPU2017_1336,
- BASE_HW_ISSUE_TITANHW_2710,
- BASE_HW_ISSUE_GPU2022PRO_148,
- BASE_HW_ISSUE_END
+ BASE_HW_ISSUE_9435, BASE_HW_ISSUE_10682, BASE_HW_ISSUE_11054,
+ BASE_HW_ISSUE_TMIX_7891, BASE_HW_ISSUE_TMIX_7940, BASE_HW_ISSUE_TMIX_8042,
+ BASE_HW_ISSUE_TMIX_8133, BASE_HW_ISSUE_TMIX_8138, BASE_HW_ISSUE_TMIX_8206,
+ BASE_HW_ISSUE_TMIX_8343, BASE_HW_ISSUE_TMIX_8463, BASE_HW_ISSUE_TMIX_8456,
+ BASE_HW_ISSUE_TMIX_8438, BASE_HW_ISSUE_TSIX_2033, BASE_HW_ISSUE_TTRX_921,
+ BASE_HW_ISSUE_GPU2017_1336, BASE_HW_ISSUE_TITANHW_2710, BASE_HW_ISSUE_GPU2022PRO_148,
+ BASE_HW_ISSUE_TITANHW_2938, BASE_HW_ISSUE_END
};
__attribute__((unused)) static const enum base_hw_issue base_hw_issues_tMIx_r0p1[] = {
- BASE_HW_ISSUE_9435,
- BASE_HW_ISSUE_10682,
- BASE_HW_ISSUE_11054,
- BASE_HW_ISSUE_TMIX_7891,
- BASE_HW_ISSUE_TMIX_7940,
- BASE_HW_ISSUE_TMIX_8042,
- BASE_HW_ISSUE_TMIX_8133,
- BASE_HW_ISSUE_TMIX_8138,
- BASE_HW_ISSUE_TMIX_8206,
- BASE_HW_ISSUE_TMIX_8343,
- BASE_HW_ISSUE_TMIX_8463,
- BASE_HW_ISSUE_TMIX_8456,
- BASE_HW_ISSUE_TMIX_8438,
- BASE_HW_ISSUE_TSIX_2033,
- BASE_HW_ISSUE_TTRX_921,
- BASE_HW_ISSUE_GPU2017_1336,
- BASE_HW_ISSUE_TITANHW_2710,
- BASE_HW_ISSUE_GPU2022PRO_148,
- BASE_HW_ISSUE_END
+ BASE_HW_ISSUE_9435, BASE_HW_ISSUE_10682, BASE_HW_ISSUE_11054,
+ BASE_HW_ISSUE_TMIX_7891, BASE_HW_ISSUE_TMIX_7940, BASE_HW_ISSUE_TMIX_8042,
+ BASE_HW_ISSUE_TMIX_8133, BASE_HW_ISSUE_TMIX_8138, BASE_HW_ISSUE_TMIX_8206,
+ BASE_HW_ISSUE_TMIX_8343, BASE_HW_ISSUE_TMIX_8463, BASE_HW_ISSUE_TMIX_8456,
+ BASE_HW_ISSUE_TMIX_8438, BASE_HW_ISSUE_TSIX_2033, BASE_HW_ISSUE_TTRX_921,
+ BASE_HW_ISSUE_GPU2017_1336, BASE_HW_ISSUE_TITANHW_2710, BASE_HW_ISSUE_GPU2022PRO_148,
+ BASE_HW_ISSUE_TITANHW_2938, BASE_HW_ISSUE_END
};
__attribute__((unused)) static const enum base_hw_issue base_hw_issues_model_tMIx[] = {
- BASE_HW_ISSUE_5736,
- BASE_HW_ISSUE_9435,
- BASE_HW_ISSUE_TMIX_7891,
- BASE_HW_ISSUE_TMIX_7940,
- BASE_HW_ISSUE_TMIX_8042,
- BASE_HW_ISSUE_TMIX_8133,
- BASE_HW_ISSUE_TMIX_8138,
- BASE_HW_ISSUE_TMIX_8206,
- BASE_HW_ISSUE_TMIX_8343,
- BASE_HW_ISSUE_TMIX_8456,
- BASE_HW_ISSUE_TSIX_2033,
- BASE_HW_ISSUE_TITANHW_2710,
- BASE_HW_ISSUE_GPU2022PRO_148,
- BASE_HW_ISSUE_END
+ BASE_HW_ISSUE_5736, BASE_HW_ISSUE_9435, BASE_HW_ISSUE_TMIX_7891,
+ BASE_HW_ISSUE_TMIX_7940, BASE_HW_ISSUE_TMIX_8042, BASE_HW_ISSUE_TMIX_8133,
+ BASE_HW_ISSUE_TMIX_8138, BASE_HW_ISSUE_TMIX_8206, BASE_HW_ISSUE_TMIX_8343,
+ BASE_HW_ISSUE_TMIX_8456, BASE_HW_ISSUE_TSIX_2033, BASE_HW_ISSUE_TITANHW_2710,
+ BASE_HW_ISSUE_GPU2022PRO_148, BASE_HW_ISSUE_TITANHW_2938, BASE_HW_ISSUE_END
};
__attribute__((unused)) static const enum base_hw_issue base_hw_issues_tHEx_r0p0[] = {
- BASE_HW_ISSUE_9435,
- BASE_HW_ISSUE_10682,
- BASE_HW_ISSUE_11054,
- BASE_HW_ISSUE_TMIX_7891,
- BASE_HW_ISSUE_TMIX_8042,
- BASE_HW_ISSUE_TMIX_8133,
- BASE_HW_ISSUE_TSIX_2033,
- BASE_HW_ISSUE_TTRX_921,
- BASE_HW_ISSUE_GPU2017_1336,
- BASE_HW_ISSUE_TITANHW_2710,
- BASE_HW_ISSUE_GPU2022PRO_148,
+ BASE_HW_ISSUE_9435, BASE_HW_ISSUE_10682, BASE_HW_ISSUE_11054,
+ BASE_HW_ISSUE_TMIX_7891, BASE_HW_ISSUE_TMIX_8042, BASE_HW_ISSUE_TMIX_8133,
+ BASE_HW_ISSUE_TSIX_2033, BASE_HW_ISSUE_TTRX_921, BASE_HW_ISSUE_GPU2017_1336,
+ BASE_HW_ISSUE_TITANHW_2710, BASE_HW_ISSUE_GPU2022PRO_148, BASE_HW_ISSUE_TITANHW_2938,
BASE_HW_ISSUE_END
};
__attribute__((unused)) static const enum base_hw_issue base_hw_issues_tHEx_r0p1[] = {
- BASE_HW_ISSUE_9435,
- BASE_HW_ISSUE_10682,
- BASE_HW_ISSUE_11054,
- BASE_HW_ISSUE_TMIX_7891,
- BASE_HW_ISSUE_TMIX_8042,
- BASE_HW_ISSUE_TMIX_8133,
- BASE_HW_ISSUE_TSIX_2033,
- BASE_HW_ISSUE_TTRX_921,
- BASE_HW_ISSUE_GPU2017_1336,
- BASE_HW_ISSUE_TITANHW_2710,
- BASE_HW_ISSUE_GPU2022PRO_148,
+ BASE_HW_ISSUE_9435, BASE_HW_ISSUE_10682, BASE_HW_ISSUE_11054,
+ BASE_HW_ISSUE_TMIX_7891, BASE_HW_ISSUE_TMIX_8042, BASE_HW_ISSUE_TMIX_8133,
+ BASE_HW_ISSUE_TSIX_2033, BASE_HW_ISSUE_TTRX_921, BASE_HW_ISSUE_GPU2017_1336,
+ BASE_HW_ISSUE_TITANHW_2710, BASE_HW_ISSUE_GPU2022PRO_148, BASE_HW_ISSUE_TITANHW_2938,
BASE_HW_ISSUE_END
};
__attribute__((unused)) static const enum base_hw_issue base_hw_issues_tHEx_r0p2[] = {
- BASE_HW_ISSUE_9435,
- BASE_HW_ISSUE_10682,
- BASE_HW_ISSUE_11054,
- BASE_HW_ISSUE_TMIX_7891,
- BASE_HW_ISSUE_TMIX_8042,
- BASE_HW_ISSUE_TMIX_8133,
- BASE_HW_ISSUE_TSIX_2033,
- BASE_HW_ISSUE_TTRX_921,
- BASE_HW_ISSUE_GPU2017_1336,
- BASE_HW_ISSUE_TITANHW_2710,
- BASE_HW_ISSUE_GPU2022PRO_148,
+ BASE_HW_ISSUE_9435, BASE_HW_ISSUE_10682, BASE_HW_ISSUE_11054,
+ BASE_HW_ISSUE_TMIX_7891, BASE_HW_ISSUE_TMIX_8042, BASE_HW_ISSUE_TMIX_8133,
+ BASE_HW_ISSUE_TSIX_2033, BASE_HW_ISSUE_TTRX_921, BASE_HW_ISSUE_GPU2017_1336,
+ BASE_HW_ISSUE_TITANHW_2710, BASE_HW_ISSUE_GPU2022PRO_148, BASE_HW_ISSUE_TITANHW_2938,
BASE_HW_ISSUE_END
};
__attribute__((unused)) static const enum base_hw_issue base_hw_issues_tHEx_r0p3[] = {
- BASE_HW_ISSUE_9435,
- BASE_HW_ISSUE_10682,
- BASE_HW_ISSUE_TMIX_7891,
- BASE_HW_ISSUE_TMIX_8042,
- BASE_HW_ISSUE_TMIX_8133,
- BASE_HW_ISSUE_TSIX_2033,
- BASE_HW_ISSUE_TTRX_921,
- BASE_HW_ISSUE_GPU2017_1336,
- BASE_HW_ISSUE_TITANHW_2710,
- BASE_HW_ISSUE_GPU2022PRO_148,
- BASE_HW_ISSUE_END
+ BASE_HW_ISSUE_9435, BASE_HW_ISSUE_10682, BASE_HW_ISSUE_TMIX_7891,
+ BASE_HW_ISSUE_TMIX_8042, BASE_HW_ISSUE_TMIX_8133, BASE_HW_ISSUE_TSIX_2033,
+ BASE_HW_ISSUE_TTRX_921, BASE_HW_ISSUE_GPU2017_1336, BASE_HW_ISSUE_TITANHW_2710,
+ BASE_HW_ISSUE_GPU2022PRO_148, BASE_HW_ISSUE_TITANHW_2938, BASE_HW_ISSUE_END
};
__attribute__((unused)) static const enum base_hw_issue base_hw_issues_model_tHEx[] = {
- BASE_HW_ISSUE_5736,
- BASE_HW_ISSUE_9435,
- BASE_HW_ISSUE_TMIX_7891,
- BASE_HW_ISSUE_TMIX_8042,
- BASE_HW_ISSUE_TMIX_8133,
- BASE_HW_ISSUE_TSIX_2033,
- BASE_HW_ISSUE_TITANHW_2710,
- BASE_HW_ISSUE_GPU2022PRO_148,
+ BASE_HW_ISSUE_5736, BASE_HW_ISSUE_9435, BASE_HW_ISSUE_TMIX_7891,
+ BASE_HW_ISSUE_TMIX_8042, BASE_HW_ISSUE_TMIX_8133, BASE_HW_ISSUE_TSIX_2033,
+ BASE_HW_ISSUE_TITANHW_2710, BASE_HW_ISSUE_GPU2022PRO_148, BASE_HW_ISSUE_TITANHW_2938,
BASE_HW_ISSUE_END
};
__attribute__((unused)) static const enum base_hw_issue base_hw_issues_tSIx_r0p0[] = {
- BASE_HW_ISSUE_9435,
- BASE_HW_ISSUE_11054,
- BASE_HW_ISSUE_TMIX_8133,
- BASE_HW_ISSUE_TSIX_1116,
- BASE_HW_ISSUE_TSIX_2033,
- BASE_HW_ISSUE_TSIX_1792,
- BASE_HW_ISSUE_TTRX_921,
- BASE_HW_ISSUE_GPU2017_1336,
- BASE_HW_ISSUE_TTRX_3464,
- BASE_HW_ISSUE_TITANHW_2710,
- BASE_HW_ISSUE_GPU2022PRO_148,
+ BASE_HW_ISSUE_9435, BASE_HW_ISSUE_11054, BASE_HW_ISSUE_TMIX_8133,
+ BASE_HW_ISSUE_TSIX_1116, BASE_HW_ISSUE_TSIX_2033, BASE_HW_ISSUE_TSIX_1792,
+ BASE_HW_ISSUE_TTRX_921, BASE_HW_ISSUE_GPU2017_1336, BASE_HW_ISSUE_TTRX_3464,
+ BASE_HW_ISSUE_TITANHW_2710, BASE_HW_ISSUE_GPU2022PRO_148, BASE_HW_ISSUE_TITANHW_2938,
BASE_HW_ISSUE_END
};
__attribute__((unused)) static const enum base_hw_issue base_hw_issues_tSIx_r0p1[] = {
- BASE_HW_ISSUE_9435,
- BASE_HW_ISSUE_11054,
- BASE_HW_ISSUE_TMIX_8133,
- BASE_HW_ISSUE_TSIX_1116,
- BASE_HW_ISSUE_TSIX_2033,
- BASE_HW_ISSUE_TSIX_1792,
- BASE_HW_ISSUE_TTRX_921,
- BASE_HW_ISSUE_GPU2017_1336,
- BASE_HW_ISSUE_TTRX_3464,
- BASE_HW_ISSUE_TITANHW_2710,
- BASE_HW_ISSUE_GPU2022PRO_148,
+ BASE_HW_ISSUE_9435, BASE_HW_ISSUE_11054, BASE_HW_ISSUE_TMIX_8133,
+ BASE_HW_ISSUE_TSIX_1116, BASE_HW_ISSUE_TSIX_2033, BASE_HW_ISSUE_TSIX_1792,
+ BASE_HW_ISSUE_TTRX_921, BASE_HW_ISSUE_GPU2017_1336, BASE_HW_ISSUE_TTRX_3464,
+ BASE_HW_ISSUE_TITANHW_2710, BASE_HW_ISSUE_GPU2022PRO_148, BASE_HW_ISSUE_TITANHW_2938,
BASE_HW_ISSUE_END
};
__attribute__((unused)) static const enum base_hw_issue base_hw_issues_tSIx_r1p0[] = {
- BASE_HW_ISSUE_9435,
- BASE_HW_ISSUE_11054,
- BASE_HW_ISSUE_TMIX_8133,
- BASE_HW_ISSUE_TSIX_1116,
- BASE_HW_ISSUE_TSIX_2033,
- BASE_HW_ISSUE_TTRX_921,
- BASE_HW_ISSUE_GPU2017_1336,
- BASE_HW_ISSUE_TTRX_3464,
- BASE_HW_ISSUE_TITANHW_2710,
- BASE_HW_ISSUE_GPU2022PRO_148,
- BASE_HW_ISSUE_END
+ BASE_HW_ISSUE_9435, BASE_HW_ISSUE_11054, BASE_HW_ISSUE_TMIX_8133,
+ BASE_HW_ISSUE_TSIX_1116, BASE_HW_ISSUE_TSIX_2033, BASE_HW_ISSUE_TTRX_921,
+ BASE_HW_ISSUE_GPU2017_1336, BASE_HW_ISSUE_TTRX_3464, BASE_HW_ISSUE_TITANHW_2710,
+ BASE_HW_ISSUE_GPU2022PRO_148, BASE_HW_ISSUE_TITANHW_2938, BASE_HW_ISSUE_END
};
__attribute__((unused)) static const enum base_hw_issue base_hw_issues_tSIx_r1p1[] = {
- BASE_HW_ISSUE_9435,
- BASE_HW_ISSUE_TMIX_8133,
- BASE_HW_ISSUE_TSIX_1116,
- BASE_HW_ISSUE_TSIX_2033,
- BASE_HW_ISSUE_TTRX_921,
- BASE_HW_ISSUE_GPU2017_1336,
- BASE_HW_ISSUE_TTRX_3464,
- BASE_HW_ISSUE_TITANHW_2710,
- BASE_HW_ISSUE_GPU2022PRO_148,
- BASE_HW_ISSUE_END
+ BASE_HW_ISSUE_9435, BASE_HW_ISSUE_TMIX_8133, BASE_HW_ISSUE_TSIX_1116,
+ BASE_HW_ISSUE_TSIX_2033, BASE_HW_ISSUE_TTRX_921, BASE_HW_ISSUE_GPU2017_1336,
+ BASE_HW_ISSUE_TTRX_3464, BASE_HW_ISSUE_TITANHW_2710, BASE_HW_ISSUE_GPU2022PRO_148,
+ BASE_HW_ISSUE_TITANHW_2938, BASE_HW_ISSUE_END
};
__attribute__((unused)) static const enum base_hw_issue base_hw_issues_model_tSIx[] = {
- BASE_HW_ISSUE_5736,
- BASE_HW_ISSUE_9435,
- BASE_HW_ISSUE_TMIX_8133,
- BASE_HW_ISSUE_TSIX_1116,
- BASE_HW_ISSUE_TSIX_2033,
- BASE_HW_ISSUE_TTRX_3464,
- BASE_HW_ISSUE_TITANHW_2710,
- BASE_HW_ISSUE_GPU2022PRO_148,
+ BASE_HW_ISSUE_5736, BASE_HW_ISSUE_9435, BASE_HW_ISSUE_TMIX_8133,
+ BASE_HW_ISSUE_TSIX_1116, BASE_HW_ISSUE_TSIX_2033, BASE_HW_ISSUE_TTRX_3464,
+ BASE_HW_ISSUE_TITANHW_2710, BASE_HW_ISSUE_GPU2022PRO_148, BASE_HW_ISSUE_TITANHW_2938,
BASE_HW_ISSUE_END
};
__attribute__((unused)) static const enum base_hw_issue base_hw_issues_tDVx_r0p0[] = {
- BASE_HW_ISSUE_9435,
- BASE_HW_ISSUE_TMIX_8133,
- BASE_HW_ISSUE_TSIX_1116,
- BASE_HW_ISSUE_TSIX_2033,
- BASE_HW_ISSUE_TTRX_921,
- BASE_HW_ISSUE_GPU2017_1336,
- BASE_HW_ISSUE_TTRX_3464,
- BASE_HW_ISSUE_TITANHW_2710,
- BASE_HW_ISSUE_GPU2022PRO_148,
- BASE_HW_ISSUE_END
+ BASE_HW_ISSUE_9435, BASE_HW_ISSUE_TMIX_8133, BASE_HW_ISSUE_TSIX_1116,
+ BASE_HW_ISSUE_TSIX_2033, BASE_HW_ISSUE_TTRX_921, BASE_HW_ISSUE_GPU2017_1336,
+ BASE_HW_ISSUE_TTRX_3464, BASE_HW_ISSUE_TITANHW_2710, BASE_HW_ISSUE_GPU2022PRO_148,
+ BASE_HW_ISSUE_TITANHW_2938, BASE_HW_ISSUE_END
};
__attribute__((unused)) static const enum base_hw_issue base_hw_issues_model_tDVx[] = {
- BASE_HW_ISSUE_5736,
- BASE_HW_ISSUE_9435,
- BASE_HW_ISSUE_TMIX_8133,
- BASE_HW_ISSUE_TSIX_1116,
- BASE_HW_ISSUE_TSIX_2033,
- BASE_HW_ISSUE_TTRX_3464,
- BASE_HW_ISSUE_TITANHW_2710,
- BASE_HW_ISSUE_GPU2022PRO_148,
+ BASE_HW_ISSUE_5736, BASE_HW_ISSUE_9435, BASE_HW_ISSUE_TMIX_8133,
+ BASE_HW_ISSUE_TSIX_1116, BASE_HW_ISSUE_TSIX_2033, BASE_HW_ISSUE_TTRX_3464,
+ BASE_HW_ISSUE_TITANHW_2710, BASE_HW_ISSUE_GPU2022PRO_148, BASE_HW_ISSUE_TITANHW_2938,
BASE_HW_ISSUE_END
};
__attribute__((unused)) static const enum base_hw_issue base_hw_issues_tNOx_r0p0[] = {
- BASE_HW_ISSUE_9435,
- BASE_HW_ISSUE_TMIX_8133,
- BASE_HW_ISSUE_TSIX_1116,
- BASE_HW_ISSUE_TSIX_2033,
- BASE_HW_ISSUE_TNOX_1194,
- BASE_HW_ISSUE_TTRX_921,
- BASE_HW_ISSUE_GPU2017_1336,
- BASE_HW_ISSUE_TTRX_3464,
- BASE_HW_ISSUE_TITANHW_2710,
- BASE_HW_ISSUE_GPU2022PRO_148,
- BASE_HW_ISSUE_END
+ BASE_HW_ISSUE_9435, BASE_HW_ISSUE_TMIX_8133, BASE_HW_ISSUE_TSIX_1116,
+ BASE_HW_ISSUE_TSIX_2033, BASE_HW_ISSUE_TNOX_1194, BASE_HW_ISSUE_TTRX_921,
+ BASE_HW_ISSUE_GPU2017_1336, BASE_HW_ISSUE_TTRX_3464, BASE_HW_ISSUE_TITANHW_2710,
+ BASE_HW_ISSUE_GPU2022PRO_148, BASE_HW_ISSUE_TITANHW_2938, BASE_HW_ISSUE_END
};
__attribute__((unused)) static const enum base_hw_issue base_hw_issues_model_tNOx[] = {
- BASE_HW_ISSUE_5736,
- BASE_HW_ISSUE_9435,
- BASE_HW_ISSUE_TMIX_8133,
- BASE_HW_ISSUE_TSIX_1116,
- BASE_HW_ISSUE_TSIX_2033,
- BASE_HW_ISSUE_TTRX_3464,
- BASE_HW_ISSUE_TITANHW_2710,
- BASE_HW_ISSUE_GPU2022PRO_148,
+ BASE_HW_ISSUE_5736, BASE_HW_ISSUE_9435, BASE_HW_ISSUE_TMIX_8133,
+ BASE_HW_ISSUE_TSIX_1116, BASE_HW_ISSUE_TSIX_2033, BASE_HW_ISSUE_TTRX_3464,
+ BASE_HW_ISSUE_TITANHW_2710, BASE_HW_ISSUE_GPU2022PRO_148, BASE_HW_ISSUE_TITANHW_2938,
BASE_HW_ISSUE_END
};
__attribute__((unused)) static const enum base_hw_issue base_hw_issues_tGOx_r0p0[] = {
- BASE_HW_ISSUE_9435,
- BASE_HW_ISSUE_TMIX_8133,
- BASE_HW_ISSUE_TSIX_1116,
- BASE_HW_ISSUE_TSIX_2033,
- BASE_HW_ISSUE_TNOX_1194,
- BASE_HW_ISSUE_TTRX_921,
- BASE_HW_ISSUE_GPU2017_1336,
- BASE_HW_ISSUE_TTRX_3464,
- BASE_HW_ISSUE_TITANHW_2710,
- BASE_HW_ISSUE_GPU2022PRO_148,
- BASE_HW_ISSUE_END
+ BASE_HW_ISSUE_9435, BASE_HW_ISSUE_TMIX_8133, BASE_HW_ISSUE_TSIX_1116,
+ BASE_HW_ISSUE_TSIX_2033, BASE_HW_ISSUE_TNOX_1194, BASE_HW_ISSUE_TTRX_921,
+ BASE_HW_ISSUE_GPU2017_1336, BASE_HW_ISSUE_TTRX_3464, BASE_HW_ISSUE_TITANHW_2710,
+ BASE_HW_ISSUE_GPU2022PRO_148, BASE_HW_ISSUE_TITANHW_2938, BASE_HW_ISSUE_END
};
__attribute__((unused)) static const enum base_hw_issue base_hw_issues_tGOx_r1p0[] = {
- BASE_HW_ISSUE_9435,
- BASE_HW_ISSUE_TMIX_8133,
- BASE_HW_ISSUE_TSIX_1116,
- BASE_HW_ISSUE_TSIX_2033,
- BASE_HW_ISSUE_TGOX_R1_1234,
- BASE_HW_ISSUE_TTRX_921,
- BASE_HW_ISSUE_GPU2017_1336,
- BASE_HW_ISSUE_TTRX_3464,
- BASE_HW_ISSUE_TITANHW_2710,
- BASE_HW_ISSUE_GPU2022PRO_148,
- BASE_HW_ISSUE_END
+ BASE_HW_ISSUE_9435, BASE_HW_ISSUE_TMIX_8133, BASE_HW_ISSUE_TSIX_1116,
+ BASE_HW_ISSUE_TSIX_2033, BASE_HW_ISSUE_TGOX_R1_1234, BASE_HW_ISSUE_TTRX_921,
+ BASE_HW_ISSUE_GPU2017_1336, BASE_HW_ISSUE_TTRX_3464, BASE_HW_ISSUE_TITANHW_2710,
+ BASE_HW_ISSUE_GPU2022PRO_148, BASE_HW_ISSUE_TITANHW_2938, BASE_HW_ISSUE_END
};
__attribute__((unused)) static const enum base_hw_issue base_hw_issues_model_tGOx[] = {
- BASE_HW_ISSUE_5736,
- BASE_HW_ISSUE_9435,
- BASE_HW_ISSUE_TMIX_8133,
- BASE_HW_ISSUE_TSIX_1116,
- BASE_HW_ISSUE_TSIX_2033,
- BASE_HW_ISSUE_TTRX_3464,
- BASE_HW_ISSUE_TITANHW_2710,
- BASE_HW_ISSUE_GPU2022PRO_148,
+ BASE_HW_ISSUE_5736, BASE_HW_ISSUE_9435, BASE_HW_ISSUE_TMIX_8133,
+ BASE_HW_ISSUE_TSIX_1116, BASE_HW_ISSUE_TSIX_2033, BASE_HW_ISSUE_TTRX_3464,
+ BASE_HW_ISSUE_TITANHW_2710, BASE_HW_ISSUE_GPU2022PRO_148, BASE_HW_ISSUE_TITANHW_2938,
BASE_HW_ISSUE_END
};
__attribute__((unused)) static const enum base_hw_issue base_hw_issues_tTRx_r0p0[] = {
- BASE_HW_ISSUE_9435,
- BASE_HW_ISSUE_TSIX_2033,
- BASE_HW_ISSUE_TTRX_1337,
- BASE_HW_ISSUE_TTRX_2968_TTRX_3162,
- BASE_HW_ISSUE_TTRX_3076,
- BASE_HW_ISSUE_TTRX_921,
- BASE_HW_ISSUE_TTRX_3414,
- BASE_HW_ISSUE_GPU2017_1336,
- BASE_HW_ISSUE_TTRX_3083,
- BASE_HW_ISSUE_TTRX_3470,
- BASE_HW_ISSUE_TTRX_3464,
- BASE_HW_ISSUE_TTRX_3485,
- BASE_HW_ISSUE_TITANHW_2710,
- BASE_HW_ISSUE_GPU2022PRO_148,
- BASE_HW_ISSUE_END
+ BASE_HW_ISSUE_9435, BASE_HW_ISSUE_TSIX_2033,
+ BASE_HW_ISSUE_TTRX_1337, BASE_HW_ISSUE_TTRX_2968_TTRX_3162,
+ BASE_HW_ISSUE_TTRX_3076, BASE_HW_ISSUE_TTRX_921,
+ BASE_HW_ISSUE_TTRX_3414, BASE_HW_ISSUE_GPU2017_1336,
+ BASE_HW_ISSUE_TTRX_3083, BASE_HW_ISSUE_TTRX_3470,
+ BASE_HW_ISSUE_TTRX_3464, BASE_HW_ISSUE_TTRX_3485,
+ BASE_HW_ISSUE_TITANHW_2710, BASE_HW_ISSUE_GPU2022PRO_148,
+ BASE_HW_ISSUE_TITANHW_2938, BASE_HW_ISSUE_END
};
__attribute__((unused)) static const enum base_hw_issue base_hw_issues_tTRx_r0p1[] = {
- BASE_HW_ISSUE_9435,
- BASE_HW_ISSUE_TSIX_2033,
- BASE_HW_ISSUE_TTRX_1337,
- BASE_HW_ISSUE_TTRX_2968_TTRX_3162,
- BASE_HW_ISSUE_TTRX_3076,
- BASE_HW_ISSUE_TTRX_921,
- BASE_HW_ISSUE_TTRX_3414,
- BASE_HW_ISSUE_GPU2017_1336,
- BASE_HW_ISSUE_TTRX_3083,
- BASE_HW_ISSUE_TTRX_3470,
- BASE_HW_ISSUE_TTRX_3464,
- BASE_HW_ISSUE_TTRX_3485,
- BASE_HW_ISSUE_TITANHW_2710,
- BASE_HW_ISSUE_GPU2022PRO_148,
- BASE_HW_ISSUE_END
+ BASE_HW_ISSUE_9435, BASE_HW_ISSUE_TSIX_2033,
+ BASE_HW_ISSUE_TTRX_1337, BASE_HW_ISSUE_TTRX_2968_TTRX_3162,
+ BASE_HW_ISSUE_TTRX_3076, BASE_HW_ISSUE_TTRX_921,
+ BASE_HW_ISSUE_TTRX_3414, BASE_HW_ISSUE_GPU2017_1336,
+ BASE_HW_ISSUE_TTRX_3083, BASE_HW_ISSUE_TTRX_3470,
+ BASE_HW_ISSUE_TTRX_3464, BASE_HW_ISSUE_TTRX_3485,
+ BASE_HW_ISSUE_TITANHW_2710, BASE_HW_ISSUE_GPU2022PRO_148,
+ BASE_HW_ISSUE_TITANHW_2938, BASE_HW_ISSUE_END
};
__attribute__((unused)) static const enum base_hw_issue base_hw_issues_tTRx_r0p2[] = {
@@ -438,39 +276,26 @@ __attribute__((unused)) static const enum base_hw_issue base_hw_issues_tTRx_r0p2
BASE_HW_ISSUE_TTRX_3464,
BASE_HW_ISSUE_TITANHW_2710,
BASE_HW_ISSUE_GPU2022PRO_148,
+ BASE_HW_ISSUE_TITANHW_2938,
BASE_HW_ISSUE_END
};
__attribute__((unused)) static const enum base_hw_issue base_hw_issues_model_tTRx[] = {
- BASE_HW_ISSUE_5736,
- BASE_HW_ISSUE_9435,
- BASE_HW_ISSUE_TSIX_2033,
- BASE_HW_ISSUE_TTRX_1337,
- BASE_HW_ISSUE_TTRX_3414,
- BASE_HW_ISSUE_TTRX_3083,
- BASE_HW_ISSUE_TTRX_3470,
- BASE_HW_ISSUE_TTRX_3464,
- BASE_HW_ISSUE_TITANHW_2710,
- BASE_HW_ISSUE_GPU2022PRO_148,
- BASE_HW_ISSUE_END
+ BASE_HW_ISSUE_5736, BASE_HW_ISSUE_9435, BASE_HW_ISSUE_TSIX_2033,
+ BASE_HW_ISSUE_TTRX_1337, BASE_HW_ISSUE_TTRX_3414, BASE_HW_ISSUE_TTRX_3083,
+ BASE_HW_ISSUE_TTRX_3470, BASE_HW_ISSUE_TTRX_3464, BASE_HW_ISSUE_TITANHW_2710,
+ BASE_HW_ISSUE_GPU2022PRO_148, BASE_HW_ISSUE_TITANHW_2938, BASE_HW_ISSUE_END
};
__attribute__((unused)) static const enum base_hw_issue base_hw_issues_tNAx_r0p0[] = {
- BASE_HW_ISSUE_9435,
- BASE_HW_ISSUE_TSIX_2033,
- BASE_HW_ISSUE_TTRX_1337,
- BASE_HW_ISSUE_TTRX_2968_TTRX_3162,
- BASE_HW_ISSUE_TTRX_3076,
- BASE_HW_ISSUE_TTRX_921,
- BASE_HW_ISSUE_TTRX_3414,
- BASE_HW_ISSUE_GPU2017_1336,
- BASE_HW_ISSUE_TTRX_3083,
- BASE_HW_ISSUE_TTRX_3470,
- BASE_HW_ISSUE_TTRX_3464,
- BASE_HW_ISSUE_TTRX_3485,
- BASE_HW_ISSUE_TITANHW_2710,
- BASE_HW_ISSUE_GPU2022PRO_148,
- BASE_HW_ISSUE_END
+ BASE_HW_ISSUE_9435, BASE_HW_ISSUE_TSIX_2033,
+ BASE_HW_ISSUE_TTRX_1337, BASE_HW_ISSUE_TTRX_2968_TTRX_3162,
+ BASE_HW_ISSUE_TTRX_3076, BASE_HW_ISSUE_TTRX_921,
+ BASE_HW_ISSUE_TTRX_3414, BASE_HW_ISSUE_GPU2017_1336,
+ BASE_HW_ISSUE_TTRX_3083, BASE_HW_ISSUE_TTRX_3470,
+ BASE_HW_ISSUE_TTRX_3464, BASE_HW_ISSUE_TTRX_3485,
+ BASE_HW_ISSUE_TITANHW_2710, BASE_HW_ISSUE_GPU2022PRO_148,
+ BASE_HW_ISSUE_TITANHW_2938, BASE_HW_ISSUE_END
};
__attribute__((unused)) static const enum base_hw_issue base_hw_issues_tNAx_r0p1[] = {
@@ -487,37 +312,25 @@ __attribute__((unused)) static const enum base_hw_issue base_hw_issues_tNAx_r0p1
BASE_HW_ISSUE_TTRX_3464,
BASE_HW_ISSUE_TITANHW_2710,
BASE_HW_ISSUE_GPU2022PRO_148,
+ BASE_HW_ISSUE_TITANHW_2938,
BASE_HW_ISSUE_END
};
__attribute__((unused)) static const enum base_hw_issue base_hw_issues_model_tNAx[] = {
- BASE_HW_ISSUE_5736,
- BASE_HW_ISSUE_9435,
- BASE_HW_ISSUE_TSIX_2033,
- BASE_HW_ISSUE_TTRX_1337,
- BASE_HW_ISSUE_TTRX_3414,
- BASE_HW_ISSUE_TTRX_3083,
- BASE_HW_ISSUE_TTRX_3470,
- BASE_HW_ISSUE_TTRX_3464,
- BASE_HW_ISSUE_TITANHW_2710,
- BASE_HW_ISSUE_GPU2022PRO_148,
- BASE_HW_ISSUE_END
+ BASE_HW_ISSUE_5736, BASE_HW_ISSUE_9435, BASE_HW_ISSUE_TSIX_2033,
+ BASE_HW_ISSUE_TTRX_1337, BASE_HW_ISSUE_TTRX_3414, BASE_HW_ISSUE_TTRX_3083,
+ BASE_HW_ISSUE_TTRX_3470, BASE_HW_ISSUE_TTRX_3464, BASE_HW_ISSUE_TITANHW_2710,
+ BASE_HW_ISSUE_GPU2022PRO_148, BASE_HW_ISSUE_TITANHW_2938, BASE_HW_ISSUE_END
};
__attribute__((unused)) static const enum base_hw_issue base_hw_issues_tBEx_r0p0[] = {
- BASE_HW_ISSUE_9435,
- BASE_HW_ISSUE_TSIX_2033,
- BASE_HW_ISSUE_TTRX_1337,
- BASE_HW_ISSUE_TTRX_2968_TTRX_3162,
- BASE_HW_ISSUE_TTRX_921,
- BASE_HW_ISSUE_TTRX_3414,
- BASE_HW_ISSUE_TTRX_3083,
- BASE_HW_ISSUE_TTRX_3470,
- BASE_HW_ISSUE_TTRX_3464,
- BASE_HW_ISSUE_TTRX_3485,
- BASE_HW_ISSUE_TITANHW_2710,
- BASE_HW_ISSUE_GPU2022PRO_148,
- BASE_HW_ISSUE_END
+ BASE_HW_ISSUE_9435, BASE_HW_ISSUE_TSIX_2033,
+ BASE_HW_ISSUE_TTRX_1337, BASE_HW_ISSUE_TTRX_2968_TTRX_3162,
+ BASE_HW_ISSUE_TTRX_921, BASE_HW_ISSUE_TTRX_3414,
+ BASE_HW_ISSUE_TTRX_3083, BASE_HW_ISSUE_TTRX_3470,
+ BASE_HW_ISSUE_TTRX_3464, BASE_HW_ISSUE_TTRX_3485,
+ BASE_HW_ISSUE_TITANHW_2710, BASE_HW_ISSUE_GPU2022PRO_148,
+ BASE_HW_ISSUE_TITANHW_2938, BASE_HW_ISSUE_END
};
__attribute__((unused)) static const enum base_hw_issue base_hw_issues_tBEx_r0p1[] = {
@@ -532,6 +345,7 @@ __attribute__((unused)) static const enum base_hw_issue base_hw_issues_tBEx_r0p1
BASE_HW_ISSUE_TTRX_3464,
BASE_HW_ISSUE_TITANHW_2710,
BASE_HW_ISSUE_GPU2022PRO_148,
+ BASE_HW_ISSUE_TITANHW_2938,
BASE_HW_ISSUE_END
};
@@ -547,6 +361,7 @@ __attribute__((unused)) static const enum base_hw_issue base_hw_issues_tBEx_r1p0
BASE_HW_ISSUE_TTRX_3464,
BASE_HW_ISSUE_TITANHW_2710,
BASE_HW_ISSUE_GPU2022PRO_148,
+ BASE_HW_ISSUE_TITANHW_2938,
BASE_HW_ISSUE_END
};
@@ -562,24 +377,44 @@ __attribute__((unused)) static const enum base_hw_issue base_hw_issues_tBEx_r1p1
BASE_HW_ISSUE_TTRX_3464,
BASE_HW_ISSUE_TITANHW_2710,
BASE_HW_ISSUE_GPU2022PRO_148,
+ BASE_HW_ISSUE_TITANHW_2938,
BASE_HW_ISSUE_END
};
__attribute__((unused)) static const enum base_hw_issue base_hw_issues_model_tBEx[] = {
- BASE_HW_ISSUE_5736,
+ BASE_HW_ISSUE_5736, BASE_HW_ISSUE_9435, BASE_HW_ISSUE_TSIX_2033,
+ BASE_HW_ISSUE_TTRX_1337, BASE_HW_ISSUE_TTRX_3414, BASE_HW_ISSUE_TTRX_3083,
+ BASE_HW_ISSUE_TTRX_3470, BASE_HW_ISSUE_TTRX_3464, BASE_HW_ISSUE_TITANHW_2710,
+ BASE_HW_ISSUE_GPU2022PRO_148, BASE_HW_ISSUE_TITANHW_2938, BASE_HW_ISSUE_END
+};
+
+__attribute__((unused)) static const enum base_hw_issue base_hw_issues_lBEx_r1p0[] = {
+ BASE_HW_ISSUE_9435, BASE_HW_ISSUE_TSIX_2033,
+ BASE_HW_ISSUE_TTRX_1337, BASE_HW_ISSUE_TTRX_2968_TTRX_3162,
+ BASE_HW_ISSUE_TTRX_921, BASE_HW_ISSUE_TTRX_3414,
+ BASE_HW_ISSUE_TTRX_3083, BASE_HW_ISSUE_TTRX_3470,
+ BASE_HW_ISSUE_TTRX_3464, BASE_HW_ISSUE_TTRX_3485,
+ BASE_HW_ISSUE_TITANHW_2710, BASE_HW_ISSUE_GPU2022PRO_148,
+ BASE_HW_ISSUE_TITANHW_2938, BASE_HW_ISSUE_END
+};
+
+__attribute__((unused)) static const enum base_hw_issue base_hw_issues_lBEx_r1p1[] = {
BASE_HW_ISSUE_9435,
BASE_HW_ISSUE_TSIX_2033,
BASE_HW_ISSUE_TTRX_1337,
+ BASE_HW_ISSUE_TTRX_2968_TTRX_3162,
+ BASE_HW_ISSUE_TTRX_921,
BASE_HW_ISSUE_TTRX_3414,
BASE_HW_ISSUE_TTRX_3083,
BASE_HW_ISSUE_TTRX_3470,
BASE_HW_ISSUE_TTRX_3464,
BASE_HW_ISSUE_TITANHW_2710,
BASE_HW_ISSUE_GPU2022PRO_148,
+ BASE_HW_ISSUE_TITANHW_2938,
BASE_HW_ISSUE_END
};
-__attribute__((unused)) static const enum base_hw_issue base_hw_issues_lBEx_r1p0[] = {
+__attribute__((unused)) static const enum base_hw_issue base_hw_issues_tBAx_r0p0[] = {
BASE_HW_ISSUE_9435,
BASE_HW_ISSUE_TSIX_2033,
BASE_HW_ISSUE_TTRX_1337,
@@ -589,13 +424,13 @@ __attribute__((unused)) static const enum base_hw_issue base_hw_issues_lBEx_r1p0
BASE_HW_ISSUE_TTRX_3083,
BASE_HW_ISSUE_TTRX_3470,
BASE_HW_ISSUE_TTRX_3464,
- BASE_HW_ISSUE_TTRX_3485,
BASE_HW_ISSUE_TITANHW_2710,
BASE_HW_ISSUE_GPU2022PRO_148,
+ BASE_HW_ISSUE_TITANHW_2938,
BASE_HW_ISSUE_END
};
-__attribute__((unused)) static const enum base_hw_issue base_hw_issues_lBEx_r1p1[] = {
+__attribute__((unused)) static const enum base_hw_issue base_hw_issues_tBAx_r0p1[] = {
BASE_HW_ISSUE_9435,
BASE_HW_ISSUE_TSIX_2033,
BASE_HW_ISSUE_TTRX_1337,
@@ -607,10 +442,11 @@ __attribute__((unused)) static const enum base_hw_issue base_hw_issues_lBEx_r1p1
BASE_HW_ISSUE_TTRX_3464,
BASE_HW_ISSUE_TITANHW_2710,
BASE_HW_ISSUE_GPU2022PRO_148,
+ BASE_HW_ISSUE_TITANHW_2938,
BASE_HW_ISSUE_END
};
-__attribute__((unused)) static const enum base_hw_issue base_hw_issues_tBAx_r0p0[] = {
+__attribute__((unused)) static const enum base_hw_issue base_hw_issues_tBAx_r0p2[] = {
BASE_HW_ISSUE_9435,
BASE_HW_ISSUE_TSIX_2033,
BASE_HW_ISSUE_TTRX_1337,
@@ -622,6 +458,7 @@ __attribute__((unused)) static const enum base_hw_issue base_hw_issues_tBAx_r0p0
BASE_HW_ISSUE_TTRX_3464,
BASE_HW_ISSUE_TITANHW_2710,
BASE_HW_ISSUE_GPU2022PRO_148,
+ BASE_HW_ISSUE_TITANHW_2938,
BASE_HW_ISSUE_END
};
@@ -637,97 +474,58 @@ __attribute__((unused)) static const enum base_hw_issue base_hw_issues_tBAx_r1p0
BASE_HW_ISSUE_TTRX_3464,
BASE_HW_ISSUE_TITANHW_2710,
BASE_HW_ISSUE_GPU2022PRO_148,
+ BASE_HW_ISSUE_TITANHW_2938,
BASE_HW_ISSUE_END
};
__attribute__((unused)) static const enum base_hw_issue base_hw_issues_model_tBAx[] = {
- BASE_HW_ISSUE_5736,
- BASE_HW_ISSUE_9435,
- BASE_HW_ISSUE_TSIX_2033,
- BASE_HW_ISSUE_TTRX_1337,
- BASE_HW_ISSUE_TTRX_3414,
- BASE_HW_ISSUE_TTRX_3083,
- BASE_HW_ISSUE_TTRX_3470,
- BASE_HW_ISSUE_TTRX_3464,
- BASE_HW_ISSUE_TITANHW_2710,
- BASE_HW_ISSUE_GPU2022PRO_148,
- BASE_HW_ISSUE_END
+ BASE_HW_ISSUE_5736, BASE_HW_ISSUE_9435, BASE_HW_ISSUE_TSIX_2033,
+ BASE_HW_ISSUE_TTRX_1337, BASE_HW_ISSUE_TTRX_3414, BASE_HW_ISSUE_TTRX_3083,
+ BASE_HW_ISSUE_TTRX_3470, BASE_HW_ISSUE_TTRX_3464, BASE_HW_ISSUE_TITANHW_2710,
+ BASE_HW_ISSUE_GPU2022PRO_148, BASE_HW_ISSUE_TITANHW_2938, BASE_HW_ISSUE_END
};
__attribute__((unused)) static const enum base_hw_issue base_hw_issues_tODx_r0p0[] = {
- BASE_HW_ISSUE_TSIX_2033,
- BASE_HW_ISSUE_TTRX_1337,
- BASE_HW_ISSUE_GPU2019_3212,
- BASE_HW_ISSUE_GPU2019_3878,
- BASE_HW_ISSUE_GPU2019_3901,
- BASE_HW_ISSUE_TITANHW_2710,
- BASE_HW_ISSUE_GPU2022PRO_148,
- BASE_HW_ISSUE_END
+ BASE_HW_ISSUE_TSIX_2033, BASE_HW_ISSUE_TTRX_1337, BASE_HW_ISSUE_GPU2019_3212,
+ BASE_HW_ISSUE_GPU2019_3878, BASE_HW_ISSUE_GPU2019_3901, BASE_HW_ISSUE_TITANHW_2710,
+ BASE_HW_ISSUE_GPU2022PRO_148, BASE_HW_ISSUE_TITANHW_2938, BASE_HW_ISSUE_END
};
__attribute__((unused)) static const enum base_hw_issue base_hw_issues_model_tODx[] = {
- BASE_HW_ISSUE_TSIX_2033,
- BASE_HW_ISSUE_TTRX_1337,
- BASE_HW_ISSUE_GPU2019_3212,
- BASE_HW_ISSUE_GPU2019_3878,
- BASE_HW_ISSUE_GPU2019_3901,
- BASE_HW_ISSUE_TITANHW_2710,
- BASE_HW_ISSUE_GPU2022PRO_148,
- BASE_HW_ISSUE_END
+ BASE_HW_ISSUE_TSIX_2033, BASE_HW_ISSUE_TTRX_1337, BASE_HW_ISSUE_GPU2019_3212,
+ BASE_HW_ISSUE_GPU2019_3878, BASE_HW_ISSUE_GPU2019_3901, BASE_HW_ISSUE_TITANHW_2710,
+ BASE_HW_ISSUE_GPU2022PRO_148, BASE_HW_ISSUE_TITANHW_2938, BASE_HW_ISSUE_END
};
__attribute__((unused)) static const enum base_hw_issue base_hw_issues_tGRx_r0p0[] = {
- BASE_HW_ISSUE_TSIX_2033,
- BASE_HW_ISSUE_TTRX_1337,
- BASE_HW_ISSUE_GPU2019_3878,
- BASE_HW_ISSUE_GPU2019_3901,
- BASE_HW_ISSUE_TITANHW_2710,
- BASE_HW_ISSUE_GPU2022PRO_148,
- BASE_HW_ISSUE_END
+ BASE_HW_ISSUE_TSIX_2033, BASE_HW_ISSUE_TTRX_1337, BASE_HW_ISSUE_GPU2019_3878,
+ BASE_HW_ISSUE_GPU2019_3901, BASE_HW_ISSUE_TITANHW_2710, BASE_HW_ISSUE_GPU2022PRO_148,
+ BASE_HW_ISSUE_TITANHW_2938, BASE_HW_ISSUE_END
};
__attribute__((unused)) static const enum base_hw_issue base_hw_issues_model_tGRx[] = {
- BASE_HW_ISSUE_TSIX_2033,
- BASE_HW_ISSUE_TTRX_1337,
- BASE_HW_ISSUE_GPU2019_3878,
- BASE_HW_ISSUE_GPU2019_3901,
- BASE_HW_ISSUE_TITANHW_2710,
- BASE_HW_ISSUE_GPU2022PRO_148,
- BASE_HW_ISSUE_END
+ BASE_HW_ISSUE_TSIX_2033, BASE_HW_ISSUE_TTRX_1337, BASE_HW_ISSUE_GPU2019_3878,
+ BASE_HW_ISSUE_GPU2019_3901, BASE_HW_ISSUE_TITANHW_2710, BASE_HW_ISSUE_GPU2022PRO_148,
+ BASE_HW_ISSUE_TITANHW_2938, BASE_HW_ISSUE_END
};
__attribute__((unused)) static const enum base_hw_issue base_hw_issues_tVAx_r0p0[] = {
- BASE_HW_ISSUE_TSIX_2033,
- BASE_HW_ISSUE_TTRX_1337,
- BASE_HW_ISSUE_GPU2019_3878,
- BASE_HW_ISSUE_GPU2019_3901,
- BASE_HW_ISSUE_TITANHW_2710,
- BASE_HW_ISSUE_GPU2022PRO_148,
- BASE_HW_ISSUE_END
+ BASE_HW_ISSUE_TSIX_2033, BASE_HW_ISSUE_TTRX_1337, BASE_HW_ISSUE_GPU2019_3878,
+ BASE_HW_ISSUE_GPU2019_3901, BASE_HW_ISSUE_TITANHW_2710, BASE_HW_ISSUE_GPU2022PRO_148,
+ BASE_HW_ISSUE_TITANHW_2938, BASE_HW_ISSUE_TITANHW_2938, BASE_HW_ISSUE_END
};
__attribute__((unused)) static const enum base_hw_issue base_hw_issues_model_tVAx[] = {
- BASE_HW_ISSUE_TSIX_2033,
- BASE_HW_ISSUE_TTRX_1337,
- BASE_HW_ISSUE_GPU2019_3878,
- BASE_HW_ISSUE_GPU2019_3901,
- BASE_HW_ISSUE_TITANHW_2710,
- BASE_HW_ISSUE_GPU2022PRO_148,
- BASE_HW_ISSUE_END
+ BASE_HW_ISSUE_TSIX_2033, BASE_HW_ISSUE_TTRX_1337, BASE_HW_ISSUE_GPU2019_3878,
+ BASE_HW_ISSUE_GPU2019_3901, BASE_HW_ISSUE_TITANHW_2710, BASE_HW_ISSUE_GPU2022PRO_148,
+ BASE_HW_ISSUE_TITANHW_2938, BASE_HW_ISSUE_END
};
__attribute__((unused)) static const enum base_hw_issue base_hw_issues_tTUx_r0p0[] = {
- BASE_HW_ISSUE_TSIX_2033,
- BASE_HW_ISSUE_TTRX_1337,
- BASE_HW_ISSUE_TURSEHW_1997,
- BASE_HW_ISSUE_GPU2019_3878,
- BASE_HW_ISSUE_TURSEHW_2716,
- BASE_HW_ISSUE_GPU2019_3901,
- BASE_HW_ISSUE_GPU2021PRO_290,
- BASE_HW_ISSUE_TITANHW_2710,
- BASE_HW_ISSUE_TITANHW_2679,
- BASE_HW_ISSUE_GPU2022PRO_148,
- BASE_HW_ISSUE_END
+ BASE_HW_ISSUE_TSIX_2033, BASE_HW_ISSUE_TTRX_1337, BASE_HW_ISSUE_TURSEHW_1997,
+ BASE_HW_ISSUE_GPU2019_3878, BASE_HW_ISSUE_TURSEHW_2716, BASE_HW_ISSUE_GPU2019_3901,
+ BASE_HW_ISSUE_GPU2021PRO_290, BASE_HW_ISSUE_TITANHW_2710, BASE_HW_ISSUE_TITANHW_2679,
+ BASE_HW_ISSUE_GPU2022PRO_148, BASE_HW_ISSUE_TITANHW_2938, BASE_HW_ISSUE_END
};
__attribute__((unused)) static const enum base_hw_issue base_hw_issues_tTUx_r0p1[] = {
@@ -741,94 +539,79 @@ __attribute__((unused)) static const enum base_hw_issue base_hw_issues_tTUx_r0p1
BASE_HW_ISSUE_TITANHW_2710,
BASE_HW_ISSUE_TITANHW_2679,
BASE_HW_ISSUE_GPU2022PRO_148,
+ BASE_HW_ISSUE_TITANHW_2922,
+ BASE_HW_ISSUE_TITANHW_2938,
BASE_HW_ISSUE_END
};
__attribute__((unused)) static const enum base_hw_issue base_hw_issues_model_tTUx[] = {
- BASE_HW_ISSUE_TSIX_2033,
- BASE_HW_ISSUE_TTRX_1337,
- BASE_HW_ISSUE_GPU2019_3878,
- BASE_HW_ISSUE_TURSEHW_2716,
- BASE_HW_ISSUE_GPU2019_3901,
- BASE_HW_ISSUE_GPU2021PRO_290,
- BASE_HW_ISSUE_TITANHW_2710,
- BASE_HW_ISSUE_TITANHW_2679,
- BASE_HW_ISSUE_GPU2022PRO_148,
- BASE_HW_ISSUE_END
+ BASE_HW_ISSUE_TSIX_2033, BASE_HW_ISSUE_TTRX_1337, BASE_HW_ISSUE_GPU2019_3878,
+ BASE_HW_ISSUE_TURSEHW_2716, BASE_HW_ISSUE_GPU2019_3901, BASE_HW_ISSUE_GPU2021PRO_290,
+ BASE_HW_ISSUE_TITANHW_2710, BASE_HW_ISSUE_TITANHW_2679, BASE_HW_ISSUE_GPU2022PRO_148,
+ BASE_HW_ISSUE_TITANHW_2922, BASE_HW_ISSUE_TITANHW_2938, BASE_HW_ISSUE_END
};
__attribute__((unused)) static const enum base_hw_issue base_hw_issues_tTUx_r1p0[] = {
- BASE_HW_ISSUE_TSIX_2033,
- BASE_HW_ISSUE_TTRX_1337,
- BASE_HW_ISSUE_GPU2019_3878,
- BASE_HW_ISSUE_TURSEHW_2716,
- BASE_HW_ISSUE_GPU2019_3901,
- BASE_HW_ISSUE_GPU2021PRO_290,
- BASE_HW_ISSUE_TITANHW_2710,
- BASE_HW_ISSUE_TITANHW_2679,
- BASE_HW_ISSUE_GPU2022PRO_148,
- BASE_HW_ISSUE_END
+ BASE_HW_ISSUE_TSIX_2033, BASE_HW_ISSUE_TTRX_1337, BASE_HW_ISSUE_GPU2019_3878,
+ BASE_HW_ISSUE_TURSEHW_2716, BASE_HW_ISSUE_GPU2019_3901, BASE_HW_ISSUE_GPU2021PRO_290,
+ BASE_HW_ISSUE_TITANHW_2710, BASE_HW_ISSUE_TITANHW_2679, BASE_HW_ISSUE_GPU2022PRO_148,
+ BASE_HW_ISSUE_TITANHW_2922, BASE_HW_ISSUE_TITANHW_2938, BASE_HW_ISSUE_END
};
__attribute__((unused)) static const enum base_hw_issue base_hw_issues_tTUx_r1p1[] = {
- BASE_HW_ISSUE_TSIX_2033,
- BASE_HW_ISSUE_TTRX_1337,
- BASE_HW_ISSUE_GPU2019_3878,
- BASE_HW_ISSUE_TURSEHW_2716,
- BASE_HW_ISSUE_GPU2019_3901,
- BASE_HW_ISSUE_GPU2021PRO_290,
- BASE_HW_ISSUE_TITANHW_2710,
- BASE_HW_ISSUE_TITANHW_2679,
- BASE_HW_ISSUE_GPU2022PRO_148,
- BASE_HW_ISSUE_END
+ BASE_HW_ISSUE_TSIX_2033, BASE_HW_ISSUE_TTRX_1337, BASE_HW_ISSUE_GPU2019_3878,
+ BASE_HW_ISSUE_TURSEHW_2716, BASE_HW_ISSUE_GPU2019_3901, BASE_HW_ISSUE_GPU2021PRO_290,
+ BASE_HW_ISSUE_TITANHW_2710, BASE_HW_ISSUE_TITANHW_2679, BASE_HW_ISSUE_GPU2022PRO_148,
+ BASE_HW_ISSUE_TITANHW_2922, BASE_HW_ISSUE_TITANHW_2938, BASE_HW_ISSUE_END
};
__attribute__((unused)) static const enum base_hw_issue base_hw_issues_tTUx_r1p2[] = {
- BASE_HW_ISSUE_TSIX_2033,
- BASE_HW_ISSUE_TTRX_1337,
- BASE_HW_ISSUE_GPU2019_3878,
- BASE_HW_ISSUE_TURSEHW_2716,
- BASE_HW_ISSUE_GPU2019_3901,
- BASE_HW_ISSUE_GPU2021PRO_290,
- BASE_HW_ISSUE_TITANHW_2710,
- BASE_HW_ISSUE_TITANHW_2679,
- BASE_HW_ISSUE_GPU2022PRO_148,
- BASE_HW_ISSUE_END
+ BASE_HW_ISSUE_TSIX_2033, BASE_HW_ISSUE_TTRX_1337, BASE_HW_ISSUE_GPU2019_3878,
+ BASE_HW_ISSUE_TURSEHW_2716, BASE_HW_ISSUE_GPU2019_3901, BASE_HW_ISSUE_GPU2021PRO_290,
+ BASE_HW_ISSUE_TITANHW_2710, BASE_HW_ISSUE_TITANHW_2679, BASE_HW_ISSUE_GPU2022PRO_148,
+ BASE_HW_ISSUE_TITANHW_2922, BASE_HW_ISSUE_TITANHW_2938, BASE_HW_ISSUE_END
};
__attribute__((unused)) static const enum base_hw_issue base_hw_issues_tTUx_r1p3[] = {
- BASE_HW_ISSUE_TSIX_2033,
- BASE_HW_ISSUE_TTRX_1337,
- BASE_HW_ISSUE_GPU2019_3878,
- BASE_HW_ISSUE_TURSEHW_2716,
- BASE_HW_ISSUE_GPU2019_3901,
- BASE_HW_ISSUE_GPU2021PRO_290,
- BASE_HW_ISSUE_TITANHW_2710,
- BASE_HW_ISSUE_TITANHW_2679,
- BASE_HW_ISSUE_GPU2022PRO_148,
- BASE_HW_ISSUE_END
+ BASE_HW_ISSUE_TSIX_2033, BASE_HW_ISSUE_TTRX_1337, BASE_HW_ISSUE_GPU2019_3878,
+ BASE_HW_ISSUE_TURSEHW_2716, BASE_HW_ISSUE_GPU2019_3901, BASE_HW_ISSUE_GPU2021PRO_290,
+ BASE_HW_ISSUE_TITANHW_2710, BASE_HW_ISSUE_TITANHW_2679, BASE_HW_ISSUE_GPU2022PRO_148,
+ BASE_HW_ISSUE_TITANHW_2922, BASE_HW_ISSUE_TITANHW_2938, BASE_HW_ISSUE_END
};
__attribute__((unused)) static const enum base_hw_issue base_hw_issues_model_tTIx[] = {
- BASE_HW_ISSUE_TSIX_2033,
- BASE_HW_ISSUE_TTRX_1337,
- BASE_HW_ISSUE_TURSEHW_2716,
- BASE_HW_ISSUE_GPU2021PRO_290,
- BASE_HW_ISSUE_TITANHW_2710,
- BASE_HW_ISSUE_TITANHW_2679,
- BASE_HW_ISSUE_GPU2022PRO_148,
- BASE_HW_ISSUE_END
+ BASE_HW_ISSUE_TSIX_2033, BASE_HW_ISSUE_TTRX_1337, BASE_HW_ISSUE_TURSEHW_2716,
+ BASE_HW_ISSUE_GPU2021PRO_290, BASE_HW_ISSUE_TITANHW_2710, BASE_HW_ISSUE_TITANHW_2679,
+ BASE_HW_ISSUE_GPU2022PRO_148, BASE_HW_ISSUE_TITANHW_2922, BASE_HW_ISSUE_TITANHW_2952,
+ BASE_HW_ISSUE_TITANHW_2938, BASE_HW_ISSUE_END
};
__attribute__((unused)) static const enum base_hw_issue base_hw_issues_tTIx_r0p0[] = {
- BASE_HW_ISSUE_TSIX_2033,
- BASE_HW_ISSUE_TTRX_1337,
- BASE_HW_ISSUE_TURSEHW_2716,
- BASE_HW_ISSUE_GPU2021PRO_290,
- BASE_HW_ISSUE_TITANHW_2710,
- BASE_HW_ISSUE_TITANHW_2679,
- BASE_HW_ISSUE_GPU2022PRO_148,
- BASE_HW_ISSUE_END
+ BASE_HW_ISSUE_TSIX_2033, BASE_HW_ISSUE_TTRX_1337, BASE_HW_ISSUE_TURSEHW_2716,
+ BASE_HW_ISSUE_GPU2021PRO_290, BASE_HW_ISSUE_TITANHW_2710, BASE_HW_ISSUE_TITANHW_2679,
+ BASE_HW_ISSUE_GPU2022PRO_148, BASE_HW_ISSUE_TITANHW_2922, BASE_HW_ISSUE_TITANHW_2952,
+ BASE_HW_ISSUE_TITANHW_2938, BASE_HW_ISSUE_END
+};
+
+__attribute__((unused)) static const enum base_hw_issue base_hw_issues_tTIx_r0p1[] = {
+ BASE_HW_ISSUE_TSIX_2033, BASE_HW_ISSUE_TTRX_1337, BASE_HW_ISSUE_TURSEHW_2716,
+ BASE_HW_ISSUE_GPU2021PRO_290, BASE_HW_ISSUE_TITANHW_2710, BASE_HW_ISSUE_TITANHW_2679,
+ BASE_HW_ISSUE_GPU2022PRO_148, BASE_HW_ISSUE_TITANHW_2938, BASE_HW_ISSUE_END
+};
+
+__attribute__((unused)) static const enum base_hw_issue base_hw_issues_tKRx_r0p0[] = {
+ BASE_HW_ISSUE_TTRX_1337, BASE_HW_ISSUE_TURSEHW_2716, BASE_HW_ISSUE_GPU2022PRO_148,
+ BASE_HW_ISSUE_KRAKEHW_2151, BASE_HW_ISSUE_KRAKEHW_2269, BASE_HW_ISSUE_END
+};
+
+__attribute__((unused)) static const enum base_hw_issue base_hw_issues_tKRx_r0p1[] = {
+ BASE_HW_ISSUE_TTRX_1337, BASE_HW_ISSUE_TURSEHW_2716, BASE_HW_ISSUE_GPU2022PRO_148,
+ BASE_HW_ISSUE_KRAKEHW_2269, BASE_HW_ISSUE_END
+};
+
+__attribute__((unused)) static const enum base_hw_issue base_hw_issues_model_tKRx[] = {
+ BASE_HW_ISSUE_TTRX_1337, BASE_HW_ISSUE_TURSEHW_2716, BASE_HW_ISSUE_GPU2022PRO_148,
+ BASE_HW_ISSUE_KRAKEHW_2151, BASE_HW_ISSUE_KRAKEHW_2269, BASE_HW_ISSUE_END
};