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authorSidath Senanayake <sidaths@google.com>2016-06-29 16:03:55 +0200
committerSidath Senanayake <sidaths@google.com>2020-08-14 14:26:39 +0100
commit823a760515e356dfef47c691d827d8ba795ce2a4 (patch)
tree6cec387c158b6c73bdbc4468ba9076c64a46d91b /mali_kbase/mali_kbase_cache_policy.c
parentebdc4375adec063a7fd7f9176d4112b71f6425aa (diff)
downloadgpu-823a760515e356dfef47c691d827d8ba795ce2a4.tar.gz
Mali Bifrost DDK r0p0 KMD
Provenance: 6fe4d9f9a (collaborate/EAC/b_r0p0) BX304L01B-BU-00000-r0p0-06rel0 BX304L06A-BU-00000-r0p0-06rel0 Signed-off-by: Sidath Senanayake <sidaths@google.com> Change-Id: I128cfe0586d31f83f3158a7ab98fa40dca4b4349
Diffstat (limited to 'mali_kbase/mali_kbase_cache_policy.c')
-rw-r--r--mali_kbase/mali_kbase_cache_policy.c64
1 files changed, 64 insertions, 0 deletions
diff --git a/mali_kbase/mali_kbase_cache_policy.c b/mali_kbase/mali_kbase_cache_policy.c
new file mode 100644
index 0000000..c67b3e9
--- /dev/null
+++ b/mali_kbase/mali_kbase_cache_policy.c
@@ -0,0 +1,64 @@
+/*
+ *
+ * (C) COPYRIGHT 2012-2016 ARM Limited. All rights reserved.
+ *
+ * This program is free software and is provided to you under the terms of the
+ * GNU General Public License version 2 as published by the Free Software
+ * Foundation, and any use by you of this program is subject to the terms
+ * of such GNU licence.
+ *
+ * A copy of the licence is included with the program, and can also be obtained
+ * from Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
+ * Boston, MA 02110-1301, USA.
+ *
+ */
+
+
+
+
+
+/*
+ * Cache Policy API.
+ */
+
+#include "mali_kbase_cache_policy.h"
+
+/*
+ * The output flags should be a combination of the following values:
+ * KBASE_REG_CPU_CACHED: CPU cache should be enabled.
+ */
+u32 kbase_cache_enabled(u32 flags, u32 nr_pages)
+{
+ u32 cache_flags = 0;
+
+ CSTD_UNUSED(nr_pages);
+
+ if (flags & BASE_MEM_CACHED_CPU)
+ cache_flags |= KBASE_REG_CPU_CACHED;
+
+ return cache_flags;
+}
+
+
+void kbase_sync_single_for_device(struct kbase_device *kbdev, dma_addr_t handle,
+ size_t size, enum dma_data_direction dir)
+{
+/* Check if kernel is using coherency with GPU */
+#ifdef CONFIG_MALI_COH_KERN
+ if (kbdev->system_coherency == COHERENCY_ACE)
+ return;
+#endif /* CONFIG_MALI_COH_KERN */
+ dma_sync_single_for_device(kbdev->dev, handle, size, dir);
+}
+
+
+void kbase_sync_single_for_cpu(struct kbase_device *kbdev, dma_addr_t handle,
+ size_t size, enum dma_data_direction dir)
+{
+/* Check if kernel is using coherency with GPU */
+#ifdef CONFIG_MALI_COH_KERN
+ if (kbdev->system_coherency == COHERENCY_ACE)
+ return;
+#endif /* CONFIG_MALI_COH_KERN */
+ dma_sync_single_for_cpu(kbdev->dev, handle, size, dir);
+}