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author | Vamsidhar reddy Gaddam <gvamsi@google.com> | 2023-12-20 12:42:26 +0000 |
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committer | Vamsidhar reddy Gaddam <gvamsi@google.com> | 2024-01-05 09:19:17 +0000 |
commit | 11473542814286e59a89a70c969fb50a25ba921f (patch) | |
tree | bd4aa60e7d3dc895d82a36fcea0026569e3a04aa /mali_kbase/mali_kbase_config_defaults.h | |
parent | 8768eedce66a4373c96f35c8dfb73d4668703180 (diff) | |
parent | 049a542207ed694271316782397b78b2e202086a (diff) | |
download | gpu-11473542814286e59a89a70c969fb50a25ba921f.tar.gz |
Merge branch 'upstream' into HEAD
Update KMD to R47P0
Bug: 315267052
Test: Outlined in go/pixel-gpu-kmd-r47p0
Change-Id: I89454c4c862033fe330b260a9bc6cc777a3ca231
Signed-off-by: Vamsidhar reddy Gaddam <gvamsi@google.com>
Diffstat (limited to 'mali_kbase/mali_kbase_config_defaults.h')
-rw-r--r-- | mali_kbase/mali_kbase_config_defaults.h | 57 |
1 files changed, 48 insertions, 9 deletions
diff --git a/mali_kbase/mali_kbase_config_defaults.h b/mali_kbase/mali_kbase_config_defaults.h index fa73612..edc22aa 100644 --- a/mali_kbase/mali_kbase_config_defaults.h +++ b/mali_kbase/mali_kbase_config_defaults.h @@ -126,7 +126,7 @@ enum { /* Default scheduling tick granuality (can be overridden by platform header) */ #ifndef DEFAULT_JS_SCHEDULING_PERIOD_NS -#define DEFAULT_JS_SCHEDULING_PERIOD_NS (100000000u) /* 100ms */ +#define DEFAULT_JS_SCHEDULING_PERIOD_NS (100000000u) /* 100ms */ #endif /* Default minimum number of scheduling ticks before jobs are soft-stopped. @@ -134,21 +134,21 @@ enum { * This defines the time-slice for a job (which may be different from that of a * context) */ -#define DEFAULT_JS_SOFT_STOP_TICKS (1) /* 100ms-200ms */ +#define DEFAULT_JS_SOFT_STOP_TICKS (1) /* 100ms-200ms */ /* Default minimum number of scheduling ticks before CL jobs are soft-stopped. */ -#define DEFAULT_JS_SOFT_STOP_TICKS_CL (1) /* 100ms-200ms */ +#define DEFAULT_JS_SOFT_STOP_TICKS_CL (1) /* 100ms-200ms */ /* Default minimum number of scheduling ticks before jobs are hard-stopped */ -#define DEFAULT_JS_HARD_STOP_TICKS_SS (50 * TICK_MULTIPLIER) /* Default: 5s */ +#define DEFAULT_JS_HARD_STOP_TICKS_SS (50 * TICK_MULTIPLIER) /* Default: 5s */ /* Default minimum number of scheduling ticks before CL jobs are hard-stopped. */ -#define DEFAULT_JS_HARD_STOP_TICKS_CL (50) /* 5s */ +#define DEFAULT_JS_HARD_STOP_TICKS_CL (50) /* 5s */ /* Default minimum number of scheduling ticks before jobs are hard-stopped * during dumping */ -#define DEFAULT_JS_HARD_STOP_TICKS_DUMPING (15000) /* 1500s */ +#define DEFAULT_JS_HARD_STOP_TICKS_DUMPING (15000) /* 1500s */ /* Default timeout for some software jobs, after which the software event wait * jobs will be cancelled. @@ -158,17 +158,17 @@ enum { /* Default minimum number of scheduling ticks before the GPU is reset to clear a * "stuck" job */ -#define DEFAULT_JS_RESET_TICKS_SS (55 * TICK_MULTIPLIER) /* Default: 5.5s */ +#define DEFAULT_JS_RESET_TICKS_SS (55 * TICK_MULTIPLIER) /* Default: 5.5s */ /* Default minimum number of scheduling ticks before the GPU is reset to clear a * "stuck" CL job. */ -#define DEFAULT_JS_RESET_TICKS_CL (55) /* 5.5s */ +#define DEFAULT_JS_RESET_TICKS_CL (55) /* 5.5s */ /* Default minimum number of scheduling ticks before the GPU is reset to clear a * "stuck" job during dumping. */ -#define DEFAULT_JS_RESET_TICKS_DUMPING (15020) /* 1502s */ +#define DEFAULT_JS_RESET_TICKS_DUMPING (15020) /* 1502s */ /* Nominal reference frequency that was used to obtain all following * <...>_TIMEOUT_CYCLES macros, in kHz. @@ -224,7 +224,24 @@ enum { * * Based on 10s timeout at 100MHz, scaled from a 50MHz GPU system. */ +#if IS_ENABLED(CONFIG_MALI_IS_FPGA) +#define KCPU_FENCE_SIGNAL_TIMEOUT_CYCLES (2500000000ull) +#else #define KCPU_FENCE_SIGNAL_TIMEOUT_CYCLES (1000000000ull) +#endif + +/* Timeout for polling the GPU in clock cycles. + * + * Based on 10s timeout based on original MAX_LOOPS value. + */ +#define IPA_INACTIVE_TIMEOUT_CYCLES (1000000000ull) + +/* Timeout for polling the GPU for the MCU status in clock cycles. + * + * Based on 120s timeout based on original MAX_LOOPS value. + */ +#define CSF_FIRMWARE_STOP_TIMEOUT_CYCLES (12000000000ull) + /* Waiting timeout for task execution on an endpoint. Based on the * DEFAULT_PROGRESS_TIMEOUT. @@ -257,6 +274,24 @@ enum { #endif /* !MALI_USE_CSF */ +/* Timeout for polling the GPU PRFCNT_ACTIVE bit in clock cycles. + * + * Based on 120s timeout at 100MHz, based on original MAX_LOOPS value. + */ +#define KBASE_PRFCNT_ACTIVE_TIMEOUT_CYCLES (12000000000ull) + +/* Timeout for polling the GPU for a cache flush in clock cycles. + * + * Based on 120ms timeout at 100MHz, based on original MAX_LOOPS value. + */ +#define KBASE_CLEAN_CACHE_TIMEOUT_CYCLES (12000000ull) + +/* Timeout for polling the GPU for an AS command to complete in clock cycles. + * + * Based on 120s timeout at 100MHz, based on original MAX_LOOPS value. + */ +#define KBASE_AS_INACTIVE_TIMEOUT_CYCLES (12000000000ull) + /* Default timeslice that a context is scheduled in for, in nanoseconds. * * When a context has used up this amount of time across its jobs, it is @@ -272,7 +307,11 @@ enum { * is enabled the value will be read from there, otherwise this should be * overridden by defining GPU_FREQ_KHZ_MAX in the platform file. */ +#ifdef GPU_FREQ_KHZ_MAX +#define DEFAULT_GPU_FREQ_KHZ_MAX GPU_FREQ_KHZ_MAX +#else #define DEFAULT_GPU_FREQ_KHZ_MAX (5000) +#endif /* GPU_FREQ_KHZ_MAX */ /* Default timeout for task execution on an endpoint * |