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| author | Suzanne Candanedo <suzanne.candanedo@arm.com> | 2022-12-16 12:07:45 +0000 |
|---|---|---|
| committer | Guus Sliepen <gsliepen@google.com> | 2023-01-13 16:31:47 +0000 |
| commit | c48886fd473a20e28bb0199fc40f78ed1ec88b1d (patch) | |
| tree | 0508d24a04d09627402ac38a8a57ae64bbf1fa06 /mali_kbase/mmu | |
| parent | 422aa1fad7e63f16000ffb9303e816b54ef3d8ca (diff) | |
| download | gpu-c48886fd473a20e28bb0199fc40f78ed1ec88b1d.tar.gz | |
MIDCET-4324/GPUCORE-35180 Clear GPU caches before terminating region trackerandroid-t-qpr2-beta-3_r0.5android-t-qpr2-beta-3_r0.4android-t-qpr2-beta-3_r0.3android-t-qpr2-beta-3.2_r0.6android-gs-raviole-5.10-android13-qpr2-betaandroid-gs-pantah-5.10-t-qpr2-beta-3.2android-gs-pantah-5.10-android13-qpr2-betaandroid-gs-bluejay-5.10-android13-qpr2-beta
Move the code to disable the MMU for a kctx (which also will flush the
GPU caches for that kctx's Address Space) from the end of kctx
termination to JM/CSF kctx-scheduler termination time.
This ensures the GPU cached writes for that kctx are clear before we
free the kctx's GPU memory pages in the region tracker, and before the
MMU tables are freed.
This in turn ensures the GPU cached writes do not land in freed memory
(which would be a security issue).
Change-Id: I2730a5762cb106ca2179cf9a2f789b8764f21901
(cherry picked from commit 09e14ccf27007dcb2cc0d4d64f5087ccc620a0b5)
Provenance: https://code.ipdelivery.arm.com/c/GPU/mali-ddk/+/4810
Bug: 260123838
Diffstat (limited to 'mali_kbase/mmu')
| -rw-r--r-- | mali_kbase/mmu/mali_kbase_mmu.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/mali_kbase/mmu/mali_kbase_mmu.c b/mali_kbase/mmu/mali_kbase_mmu.c index c98d830..4828cdc 100644 --- a/mali_kbase/mmu/mali_kbase_mmu.c +++ b/mali_kbase/mmu/mali_kbase_mmu.c @@ -2752,6 +2752,10 @@ void kbase_mmu_term(struct kbase_device *kbdev, struct kbase_mmu_table *mmut) { int level; + WARN((mmut->kctx) && (mmut->kctx->as_nr != KBASEP_AS_NR_INVALID), + "kctx-%d_%d must first be scheduled out to flush GPU caches+tlbs before tearing down MMU tables", + mmut->kctx->tgid, mmut->kctx->id); + if (mmut->pgd != KBASE_MMU_INVALID_PGD_ADDRESS) { rt_mutex_lock(&mmut->mmu_lock); mmu_teardown_level(kbdev, mmut, mmut->pgd, MIDGARD_MMU_TOPLEVEL); |