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| author | Varad Gautam <varadgautam@google.com> | 2022-11-17 13:35:16 +0000 |
|---|---|---|
| committer | Varad Gautam <varadgautam@google.com> | 2023-04-17 17:34:51 +0000 |
| commit | 2c7d5db9265246160df5e7731786174613c43975 (patch) | |
| tree | e008abc959f709837b4ef30ad86a34b947965689 /mali_kbase/mmu | |
| parent | 96dd6b0e5528799b870e923cba29b72f2428079f (diff) | |
| download | gpu-2c7d5db9265246160df5e7731786174613c43975.tar.gz | |
Flush mmu updates regardless of coherency mode
kbase avoids flushing MMU updates on coherent systems, as these
systems are expected to snoop CPU caches instead.
This presents a problem on GS101/GS201 devices, where GPU->CPU cache
snoop requests do not work as intended when the GPU is in protected mode
(b/192236116) and the GPU ends up seeing stale memory / runs into page
faults.
As a software workaround, always flush MMU updates regardless of
coherency mode, so that the GPU page tables are accurate.
Note: This was initially added in I5473345d and reverted in I2a41a2044.
Bug: 200555454
Change-Id: I51187cd7c042bde42c4fcdf976a9f7f8828155e1
Signed-off-by: Varad Gautam <varadgautam@google.com>
Diffstat (limited to 'mali_kbase/mmu')
| -rw-r--r-- | mali_kbase/mmu/mali_kbase_mmu.c | 11 |
1 files changed, 6 insertions, 5 deletions
diff --git a/mali_kbase/mmu/mali_kbase_mmu.c b/mali_kbase/mmu/mali_kbase_mmu.c index 88b0197..b5ec66a 100644 --- a/mali_kbase/mmu/mali_kbase_mmu.c +++ b/mali_kbase/mmu/mali_kbase_mmu.c @@ -299,12 +299,13 @@ static void kbase_mmu_sync_pgd_gpu(struct kbase_device *kbdev, struct kbase_cont static void kbase_mmu_sync_pgd_cpu(struct kbase_device *kbdev, dma_addr_t handle, size_t size) { - /* In non-coherent system, ensure the GPU can read - * the pages from memory + /* Ensure that the GPU can read the pages from memory. + * + * pixel: b/200555454 requires this sync to happen even if the system + * is coherent. */ - if (kbdev->system_coherency == COHERENCY_NONE) - dma_sync_single_for_device(kbdev->dev, handle, size, - DMA_TO_DEVICE); + dma_sync_single_for_device(kbdev->dev, handle, size, + DMA_TO_DEVICE); } /** |