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author | Sidath Senanayake <sidaths@google.com> | 2021-05-13 22:24:33 +0100 |
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committer | Sidath Senanayake <sidaths@google.com> | 2021-05-13 22:24:36 +0100 |
commit | 5a274f2e8f890e674653f59eecb67a3529c6ed1b (patch) | |
tree | 248bf87f9af34f9347d5a52fd4117d616ff2d2aa /mali_kbase/platform/pixel/pixel_gpu_sysfs.c | |
parent | 85ddb9cc0f3e6e6518988906a73f4aa363e07407 (diff) | |
download | gpu-5a274f2e8f890e674653f59eecb67a3529c6ed1b.tar.gz |
mali_kbase: platform: dvfs: Add level lock for PowerHAL
Adds a new level lock class intended for use by PowerHAL
called `GPU_DVFS_LEVEL_LOCK_HINT`.
Bug: 188034128
Signed-off-by: Sidath Senanayake <sidaths@google.com>
Change-Id: I7eccdf1a838aad1e27e632043f8fe44b0411f897
Diffstat (limited to 'mali_kbase/platform/pixel/pixel_gpu_sysfs.c')
-rw-r--r-- | mali_kbase/platform/pixel/pixel_gpu_sysfs.c | 93 |
1 files changed, 93 insertions, 0 deletions
diff --git a/mali_kbase/platform/pixel/pixel_gpu_sysfs.c b/mali_kbase/platform/pixel/pixel_gpu_sysfs.c index c14d27a..9a32b7e 100644 --- a/mali_kbase/platform/pixel/pixel_gpu_sysfs.c +++ b/mali_kbase/platform/pixel/pixel_gpu_sysfs.c @@ -16,6 +16,7 @@ static const char *gpu_dvfs_level_lock_names[GPU_DVFS_LEVEL_LOCK_COUNT] = { "devicetree", "compute", + "hint", "sysfs", #ifdef CONFIG_MALI_PIXEL_GPU_THERMAL "thermal", @@ -393,6 +394,94 @@ static ssize_t scaling_min_compute_freq_show(struct device *dev, pc->dvfs.table[pc->dvfs.level_scaling_compute_min].clk[GPU_DVFS_CLK_SHADERS]); } +static ssize_t hint_max_freq_show(struct device *dev, struct device_attribute *attr, char *buf) +{ + struct kbase_device *kbdev = dev->driver_data; + struct pixel_context *pc = kbdev->platform_context; + int sysfs_lock_level; + + if (!pc) + return -ENODEV; + + sysfs_lock_level = pc->dvfs.level_locks[GPU_DVFS_LEVEL_LOCK_HINT].level_max; + if (sysfs_lock_level < 0) + sysfs_lock_level = pc->dvfs.level_max; + + return scnprintf(buf, PAGE_SIZE, "%d\n", + pc->dvfs.table[sysfs_lock_level].clk[GPU_DVFS_CLK_SHADERS]); +} + +static ssize_t hint_max_freq_store(struct device *dev, struct device_attribute *attr, + const char *buf, size_t count) +{ + int level, ret; + unsigned int clock; + struct kbase_device *kbdev = dev->driver_data; + struct pixel_context *pc = kbdev->platform_context; + + if (!pc) + return -ENODEV; + + ret = kstrtoint(buf, 0, &clock); + if (ret) + return -EINVAL; + + level = get_level_from_clock(kbdev, clock); + if (level < 0) + return -EINVAL; + + mutex_lock(&pc->dvfs.lock); + gpu_dvfs_update_level_lock(kbdev, GPU_DVFS_LEVEL_LOCK_HINT, -1, level); + gpu_dvfs_select_level(kbdev); + mutex_unlock(&pc->dvfs.lock); + + return count; +} + +static ssize_t hint_min_freq_show(struct device *dev, struct device_attribute *attr, char *buf) +{ + struct kbase_device *kbdev = dev->driver_data; + struct pixel_context *pc = kbdev->platform_context; + int sysfs_lock_level; + + if (!pc) + return -ENODEV; + + sysfs_lock_level = pc->dvfs.level_locks[GPU_DVFS_LEVEL_LOCK_HINT].level_min; + if (sysfs_lock_level < 0) + sysfs_lock_level = pc->dvfs.level_min; + + return scnprintf(buf, PAGE_SIZE, "%d\n", + pc->dvfs.table[sysfs_lock_level].clk[GPU_DVFS_CLK_SHADERS]); +} + +static ssize_t hint_min_freq_store(struct device *dev, struct device_attribute *attr, + const char *buf, size_t count) +{ + int ret, level; + unsigned int clock; + struct kbase_device *kbdev = dev->driver_data; + struct pixel_context *pc = kbdev->platform_context; + + if (!pc) + return -ENODEV; + + ret = kstrtoint(buf, 0, &clock); + if (ret) + return -EINVAL; + + level = get_level_from_clock(kbdev, clock); + if (level < 0) + return -EINVAL; + + mutex_lock(&pc->dvfs.lock); + gpu_dvfs_update_level_lock(kbdev, GPU_DVFS_LEVEL_LOCK_HINT, level, -1); + gpu_dvfs_select_level(kbdev); + mutex_unlock(&pc->dvfs.lock); + + return count; +} + static ssize_t scaling_max_freq_show(struct device *dev, struct device_attribute *attr, char *buf) { struct kbase_device *kbdev = dev->driver_data; @@ -591,6 +680,8 @@ DEVICE_ATTR_RO(cur_freq); DEVICE_ATTR_RO(max_freq); DEVICE_ATTR_RO(min_freq); DEVICE_ATTR_RO(scaling_min_compute_freq); +DEVICE_ATTR_RW(hint_max_freq); +DEVICE_ATTR_RW(hint_min_freq); DEVICE_ATTR_RW(scaling_max_freq); DEVICE_ATTR_RW(scaling_min_freq); DEVICE_ATTR_RO(time_in_state); @@ -621,6 +712,8 @@ static struct { { "max_freq", &dev_attr_max_freq }, { "min_freq", &dev_attr_min_freq }, { "min_compute_freq", &dev_attr_scaling_min_compute_freq }, + { "hint_max_freq", &dev_attr_hint_max_freq }, + { "hint_min_freq", &dev_attr_hint_min_freq }, { "scaling_max_freq", &dev_attr_scaling_max_freq }, { "scaling_min_freq", &dev_attr_scaling_min_freq }, { "time_in_state", &dev_attr_time_in_state }, |