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| author | Sidath Senanayake <sidaths@google.com> | 2021-02-18 13:33:37 +0000 |
|---|---|---|
| committer | Sidath Senanayake <sidaths@google.com> | 2021-04-09 14:12:05 +0100 |
| commit | 7d0cf853af75b22c0ef4181faa835eb5d8003af0 (patch) | |
| tree | b27c6d32440ad7dcf235af12b7897faf8879bf05 /mali_pixel/memory_group_manager.c | |
| parent | c78d565c7a031d8e7a3667fb8dfb3c092d9ef2bc (diff) | |
| download | gpu-7d0cf853af75b22c0ef4181faa835eb5d8003af0.tar.gz | |
mali_pixel: mgm: Write G3D register to enable IO coherency support
In order for the GPU to detect that the memory system supports
IO coherency (aka ACE Lite), we need to write a register in G3D.
We do this as part of MGM to keep the upstream Mali KMD unchanged.
Bug: 151952998
Bug: 168113578
Signed-off-by: Sidath Senanayake <sidaths@google.com>
Change-Id: I8d73759e322dbae5b3c61277a1d3871fcbef4bed
Diffstat (limited to 'mali_pixel/memory_group_manager.c')
| -rw-r--r-- | mali_pixel/memory_group_manager.c | 30 |
1 files changed, 23 insertions, 7 deletions
diff --git a/mali_pixel/memory_group_manager.c b/mali_pixel/memory_group_manager.c index 7d6422e..785324e 100644 --- a/mali_pixel/memory_group_manager.c +++ b/mali_pixel/memory_group_manager.c @@ -3,24 +3,26 @@ * memory_group_manager.c * * C) COPYRIGHT 2019 ARM Limited. All rights reserved. - * C) COPYRIGHT 2019-2020 Google LLC + * C) COPYRIGHT 2019-2021 Google LLC * */ /* Turn this on for more debug */ //#define DEBUG -#include <linux/fs.h> -#include <linux/of.h> -#include <linux/slab.h> -#include <linux/platform_device.h> -#include <linux/version.h> -#include <linux/module.h> #include <linux/atomic.h> #ifdef CONFIG_DEBUG_FS #include <linux/debugfs.h> #endif +#include <linux/fs.h> +#include <linux/io.h> #include <linux/mm.h> +#include <linux/module.h> +#include <linux/of.h> +#include <linux/platform_device.h> +#include <linux/slab.h> +#include <linux/version.h> + #include <linux/memory_group_manager.h> #include <soc/google/pt.h> @@ -583,6 +585,18 @@ static void mgm_term_data(struct mgm_groups *data) mgm_debugfs_term(data); } +static void mgm_initialize_g3d_regs() +{ + /* In order to advertise the availability of ACE Lite (IO coherency) to + * the GPU, we need to write a register in G3D. We write the value 1 to + * indicate that ACE Lite is available. + */ + #define G3D_COHERENCY_FEATURES_REG (0x1c420400) + void __iomem *g3d_coherency_features; + g3d_coherency_features = ioremap(G3D_COHERENCY_FEATURES_REG, 4); + __raw_writel(0x1, g3d_coherency_features); +} + static int memory_group_manager_probe(struct platform_device *pdev) { struct memory_group_manager_device *mgm_dev; @@ -615,6 +629,8 @@ static int memory_group_manager_probe(struct platform_device *pdev) return -ENOENT; } + mgm_initialize_g3d_regs(); + platform_set_drvdata(pdev, mgm_dev); dev_info(&pdev->dev, "Memory group manager probed successfully\n"); |