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Diffstat (limited to 'common/include/uapi/gpu/arm/midgard/csf/mali_kbase_csf_ioctl.h')
-rw-r--r--common/include/uapi/gpu/arm/midgard/csf/mali_kbase_csf_ioctl.h47
1 files changed, 45 insertions, 2 deletions
diff --git a/common/include/uapi/gpu/arm/midgard/csf/mali_kbase_csf_ioctl.h b/common/include/uapi/gpu/arm/midgard/csf/mali_kbase_csf_ioctl.h
index 237cc2e..337195a 100644
--- a/common/include/uapi/gpu/arm/midgard/csf/mali_kbase_csf_ioctl.h
+++ b/common/include/uapi/gpu/arm/midgard/csf/mali_kbase_csf_ioctl.h
@@ -40,10 +40,14 @@
* 1.4:
* - Replace padding in kbase_ioctl_cs_get_glb_iface with
* instr_features member of same size
+ * 1.5:
+ * - Add ioctl 40: kbase_ioctl_cs_queue_register_ex, this is a new
+ * queue registration call with extended format for supporting CS
+ * trace configurations with CSF trace_command.
*/
#define BASE_UK_VERSION_MAJOR 1
-#define BASE_UK_VERSION_MINOR 4
+#define BASE_UK_VERSION_MINOR 5
/**
* struct kbase_ioctl_version_check - Check version compatibility between
@@ -69,6 +73,9 @@ struct kbase_ioctl_version_check {
* @buffer_size: Size of the buffer in bytes
* @priority: Priority of the queue within a group when run within a process
* @padding: Currently unused, must be zero
+ *
+ * @Note: There is an identical sub-section in kbase_ioctl_cs_queue_register_ex.
+ * Any change of this struct should also be mirrored to the latter.
*/
struct kbase_ioctl_cs_queue_register {
__u64 buffer_gpu_addr;
@@ -120,7 +127,42 @@ union kbase_ioctl_cs_queue_bind {
#define KBASE_IOCTL_CS_QUEUE_BIND \
_IOWR(KBASE_IOCTL_TYPE, 39, union kbase_ioctl_cs_queue_bind)
-/* ioctl 40 is free to use */
+/**
+ * struct kbase_ioctl_cs_queue_register_ex - Register a GPU command queue with the
+ * base back-end in extended format,
+ * involving trace buffer configuration
+ *
+ * @buffer_gpu_addr: GPU address of the buffer backing the queue
+ * @buffer_size: Size of the buffer in bytes
+ * @priority: Priority of the queue within a group when run within a process
+ * @padding: Currently unused, must be zero
+ * @ex_offset_var_addr: GPU address of the trace buffer write offset variable
+ * @ex_buffer_base: Trace buffer GPU base address for the queue
+ * @ex_buffer_size: Size of the trace buffer in bytes
+ * @ex_event_size: Trace event write size, in log2 designation
+ * @ex_event_state: Trace event states configuration
+ * @ex_padding: Currently unused, must be zero
+ *
+ * @Note: There is an identical sub-section at the start of this struct to that
+ * of @ref kbase_ioctl_cs_queue_register. Any change of this sub-section
+ * must also be mirrored to the latter. Following the said sub-section,
+ * the remaining fields forms the extension, marked with ex_*.
+ */
+struct kbase_ioctl_cs_queue_register_ex {
+ __u64 buffer_gpu_addr;
+ __u32 buffer_size;
+ __u8 priority;
+ __u8 padding[3];
+ __u64 ex_offset_var_addr;
+ __u64 ex_buffer_base;
+ __u32 ex_buffer_size;
+ __u8 ex_event_size;
+ __u8 ex_event_state;
+ __u8 ex_padding[2];
+};
+
+#define KBASE_IOCTL_CS_QUEUE_REGISTER_EX \
+ _IOW(KBASE_IOCTL_TYPE, 40, struct kbase_ioctl_cs_queue_register_ex)
/**
* struct kbase_ioctl_cs_queue_terminate - Terminate a GPU command queue
@@ -314,6 +356,7 @@ struct kbase_ioctl_cs_tiler_heap_term {
* @out.total_stream_num: Total number of CSs, summed across all groups.
* @out.instr_features: Instrumentation features. Bits 7:4 hold the maximum
* size of events. Bits 3:0 hold the offset update rate.
+ * (csf >= 1.1.0)
*
*/
union kbase_ioctl_cs_get_glb_iface {