summaryrefslogtreecommitdiff
path: root/common/include/uapi/gpu/arm/midgard/mali_base_kernel.h
diff options
context:
space:
mode:
Diffstat (limited to 'common/include/uapi/gpu/arm/midgard/mali_base_kernel.h')
-rw-r--r--common/include/uapi/gpu/arm/midgard/mali_base_kernel.h109
1 files changed, 52 insertions, 57 deletions
diff --git a/common/include/uapi/gpu/arm/midgard/mali_base_kernel.h b/common/include/uapi/gpu/arm/midgard/mali_base_kernel.h
index e6cac0e..cb1a1e8 100644
--- a/common/include/uapi/gpu/arm/midgard/mali_base_kernel.h
+++ b/common/include/uapi/gpu/arm/midgard/mali_base_kernel.h
@@ -1,7 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
/*
*
- * (C) COPYRIGHT 2010-2022 ARM Limited. All rights reserved.
+ * (C) COPYRIGHT 2010-2023 ARM Limited. All rights reserved.
*
* This program is free software and is provided to you under the terms of the
* GNU General Public License version 2 as published by the Free Software
@@ -27,26 +27,31 @@
#define _UAPI_BASE_KERNEL_H_
#include <linux/types.h>
+#include "mali_gpu_props.h"
#include "mali_base_mem_priv.h"
#include "gpu/mali_kbase_gpu_id.h"
#include "gpu/mali_kbase_gpu_coherency.h"
-#define BASE_MAX_COHERENT_GROUPS 16
+#ifdef __KERNEL__
+#include <linux/mm.h>
#if defined(PAGE_MASK) && defined(PAGE_SHIFT)
#define LOCAL_PAGE_SHIFT PAGE_SHIFT
#define LOCAL_PAGE_LSB ~PAGE_MASK
#else
-#ifndef OSU_CONFIG_CPU_PAGE_SIZE_LOG2
-#define OSU_CONFIG_CPU_PAGE_SIZE_LOG2 12
+#error "Missing kernel definitions: PAGE_MASK, PAGE_SHIFT"
#endif
-#if defined(OSU_CONFIG_CPU_PAGE_SIZE_LOG2)
-#define LOCAL_PAGE_SHIFT OSU_CONFIG_CPU_PAGE_SIZE_LOG2
-#define LOCAL_PAGE_LSB ((1ul << OSU_CONFIG_CPU_PAGE_SIZE_LOG2) - 1)
#else
-#error Failed to find page size
+
+#if defined(MALI_PAGE_SIZE_AGNOSTIC)
+#define LOCAL_PAGE_SHIFT (__builtin_ctz((unsigned int)sysconf(_SC_PAGESIZE)))
+#else
+#define LOCAL_PAGE_SHIFT 12
#endif
+
+#define LOCAL_PAGE_LSB ((1ul << LOCAL_PAGE_SHIFT) - 1)
+
#endif
/* Physical memory group ID for normal usage.
@@ -71,21 +76,23 @@
*/
typedef __u32 base_mem_alloc_flags;
+#define BASE_MEM_FLAGS_MODIFIABLE_NATIVE (BASE_MEM_DONT_NEED)
+
+#define BASE_MEM_FLAGS_MODIFIABLE_IMPORTED_UMM (BASE_MEM_COHERENT_SYSTEM | BASE_MEM_COHERENT_LOCAL)
+
/* A mask for all the flags which are modifiable via the base_mem_set_flags
* interface.
*/
#define BASE_MEM_FLAGS_MODIFIABLE \
- (BASE_MEM_DONT_NEED | BASE_MEM_COHERENT_SYSTEM | \
- BASE_MEM_COHERENT_LOCAL)
+ (BASE_MEM_FLAGS_MODIFIABLE_NATIVE | BASE_MEM_FLAGS_MODIFIABLE_IMPORTED_UMM)
/* A mask of all the flags that can be returned via the base_mem_get_flags()
* interface.
*/
-#define BASE_MEM_FLAGS_QUERYABLE \
- (BASE_MEM_FLAGS_INPUT_MASK & ~(BASE_MEM_SAME_VA | \
- BASE_MEM_COHERENT_SYSTEM_REQUIRED | BASE_MEM_DONT_NEED | \
- BASE_MEM_IMPORT_SHARED | BASE_MEM_FLAGS_RESERVED | \
- BASEP_MEM_FLAGS_KERNEL_ONLY))
+#define BASE_MEM_FLAGS_QUERYABLE \
+ (BASE_MEM_FLAGS_INPUT_MASK & \
+ ~(BASE_MEM_SAME_VA | BASE_MEM_COHERENT_SYSTEM_REQUIRED | BASE_MEM_IMPORT_SHARED | \
+ BASE_MEM_FLAGS_RESERVED | BASEP_MEM_FLAGS_KERNEL_ONLY))
/**
* enum base_mem_import_type - Memory types supported by @a base_mem_import
@@ -127,22 +134,21 @@ struct base_mem_import_user_buffer {
};
/* Mask to detect 4GB boundary alignment */
-#define BASE_MEM_MASK_4GB 0xfffff000UL
+#define BASE_MEM_MASK_4GB 0xfffff000UL
/* Mask to detect 4GB boundary (in page units) alignment */
-#define BASE_MEM_PFN_MASK_4GB (BASE_MEM_MASK_4GB >> LOCAL_PAGE_SHIFT)
+#define BASE_MEM_PFN_MASK_4GB (BASE_MEM_MASK_4GB >> LOCAL_PAGE_SHIFT)
/* Limit on the 'extension' parameter for an allocation with the
* BASE_MEM_TILER_ALIGN_TOP flag set
*
* This is the same as the maximum limit for a Buffer Descriptor's chunk size
*/
-#define BASE_MEM_TILER_ALIGN_TOP_EXTENSION_MAX_PAGES_LOG2 \
- (21u - (LOCAL_PAGE_SHIFT))
-#define BASE_MEM_TILER_ALIGN_TOP_EXTENSION_MAX_PAGES \
+#define BASE_MEM_TILER_ALIGN_TOP_EXTENSION_MAX_PAGES_LOG2 (21u - (LOCAL_PAGE_SHIFT))
+#define BASE_MEM_TILER_ALIGN_TOP_EXTENSION_MAX_PAGES \
(1ull << (BASE_MEM_TILER_ALIGN_TOP_EXTENSION_MAX_PAGES_LOG2))
/* Bit mask of cookies used for memory allocation setup */
-#define KBASE_COOKIE_MASK ~1UL /* bit 0 is reserved */
+#define KBASE_COOKIE_MASK ~1UL /* bit 0 is reserved */
/* Maximum size allowed in a single KBASE_IOCTL_MEM_ALLOC call */
#define KBASE_MEM_ALLOC_MAX_SIZE ((8ull << 30) >> PAGE_SHIFT) /* 8 GB */
@@ -243,10 +249,7 @@ struct base_jit_alloc_info {
__u64 heap_info_gpu_addr;
};
-enum base_external_resource_access {
- BASE_EXT_RES_ACCESS_SHARED,
- BASE_EXT_RES_ACCESS_EXCLUSIVE
-};
+enum base_external_resource_access { BASE_EXT_RES_ACCESS_SHARED, BASE_EXT_RES_ACCESS_EXCLUSIVE };
struct base_external_resource {
__u64 ext_resource;
@@ -276,8 +279,6 @@ struct base_jd_debug_copy_buffer {
struct base_external_resource extres;
};
-#define GPU_MAX_JOB_SLOTS 16
-
/**
* DOC: User-side Base GPU Property Queries
*
@@ -402,8 +403,8 @@ struct mali_base_gpu_l2_cache_props {
};
struct mali_base_gpu_tiler_props {
- __u32 bin_size_bytes; /* Max is 4*2^15 */
- __u32 max_active_levels; /* Max is 2^15 */
+ __u32 bin_size_bytes; /* Max is 4*2^15 */
+ __u32 max_active_levels; /* Max is 2^15 */
};
/**
@@ -428,11 +429,11 @@ struct mali_base_gpu_thread_props {
__u32 max_threads;
__u32 max_workgroup_size;
__u32 max_barrier_size;
- __u16 max_registers;
+ __u32 max_registers;
__u8 max_task_queue;
__u8 max_thread_group_split;
__u8 impl_tech;
- __u8 padding[3];
+ __u8 padding;
__u32 tls_alloc;
};
@@ -591,24 +592,20 @@ struct base_gpu_props {
struct mali_base_gpu_coherent_group_info coherency_info;
};
-#define BASE_MEM_GROUP_ID_GET(flags) \
- ((flags & BASE_MEM_GROUP_ID_MASK) >> BASEP_MEM_GROUP_ID_SHIFT)
+#define BASE_MEM_GROUP_ID_GET(flags) ((flags & BASE_MEM_GROUP_ID_MASK) >> BASEP_MEM_GROUP_ID_SHIFT)
-#define BASE_MEM_GROUP_ID_SET(id) \
- (((base_mem_alloc_flags)((id < 0 || id >= BASE_MEM_GROUP_COUNT) ? \
- BASE_MEM_GROUP_DEFAULT : \
- id) \
- << BASEP_MEM_GROUP_ID_SHIFT) & \
+#define BASE_MEM_GROUP_ID_SET(id) \
+ (((base_mem_alloc_flags)((id < 0 || id >= BASE_MEM_GROUP_COUNT) ? BASE_MEM_GROUP_DEFAULT : \
+ id) \
+ << BASEP_MEM_GROUP_ID_SHIFT) & \
BASE_MEM_GROUP_ID_MASK)
-#define BASE_CONTEXT_MMU_GROUP_ID_SET(group_id) \
- (BASEP_CONTEXT_MMU_GROUP_ID_MASK & \
- ((base_context_create_flags)(group_id) \
- << BASEP_CONTEXT_MMU_GROUP_ID_SHIFT))
+#define BASE_CONTEXT_MMU_GROUP_ID_SET(group_id) \
+ (BASEP_CONTEXT_MMU_GROUP_ID_MASK & \
+ ((base_context_create_flags)(group_id) << BASEP_CONTEXT_MMU_GROUP_ID_SHIFT))
-#define BASE_CONTEXT_MMU_GROUP_ID_GET(flags) \
- ((flags & BASEP_CONTEXT_MMU_GROUP_ID_MASK) >> \
- BASEP_CONTEXT_MMU_GROUP_ID_SHIFT)
+#define BASE_CONTEXT_MMU_GROUP_ID_GET(flags) \
+ ((flags & BASEP_CONTEXT_MMU_GROUP_ID_MASK) >> BASEP_CONTEXT_MMU_GROUP_ID_SHIFT)
/*
* A number of bit flags are defined for requesting cpu_gpu_timeinfo. These
@@ -617,22 +614,20 @@ struct base_gpu_props {
*/
/* For monotonic (counter) timefield */
-#define BASE_TIMEINFO_MONOTONIC_FLAG (1UL << 0)
+#define BASE_TIMEINFO_MONOTONIC_FLAG (1U << 0)
/* For system wide timestamp */
-#define BASE_TIMEINFO_TIMESTAMP_FLAG (1UL << 1)
+#define BASE_TIMEINFO_TIMESTAMP_FLAG (1U << 1)
/* For GPU cycle counter */
-#define BASE_TIMEINFO_CYCLE_COUNTER_FLAG (1UL << 2)
+#define BASE_TIMEINFO_CYCLE_COUNTER_FLAG (1U << 2)
/* Specify kernel GPU register timestamp */
-#define BASE_TIMEINFO_KERNEL_SOURCE_FLAG (1UL << 30)
+#define BASE_TIMEINFO_KERNEL_SOURCE_FLAG (1U << 30)
/* Specify userspace cntvct_el0 timestamp source */
-#define BASE_TIMEINFO_USER_SOURCE_FLAG (1UL << 31)
-
-#define BASE_TIMEREQUEST_ALLOWED_FLAGS (\
- BASE_TIMEINFO_MONOTONIC_FLAG | \
- BASE_TIMEINFO_TIMESTAMP_FLAG | \
- BASE_TIMEINFO_CYCLE_COUNTER_FLAG | \
- BASE_TIMEINFO_KERNEL_SOURCE_FLAG | \
- BASE_TIMEINFO_USER_SOURCE_FLAG)
+#define BASE_TIMEINFO_USER_SOURCE_FLAG (1U << 31)
+
+#define BASE_TIMEREQUEST_ALLOWED_FLAGS \
+ (BASE_TIMEINFO_MONOTONIC_FLAG | BASE_TIMEINFO_TIMESTAMP_FLAG | \
+ BASE_TIMEINFO_CYCLE_COUNTER_FLAG | BASE_TIMEINFO_KERNEL_SOURCE_FLAG | \
+ BASE_TIMEINFO_USER_SOURCE_FLAG)
/* Maximum number of source allocations allowed to create an alias allocation.
* This needs to be 4096 * 6 to allow cube map arrays with up to 4096 array
generated by cgit v1.2.3 (git 2.25.1) at 2024-07-26 12:36:54 +0000