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Diffstat (limited to 'mali_kbase/backend/gpu/mali_kbase_model_dummy.c')
-rw-r--r--mali_kbase/backend/gpu/mali_kbase_model_dummy.c56
1 files changed, 8 insertions, 48 deletions
diff --git a/mali_kbase/backend/gpu/mali_kbase_model_dummy.c b/mali_kbase/backend/gpu/mali_kbase_model_dummy.c
index c340760..b034ffe 100644
--- a/mali_kbase/backend/gpu/mali_kbase_model_dummy.c
+++ b/mali_kbase/backend/gpu/mali_kbase_model_dummy.c
@@ -1,7 +1,7 @@
// SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note
/*
*
- * (C) COPYRIGHT 2014-2023 ARM Limited. All rights reserved.
+ * (C) COPYRIGHT 2014-2024 ARM Limited. All rights reserved.
*
* This program is free software and is provided to you under the terms of the
* GNU General Public License version 2 as published by the Free Software
@@ -25,42 +25,8 @@
* insmod'ing mali_kbase.ko with no arguments after a build with "scons
* gpu=tXYZ" will yield the expected GPU ID for tXYZ. This can always be
* overridden by passing the 'no_mali_gpu' argument to insmod.
- *
- * - if CONFIG_MALI_ERROR_INJECT is defined the error injection system is
- * activated.
*/
-/* Implementation of failure injection system:
- *
- * Error conditions are generated by gpu_generate_error().
- * According to CONFIG_MALI_ERROR_INJECT definition gpu_generate_error() either
- * generates an error HW condition randomly (CONFIG_MALI_ERROR_INJECT_RANDOM) or
- * checks if there is (in error_track_list) an error configuration to be set for
- * the current job chain (CONFIG_MALI_ERROR_INJECT_RANDOM not defined).
- * Each error condition will trigger a specific "state" for a certain set of
- * registers as per Midgard Architecture Specifications doc.
- *
- * According to Midgard Architecture Specifications doc the following registers
- * are always affected by error conditions:
- *
- * JOB Exception:
- * JOB_IRQ_RAWSTAT
- * JOB<n> STATUS AREA
- *
- * MMU Exception:
- * MMU_IRQ_RAWSTAT
- * AS<n>_FAULTSTATUS
- * AS<n>_FAULTADDRESS
- *
- * GPU Exception:
- * GPU_IRQ_RAWSTAT
- * GPU_FAULTSTATUS
- * GPU_FAULTADDRESS
- *
- * For further clarification on the model behaviour upon specific error
- * conditions the user may refer to the Midgard Architecture Specification
- * document
- */
#include <mali_kbase.h>
#include <device/mali_kbase_device.h>
#include <hw_access/mali_kbase_hw_access_regmap.h>
@@ -126,7 +92,7 @@ struct error_status_t hw_error_status;
*/
struct control_reg_values_t {
const char *name;
- u32 gpu_id;
+ u64 gpu_id;
u32 as_present;
u32 thread_max_threads;
u32 thread_max_workgroup_size;
@@ -524,7 +490,7 @@ MODULE_PARM_DESC(no_mali_gpu, "GPU to identify as");
static u32 gpu_model_get_prfcnt_value(enum kbase_ipa_core_type core_type, u32 cnt_idx,
bool is_low_word)
{
- u64 *counters_data;
+ u64 *counters_data = NULL;
u32 core_count = 0;
u32 event_index;
u64 value = 0;
@@ -580,6 +546,9 @@ static u32 gpu_model_get_prfcnt_value(enum kbase_ipa_core_type core_type, u32 cn
break;
}
+ if (unlikely(counters_data == NULL))
+ return 0;
+
for (core = 0; core < core_count; core++) {
value += counters_data[event_index];
event_index += KBASE_DUMMY_MODEL_COUNTER_PER_CORE;
@@ -1172,9 +1141,6 @@ static void midgard_model_update(void *h)
/*this job is done assert IRQ lines */
signal_int(dummy, i);
-#ifdef CONFIG_MALI_ERROR_INJECT
- midgard_set_error(i);
-#endif /* CONFIG_MALI_ERROR_INJECT */
update_register_statuses(dummy, i);
/*if this job slot returned failures we cannot use it */
if (hw_error_status.job_irq_rawstat & (1u << (i + 16))) {
@@ -1564,6 +1530,7 @@ void midgard_model_write_reg(void *h, u32 addr, u32 value)
case L2_PWROFF_HI:
case PWR_KEY:
case PWR_OVERRIDE0:
+ case PWR_OVERRIDE1:
#if MALI_USE_CSF
case SHADER_PWRFEATURES:
case CSF_CONFIG:
@@ -1607,8 +1574,7 @@ void midgard_model_read_reg(void *h, u32 addr, u32 *const value)
#else /* !MALI_USE_CSF */
if (addr == GPU_CONTROL_REG(GPU_ID)) {
#endif /* !MALI_USE_CSF */
-
- *value = dummy->control_reg_values->gpu_id;
+ *value = dummy->control_reg_values->gpu_id & U32_MAX;
} else if (addr == JOB_CONTROL_REG(JOB_IRQ_RAWSTAT)) {
*value = hw_error_status.job_irq_rawstat;
pr_debug("%s", "JS_IRQ_RAWSTAT being read");
@@ -2166,9 +2132,3 @@ int gpu_model_control(void *model, struct kbase_model_control_params *params)
return 0;
}
-
-u64 midgard_model_arch_timer_get_cntfrq(void *h)
-{
- CSTD_UNUSED(h);
- return arch_timer_get_cntfrq();
-}