diff options
Diffstat (limited to 'mali_kbase/mali_kbase_config_defaults.h')
-rw-r--r-- | mali_kbase/mali_kbase_config_defaults.h | 44 |
1 files changed, 37 insertions, 7 deletions
diff --git a/mali_kbase/mali_kbase_config_defaults.h b/mali_kbase/mali_kbase_config_defaults.h index 18e40b5..60fe2ce 100644 --- a/mali_kbase/mali_kbase_config_defaults.h +++ b/mali_kbase/mali_kbase_config_defaults.h @@ -89,6 +89,18 @@ enum { KBASE_3BIT_AID_4 = 0x7 }; +#if MALI_USE_CSF +/* + * Default value for the TIMER register of the IPA Control interface, + * expressed in milliseconds. + * + * The chosen value is a trade off between two requirements: the IPA Control + * interface should sample counters with a resolution in the order of + * milliseconds, while keeping GPU overhead as limited as possible. + */ +#define IPA_CONTROL_TIMER_DEFAULT_VALUE_MS ((u32)10) /* 10 milliseconds */ +#endif /* MALI_USE_CSF */ + /* Default period for DVFS sampling (can be overridden by platform header) */ #ifndef DEFAULT_PM_DVFS_PERIOD #define DEFAULT_PM_DVFS_PERIOD 100 /* 100ms */ @@ -158,11 +170,6 @@ enum { */ #define DEFAULT_JS_RESET_TICKS_DUMPING (15020) /* 1502s */ -/* Default number of milliseconds given for other jobs on the GPU to be - * soft-stopped when the GPU needs to be reset. - */ -#define DEFAULT_RESET_TIMEOUT_MS (3000) /* 3s */ - /* Nominal reference frequency that was used to obtain all following * <...>_TIMEOUT_CYCLES macros, in kHz. * @@ -180,7 +187,7 @@ enum { * Based on 75000ms timeout at nominal 100MHz, as is required for Android - based * on scaling from a 50MHz GPU system. */ -#define CSF_FIRMWARE_TIMEOUT_CYCLES (7500000000) +#define CSF_FIRMWARE_TIMEOUT_CYCLES (7500000000ull) /* Timeout in clock cycles for GPU Power Management to reach the desired * Shader, L2 and MCU state. @@ -191,10 +198,28 @@ enum { /* Waiting timeout in clock cycles for GPU reset to complete. * - * Based on 2500ms timeout at 100MHz, scaled from a 50MHz GPU system. + * Based on 2500ms timeout at 100MHz, scaled from a 50MHz GPU system */ #define CSF_GPU_RESET_TIMEOUT_CYCLES (250000000) +/* Waiting timeout in clock cycles for all active CSGs to be suspended. + * + * Based on 1500ms timeout at 100MHz, scaled from a 50MHz GPU system. + */ +#define CSF_CSG_SUSPEND_TIMEOUT_CYCLES (150000000) + +/* Waiting timeout in clock cycles for GPU firmware to boot. + * + * Based on 250ms timeout at 100MHz, scaled from a 50MHz GPU system. + */ +#define CSF_FIRMWARE_BOOT_TIMEOUT_CYCLES (25000000) + +/* Waiting timeout for a ping request to be acknowledged, in clock cycles. + * + * Based on 6000ms timeout at 100MHz, scaled from a 50MHz GPU system. + */ +#define CSF_FIRMWARE_PING_TIMEOUT_CYCLES (600000000ull) + #else /* MALI_USE_CSF */ /* A default timeout in clock cycles to be used when an invalid timeout @@ -202,6 +227,11 @@ enum { */ #define JM_DEFAULT_TIMEOUT_CYCLES (150000000) +/* Default number of milliseconds given for other jobs on the GPU to be + * soft-stopped when the GPU needs to be reset. + */ +#define JM_DEFAULT_RESET_TIMEOUT_MS (3000) /* 3s */ + #endif /* MALI_USE_CSF */ /* Default timeslice that a context is scheduled in for, in nanoseconds. |