From bce5281a0408a175137c08dc93028e2a2c0fb69b Mon Sep 17 00:00:00 2001 From: Toby Sunrise Date: Mon, 1 May 2023 13:31:16 +0000 Subject: Mali Valhall Android DDK r43p0-01eac0 KMD Provenance: 48a9c7e25986318c8475bc245de51e7bec2606e8 (ipdelivery/EAC/v_r43p0) VX504X08X-BU-00000-r43p0-01eac0 - Valhall Android DDK VX504X08X-BU-60000-r43p0-01eac0 - Valhall Android Document Bundle VX504X08X-DC-11001-r43p0-01eac0 - Valhall Android DDK Software Errata VX504X08X-SW-99006-r43p0-01eac0 - Valhall Android Renderscript AOSP parts Change-Id: I5df1914eba386e0bf507d4951240e1744f666a29 --- common/include/linux/version_compat_defs.h | 30 +++++++++++++++++++++- .../midgard/backend/gpu/mali_kbase_model_linux.h | 12 ++++----- .../gpu/arm/midgard/csf/mali_base_csf_kernel.h | 3 +++ .../gpu/arm/midgard/csf/mali_kbase_csf_ioctl.h | 6 +++-- .../gpu/backend/mali_kbase_gpu_regmap_csf.h | 11 ++++++++ .../midgard/gpu/backend/mali_kbase_gpu_regmap_jm.h | 4 +++ .../gpu/arm/midgard/gpu/mali_kbase_gpu_regmap.h | 7 +++++ .../uapi/gpu/arm/midgard/jm/mali_kbase_jm_ioctl.h | 6 +++-- 8 files changed, 67 insertions(+), 12 deletions(-) (limited to 'common') diff --git a/common/include/linux/version_compat_defs.h b/common/include/linux/version_compat_defs.h index 335147c..c9b1f62 100644 --- a/common/include/linux/version_compat_defs.h +++ b/common/include/linux/version_compat_defs.h @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ /* * - * (C) COPYRIGHT 2022 ARM Limited. All rights reserved. + * (C) COPYRIGHT 2022-2023 ARM Limited. All rights reserved. * * This program is free software and is provided to you under the terms of the * GNU General Public License version 2 as published by the Free Software @@ -48,4 +48,32 @@ typedef unsigned int __poll_t; #endif +#if KERNEL_VERSION(6, 1, 0) <= LINUX_VERSION_CODE +/* This is defined inside kbase for matching the default to kernel's + * mmap_min_addr, used inside file mali_kbase_mmap.c. + * Note: the value is set at compile time, matching a kernel's configuration + * value. It would not be able to track any runtime update of mmap_min_addr. + */ +#ifdef CONFIG_MMU +#define kbase_mmap_min_addr CONFIG_DEFAULT_MMAP_MIN_ADDR + +#ifdef CONFIG_LSM_MMAP_MIN_ADDR +#if (CONFIG_LSM_MMAP_MIN_ADDR > CONFIG_DEFAULT_MMAP_MIN_ADDR) +/* Replace the default definition with CONFIG_LSM_MMAP_MIN_ADDR */ +#undef kbase_mmap_min_addr +#define kbase_mmap_min_addr CONFIG_LSM_MMAP_MIN_ADDR +#pragma message "kbase_mmap_min_addr compiled to CONFIG_LSM_MMAP_MIN_ADDR, no runtime update!" +#endif /* (CONFIG_LSM_MMAP_MIN_ADDR > CONFIG_DEFAULT_MMAP_MIN_ADDR) */ +#endif /* CONFIG_LSM_MMAP_MIN_ADDR */ + +#if (kbase_mmap_min_addr == CONFIG_DEFAULT_MMAP_MIN_ADDR) +#pragma message "kbase_mmap_min_addr compiled to CONFIG_DEFAULT_MMAP_MIN_ADDR, no runtime update!" +#endif + +#else /* CONFIG_MMU */ +#define kbase_mmap_min_addr (0UL) +#pragma message "kbase_mmap_min_addr compiled to (0UL), no runtime update!" +#endif /* CONFIG_MMU */ +#endif /* KERNEL_VERSION(6, 1, 0) <= LINUX_VERSION_CODE */ + #endif /* _VERSION_COMPAT_DEFS_H_ */ diff --git a/common/include/uapi/gpu/arm/midgard/backend/gpu/mali_kbase_model_linux.h b/common/include/uapi/gpu/arm/midgard/backend/gpu/mali_kbase_model_linux.h index 69bc44c..c83cedd 100644 --- a/common/include/uapi/gpu/arm/midgard/backend/gpu/mali_kbase_model_linux.h +++ b/common/include/uapi/gpu/arm/midgard/backend/gpu/mali_kbase_model_linux.h @@ -27,12 +27,10 @@ #define _UAPI_KBASE_MODEL_LINUX_H_ /* Generic model IRQs */ -enum model_linux_irqs { - MODEL_LINUX_JOB_IRQ, - MODEL_LINUX_GPU_IRQ, - MODEL_LINUX_MMU_IRQ, - MODEL_LINUX_NONE_IRQ, - MODEL_LINUX_NUM_TYPE_IRQ -}; +#define MODEL_LINUX_JOB_IRQ (0x1 << 0) +#define MODEL_LINUX_GPU_IRQ (0x1 << 1) +#define MODEL_LINUX_MMU_IRQ (0x1 << 2) + +#define MODEL_LINUX_IRQ_MASK (MODEL_LINUX_JOB_IRQ | MODEL_LINUX_GPU_IRQ | MODEL_LINUX_MMU_IRQ) #endif /* _UAPI_KBASE_MODEL_LINUX_H_ */ diff --git a/common/include/uapi/gpu/arm/midgard/csf/mali_base_csf_kernel.h b/common/include/uapi/gpu/arm/midgard/csf/mali_base_csf_kernel.h index ec8c02f..c18c6fc 100644 --- a/common/include/uapi/gpu/arm/midgard/csf/mali_base_csf_kernel.h +++ b/common/include/uapi/gpu/arm/midgard/csf/mali_base_csf_kernel.h @@ -145,6 +145,9 @@ #define BASE_CSF_TILER_OOM_EXCEPTION_FLAG (1u << 0) #define BASE_CSF_EXCEPTION_HANDLER_FLAGS_MASK (BASE_CSF_TILER_OOM_EXCEPTION_FLAG) +/* Initial value for LATEST_FLUSH register */ +#define POWER_DOWN_LATEST_FLUSH_VALUE ((uint32_t)1) + /** * enum base_kcpu_command_type - Kernel CPU queue command type. * @BASE_KCPU_COMMAND_TYPE_FENCE_SIGNAL: fence_signal, diff --git a/common/include/uapi/gpu/arm/midgard/csf/mali_kbase_csf_ioctl.h b/common/include/uapi/gpu/arm/midgard/csf/mali_kbase_csf_ioctl.h index 642ca34..7c37cfc 100644 --- a/common/include/uapi/gpu/arm/midgard/csf/mali_kbase_csf_ioctl.h +++ b/common/include/uapi/gpu/arm/midgard/csf/mali_kbase_csf_ioctl.h @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ /* * - * (C) COPYRIGHT 2020-2022 ARM Limited. All rights reserved. + * (C) COPYRIGHT 2020-2023 ARM Limited. All rights reserved. * * This program is free software and is provided to you under the terms of the * GNU General Public License version 2 as published by the Free Software @@ -79,11 +79,13 @@ * - prfcnt_block_metadata::block_idx gaps. * - PRFCNT_CONTROL_CMD_SAMPLE_ASYNC is removed. * 1.18: + * - Relax the requirement to create a mapping with BASE_MEM_MAP_TRACKING_HANDLE + * before allocating GPU memory for the context. * - CPU mappings of USER_BUFFER imported memory handles must be cached. */ #define BASE_UK_VERSION_MAJOR 1 -#define BASE_UK_VERSION_MINOR 17 +#define BASE_UK_VERSION_MINOR 18 /** * struct kbase_ioctl_version_check - Check version compatibility between diff --git a/common/include/uapi/gpu/arm/midgard/gpu/backend/mali_kbase_gpu_regmap_csf.h b/common/include/uapi/gpu/arm/midgard/gpu/backend/mali_kbase_gpu_regmap_csf.h index 75ae6a1..0ca5d90 100644 --- a/common/include/uapi/gpu/arm/midgard/gpu/backend/mali_kbase_gpu_regmap_csf.h +++ b/common/include/uapi/gpu/arm/midgard/gpu/backend/mali_kbase_gpu_regmap_csf.h @@ -27,4 +27,15 @@ #define IPA_CONTROL_REG(r) (IPA_CONTROL_BASE + (r)) #define STATUS 0x004 /* (RO) Status register */ +/* USER base address */ +#define USER_BASE 0x0010000 +#define USER_REG(r) (USER_BASE + (r)) + +/* USER register offsets */ +#define LATEST_FLUSH 0x0000 /* () Flush ID of latest clean-and-invalidate operation */ + +/* DOORBELLS base address */ +#define DOORBELLS_BASE 0x0080000 +#define DOORBELLS_REG(r) (DOORBELLS_BASE + (r)) + #endif /* _UAPI_KBASE_GPU_REGMAP_CSF_H_ */ diff --git a/common/include/uapi/gpu/arm/midgard/gpu/backend/mali_kbase_gpu_regmap_jm.h b/common/include/uapi/gpu/arm/midgard/gpu/backend/mali_kbase_gpu_regmap_jm.h index 87f849d..9bfd6d2 100644 --- a/common/include/uapi/gpu/arm/midgard/gpu/backend/mali_kbase_gpu_regmap_jm.h +++ b/common/include/uapi/gpu/arm/midgard/gpu/backend/mali_kbase_gpu_regmap_jm.h @@ -43,4 +43,8 @@ #define JS_CONFIG_NEXT 0x58 /* (RW) Next configuration settings for job slot n */ #define JS_COMMAND_NEXT 0x60 /* (RW) Next command register for job slot n */ +#define JOB_SLOT0 0x800 /* Configuration registers for job slot 0 */ + +#define JOB_SLOT_REG(n, r) (JOB_CONTROL_REG(JOB_SLOT0 + ((n) << 7)) + (r)) + #endif /* _UAPI_KBASE_GPU_REGMAP_JM_H_ */ diff --git a/common/include/uapi/gpu/arm/midgard/gpu/mali_kbase_gpu_regmap.h b/common/include/uapi/gpu/arm/midgard/gpu/mali_kbase_gpu_regmap.h index cdfcf8d..1f33167 100644 --- a/common/include/uapi/gpu/arm/midgard/gpu/mali_kbase_gpu_regmap.h +++ b/common/include/uapi/gpu/arm/midgard/gpu/mali_kbase_gpu_regmap.h @@ -36,6 +36,9 @@ #define GPU_ID 0x000 /* (RO) GPU and revision identifier */ +#define GPU_IRQ_CLEAR 0x024 /* (WO) */ +#define GPU_IRQ_STATUS 0x02C /* (RO) */ + #define SHADER_READY_LO 0x140 /* (RO) Shader core ready bitmap, low word */ #define SHADER_READY_HI 0x144 /* (RO) Shader core ready bitmap, high word */ @@ -62,6 +65,7 @@ #define JOB_IRQ_CLEAR 0x004 /* Interrupt clear register */ #define JOB_IRQ_MASK 0x008 /* Interrupt mask register */ +#define JOB_IRQ_STATUS 0x00C /* Interrupt status register */ /* MMU control registers */ @@ -70,6 +74,9 @@ #define MMU_REG(r) (MEMORY_MANAGEMENT_BASE + (r)) #define MMU_IRQ_RAWSTAT 0x000 /* (RW) Raw interrupt status register */ +#define MMU_IRQ_CLEAR 0x004 /* (WO) Interrupt clear register */ +#define MMU_IRQ_MASK 0x008 /* (RW) Interrupt mask register */ +#define MMU_IRQ_STATUS 0x00C /* (RO) Interrupt status register */ #define MMU_AS0 0x400 /* Configuration registers for address space 0 */ diff --git a/common/include/uapi/gpu/arm/midgard/jm/mali_kbase_jm_ioctl.h b/common/include/uapi/gpu/arm/midgard/jm/mali_kbase_jm_ioctl.h index 902d0ce..ac6affe 100644 --- a/common/include/uapi/gpu/arm/midgard/jm/mali_kbase_jm_ioctl.h +++ b/common/include/uapi/gpu/arm/midgard/jm/mali_kbase_jm_ioctl.h @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ /* * - * (C) COPYRIGHT 2020-2022 ARM Limited. All rights reserved. + * (C) COPYRIGHT 2020-2023 ARM Limited. All rights reserved. * * This program is free software and is provided to you under the terms of the * GNU General Public License version 2 as published by the Free Software @@ -140,10 +140,12 @@ * - prfcnt_block_metadata::block_idx gaps. * - PRFCNT_CONTROL_CMD_SAMPLE_ASYNC is removed. * 11.38: + * - Relax the requirement to create a mapping with BASE_MEM_MAP_TRACKING_HANDLE + * before allocating GPU memory for the context. * - CPU mappings of USER_BUFFER imported memory handles must be cached. */ #define BASE_UK_VERSION_MAJOR 11 -#define BASE_UK_VERSION_MINOR 37 +#define BASE_UK_VERSION_MINOR 38 /** * struct kbase_ioctl_version_check - Check version compatibility between -- cgit v1.2.3