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/* SPDX-License-Identifier: GPL-2.0 */
/*
*
* (C) COPYRIGHT 2019-2021 ARM Limited. All rights reserved.
*
* This program is free software and is provided to you under the terms of the
* GNU General Public License version 2 as published by the Free Software
* Foundation, and any use by you of this program is subject to the terms
* of such GNU license.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, you can access it online at
* http://www.gnu.org/licenses/gpl-2.0.html.
*
*/
/*
* This header was autogenerated, it should not be edited.
*/
#ifndef _UAPI_GPU_CSF_CONTROL_REGISTERS_H_
#define _UAPI_GPU_CSF_CONTROL_REGISTERS_H_
/* GPU_REGISTERS register offsets */
#define GPU_CONTROL_MCU 0x3000 /* () MCU control registers */
#endif /* _UAPI_GPU_CSF_CONTROL_REGISTERS_H_ */
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