diff options
Diffstat (limited to 'gxp-lpm.h')
| -rw-r--r-- | gxp-lpm.h | 91 |
1 files changed, 52 insertions, 39 deletions
@@ -10,15 +10,9 @@ #include <linux/types.h> +#include "gxp-config.h" #include "gxp.h" -enum lpm_psm_csrs { - LPM_REG_ENABLE_STATE_0 = 0x080, - LPM_REG_ENABLE_STATE_1 = 0x180, - LPM_REG_ENABLE_STATE_2 = 0x280, - LPM_REG_ENABLE_STATE_3 = 0x380, -}; - enum lpm_state { LPM_ACTIVE_STATE = 0, LPM_CG_STATE = 1, @@ -26,15 +20,19 @@ enum lpm_state { LPM_PG_STATE = 3, }; -#define LPM_STATE_TABLE_SIZE (LPM_REG_ENABLE_STATE_1 - LPM_REG_ENABLE_STATE_0) +enum psm_reg_offset { + PSM_REG_ENABLE_STATE0_OFFSET, + PSM_REG_ENABLE_STATE1_OFFSET, + PSM_REG_ENABLE_STATE2_OFFSET, + PSM_REG_ENABLE_STATE3_OFFSET, + PSM_REG_START_OFFSET, + PSM_REG_STATUS_OFFSET, + PSM_REG_CFG_OFFSET, +}; #define LPM_INSTRUCTION_OFFSET 0x00000944 #define LPM_INSTRUCTION_MASK 0x03000000 -/* - * The TOP PSM comes immediately after the last PSM of core, so define its PSM - * number in terms of the number of cores. - */ -#define LPM_TOP_PSM GXP_NUM_CORES + #define LPM_HW_MODE 0 #define LPM_SW_PSM_MODE 1 @@ -42,10 +40,6 @@ enum lpm_state { #define CORE_WAKEUP_DOORBELL(__core__) (0 + (__core__)) -#define AUR_DVFS_DOMAIN 17 -#define AUR_DVFS_DEBUG_REQ (1 << 31) -#define AUR_DEBUG_CORE_FREQ (AUR_DVFS_DEBUG_REQ | (3 << 27)) - #define PSM_INIT_DONE_MASK 0x80 #define PSM_CURR_STATE_MASK 0x0F #define PSM_STATE_VALID_MASK 0x10 @@ -75,71 +69,90 @@ void gxp_lpm_down(struct gxp_dev *gxp, uint core); * Return whether the specified PSM is initialized. * PSM0-PSM3 are for core0-core3, PSM4 is the TOP LPM. */ -bool gxp_lpm_is_initialized(struct gxp_dev *gxp, uint psm); +bool gxp_lpm_is_initialized(struct gxp_dev *gxp, enum gxp_lpm_psm psm); /* * Return whether the specified PSM is powered. */ -bool gxp_lpm_is_powered(struct gxp_dev *gxp, uint psm); +bool gxp_lpm_is_powered(struct gxp_dev *gxp, enum gxp_lpm_psm psm); /* * Wait for the specified @psm to be in any state other than @state * Return whether the waiting is successful or the timeout occurs. */ -bool gxp_lpm_wait_state_ne(struct gxp_dev *gxp, uint psm, uint state); +bool gxp_lpm_wait_state_ne(struct gxp_dev *gxp, enum gxp_lpm_psm psm, uint state); /* * Wait for the specified @psm to be in the specified @state * Return whether the waiting is successful or the timeout occurs. */ -bool gxp_lpm_wait_state_eq(struct gxp_dev *gxp, uint psm, uint state); +bool gxp_lpm_wait_state_eq(struct gxp_dev *gxp, enum gxp_lpm_psm psm, uint state); /* * Force a state transition on the specified PSM. */ -int gxp_lpm_set_state(struct gxp_dev *gxp, uint psm, uint target_state, +int gxp_lpm_set_state(struct gxp_dev *gxp, enum gxp_lpm_psm psm, uint target_state, bool verbose); /* * Get current LPM state of the specified PSM. */ -uint gxp_lpm_get_state(struct gxp_dev *gxp, uint psm); +uint gxp_lpm_get_state(struct gxp_dev *gxp, enum gxp_lpm_psm psm); /* * Enable a state on the specified PSM. */ -void gxp_lpm_enable_state(struct gxp_dev *gxp, uint psm, uint state); +void gxp_lpm_enable_state(struct gxp_dev *gxp, enum gxp_lpm_psm psm, uint state); static inline u32 lpm_read_32(struct gxp_dev *gxp, uint reg_offset) { - uint offset = GXP_LPM_BASE + reg_offset; - - return gxp_read_32(gxp, offset); +#ifndef GXP_SEPARATE_LPM_OFFSET + reg_offset = GXP_LPM_BASE + reg_offset; +#endif + return readl(gxp->lpm_regs.vaddr + reg_offset); } static inline void lpm_write_32(struct gxp_dev *gxp, uint reg_offset, u32 value) { - uint offset = GXP_LPM_BASE + reg_offset; +#ifndef GXP_SEPARATE_LPM_OFFSET + reg_offset = GXP_LPM_BASE + reg_offset; +#endif + writel(value, gxp->lpm_regs.vaddr + reg_offset); +} - gxp_write_32(gxp, offset, value); +static u32 get_reg_offset(struct gxp_dev *gxp, enum psm_reg_offset reg_offset, enum gxp_lpm_psm psm) +{ + switch (reg_offset) { + case PSM_REG_ENABLE_STATE0_OFFSET: + case PSM_REG_ENABLE_STATE1_OFFSET: + case PSM_REG_ENABLE_STATE2_OFFSET: + case PSM_REG_ENABLE_STATE3_OFFSET: + return gxp_lpm_psm_get_state_offset(psm, (uint)reg_offset); + case PSM_REG_START_OFFSET: + return gxp_lpm_psm_get_start_offset(psm); + case PSM_REG_STATUS_OFFSET: + return gxp_lpm_psm_get_status_offset(psm); + case PSM_REG_CFG_OFFSET: + return gxp_lpm_psm_get_cfg_offset(psm); + } + + return 0; } -static inline u32 lpm_read_32_psm(struct gxp_dev *gxp, uint psm, - uint reg_offset) +static inline u32 lpm_read_32_psm(struct gxp_dev *gxp, enum gxp_lpm_psm psm, + enum psm_reg_offset reg_offset) { - uint offset = - GXP_LPM_PSM_0_BASE + (GXP_LPM_PSM_SIZE * psm) + reg_offset; + uint offset = get_reg_offset(gxp, reg_offset, psm); - return gxp_read_32(gxp, offset); + return lpm_read_32(gxp, offset); } -static inline void lpm_write_32_psm(struct gxp_dev *gxp, uint psm, - uint reg_offset, u32 value) +static inline void lpm_write_32_psm(struct gxp_dev *gxp, enum gxp_lpm_psm psm, + enum psm_reg_offset reg_offset, u32 value) { - uint offset = - GXP_LPM_PSM_0_BASE + (GXP_LPM_PSM_SIZE * psm) + reg_offset; + u32 offset = get_reg_offset(gxp, reg_offset, psm); - gxp_write_32(gxp, offset, value); + lpm_write_32(gxp, offset, value); } #endif /* __GXP_LPM_H__ */ |