1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
|
// SPDX-License-Identifier: GPL-2.0-only
/*
* ZUMA Mali GPU device tree source
*
* Copyright 2022 Google LLC
*
*/
/ {
mali_mgm: physical-memory-group-manager {
compatible = "arm,physical-memory-group-manager";
/* Memory groups */
groups =
"gpu_g0",
"gpu_g1";
/* Base partition index for each group */
group_base_pt = <0 10>;
/* Number of partitions for each group */
group_pt_num = <10 1>;
/* SLC partitions */
pt_id =
"gpu_g0_p0",
"gpu_g0_p1",
"gpu_g0_p2",
"gpu_g0_p3",
"gpu_g0_p4",
"gpu_g0_p5",
"gpu_g0_p6",
"gpu_g0_p7",
"gpu_g0_p8",
"gpu_g0_p9",
"gpu_g1_p0";
/* SLC partition sizes KB */
pt_size = <512 1024 1536 2048 3072 4096 6144 8192 12288 16384 16384>;
};
mali_pma: protected-memory-allocator {
compatible = "arm,protected-memory-allocator";
};
mali: mali@1F000000 {
compatible = "arm,malit6xx";
reg = <0x0 0x1F000000 0x1000000>;
l2-hash-values = <0x0036DB6D 0x005B6DB6 0x0>;
interrupts =
<GIC_SPI IRQ_G3D_IRQJOB_G3D IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI IRQ_G3D_IRQMMU_G3D IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI IRQ_G3D_IRQGPU_G3D IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "JOB", "MMU", "GPU";
/* Power */
power-domains = <&pd_g3d>, <&pd_embedded_g3d>;
power-domain-names = "top", "cores";
g3d_genpd_name = "pd-embedded_g3d";
gpu_pmu_status_reg_offset = <0x1C84>;
gpu_pmu_status_local_pwr_mask = <0x1>; /*0x1 << 0*/
power_policy = "adaptive";
firmware_idle_hysteresis_time_ms = <60>;
firmware_idle_hysteresis_gpu_sleep_scaler = <60>;
cores_suspend_hysteresis_time_ms = <20>;
top_suspend_hysteresis_time_ms = <40>;
/* Memory */
physical-memory-group-manager = <&mali_mgm>;
/* Protected memory allocator */
protected-memory-allocator = <&mali_pma>;
/* Clocks */
gpu0_cmu_cal_id = <ACPM_DVFS_G3DL2>;
gpu1_cmu_cal_id = <ACPM_DVFS_G3D>;
/* DVFS */
gpu_dvfs_governor = "quickstep_use_mcu";
gpu_dvfs_clockdown_hysteresis = <50>;
/* DVFS v1 operating points */
gpu_dvfs_table_size_v1 = <12 12>; /*<row col>*/
gpu_dvfs_table_v1 = <
/*
*gpu0 gpu1 down up hys int mif little middle big mcu mcu
* clk clk util util ticks min min min min max down_util up_util
*------------------------------------------------------------------------------------------------
*/
900000 890000 85 100 1 0 0 0 0 0 40 100
900000 807000 81 97 1 0 0 0 0 0 40 60
900000 723000 76 94 1 0 0 0 0 0 30 60
749000 649000 85 96 2 0 0 0 0 0 30 40
749000 580000 83 97 3 0 0 0 0 0 25 40
659000 521000 78 95 3 0 0 0 0 0 25 30
659000 467000 80 96 3 0 0 0 0 0 20 30
531000 419000 76 95 3 0 0 0 0 0 20 25
531000 376000 72 94 3 0 0 0 0 0 15 25
430000 337000 67 94 2 0 0 0 0 0 15 20
386000 302000 50 92 1 0 0 0 0 0 8 20
160000 150000 0 90 1 0 0 0 0 0 0 20
>;
/* DVFS v2 operating points */
gpu_dvfs_table_size_v2 = <14 12>; /*<row col>*/
gpu_dvfs_table_v2 = <
/*
*gpu0 gpu1 down up hys int mif little middle big mcu mcu
* clk clk util util ticks min min min min max down_util up_util
*------------------------------------------------------------------------------------------------
*/
950000 940000 85 100 1 0 0 0 0 0 40 100
900000 890000 85 100 1 0 0 0 0 0 40 100
900000 850000 76 94 1 0 0 0 0 0 40 60
900000 807000 85 96 2 0 0 0 0 0 30 60
900000 723000 83 97 3 0 0 0 0 0 25 50
749000 649000 78 95 3 0 0 0 0 0 25 40
749000 580000 80 96 3 0 0 0 0 0 20 40
659000 521000 76 95 3 0 0 0 0 0 20 35
659000 467000 72 95 3 0 0 0 0 0 20 30
531000 419000 67 94 2 0 0 0 0 0 15 30
531000 376000 65 94 1 0 0 0 0 0 15 25
430000 337000 60 94 1 0 0 0 0 0 12 20
386000 302000 50 92 1 0 0 0 0 0 8 20
160000 150000 0 90 1 0 0 0 0 0 0 20
>;
/* DVFS step up value */
gpu_dvfs_step_up_val = <3>;
/* Fmax limit */
gpu_dvfs_max_freq = <890000>;
/* QOS */
gpu_dvfs_qos_bts_scenario = "g3d_performance";
gpu_dvfs_qos_bts_threshold = <400000>;
mcu_protm_scale = <3 10>;
mcu_down_util_scale = <5 4>;
/* Thermal */
#cooling-cells = <2>;
gpu_power_coeff = <625>;
ect-coeff-index = <3>;
/* S2MPU */
s2mpus = <&s2mpu_s0_g3d>;
/* Features mask */
gpu_features_mask = <0 4>;
};
};
|
