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| author | Star Chang <starchang@google.com> | 2022-08-11 01:51:07 +0000 |
|---|---|---|
| committer | Star Chang <starchang@google.com> | 2022-10-07 04:59:08 +0000 |
| commit | fbf55dda6072ff07eefa9c564596388b88d8764c (patch) | |
| tree | c0288f616a5bb218e8ea2ddbc0d7ded556fbec3d | |
| parent | a52bcfefe6b8f97ca7fc06905d15fdc291bc49d1 (diff) | |
| download | bcm4389-fbf55dda6072ff07eefa9c564596388b88d8764c.tar.gz | |
bcmdhd: Fix control path tasklet latency too long issue.
[Issue]
Wifi tasklet take 1.5ms on mid core at 2.348GHz
[Solution]
Reducing maximum read counts per schedule for rx control ring to avoid tasklet handle over 1.5ms.
Bug: 241193912
Test: check perfetto analysis, QMC RvR & Regression pass b/242416795
Signed-off-by: Star Chang <starchang@google.com>
Change-Id: I2e04e1f17cee33de3f071fe55c19eea14794b03c
| -rw-r--r-- | Kbuild | 2 |
1 files changed, 1 insertions, 1 deletions
@@ -284,7 +284,7 @@ ifneq ($(CONFIG_BCMDHD_PCIE),) DHDCFLAGS += -DDHD_TX_CPL_BOUND=64 DHDCFLAGS += -DDHD_TX_POST_BOUND=128 DHDCFLAGS += -DDHD_RX_CPL_POST_BOUND=156 - DHDCFLAGS += -DDHD_CTRL_CPL_POST_BOUND=64 + DHDCFLAGS += -DDHD_CTRL_CPL_POST_BOUND=8 endif ifneq ($(CONFIG_FIB_RULES),) |