diff options
Diffstat (limited to 'cnss2/reg.h')
| -rw-r--r-- | cnss2/reg.h | 19 |
1 files changed, 9 insertions, 10 deletions
diff --git a/cnss2/reg.h b/cnss2/reg.h index 3d02c74..2807b30 100644 --- a/cnss2/reg.h +++ b/cnss2/reg.h @@ -73,24 +73,16 @@ #define TIME_SYNC_ENABLE 0x80000000 #define TIME_SYNC_CLEAR 0x0 -#define DEBUG_PBL_LOG_SRAM_START 0x01403D58 - +#define QCA6390_DEBUG_PBL_LOG_SRAM_START 0x01403D58 #define QCA6390_DEBUG_PBL_LOG_SRAM_MAX_SIZE 80 -#define QCA6390_V2_SBL_DATA_START 0x016C8580 -#define QCA6390_V2_SBL_DATA_END (0x016C8580 + 0x00011000) #define QCA6390_DEBUG_SBL_LOG_SRAM_MAX_SIZE 44 +#define QCA6490_DEBUG_PBL_LOG_SRAM_START 0x01403DA0 #define QCA6490_DEBUG_PBL_LOG_SRAM_MAX_SIZE 40 -#define QCA6490_V1_SBL_DATA_START 0x0143B000 -#define QCA6490_V1_SBL_DATA_END (0x0143B000 + 0x00011000) -#define QCA6490_V2_SBL_DATA_START 0x01435000 -#define QCA6490_V2_SBL_DATA_END (0x01435000 + 0x00011000) #define QCA6490_DEBUG_SBL_LOG_SRAM_MAX_SIZE 48 #define WCN7850_DEBUG_PBL_LOG_SRAM_START 0x01403D98 #define WCN7850_DEBUG_PBL_LOG_SRAM_MAX_SIZE 40 -#define WCN7850_SBL_DATA_START 0x01790000 -#define WCN7850_SBL_DATA_END (0x01790000 + 0x00011000) #define WCN7850_DEBUG_SBL_LOG_SRAM_MAX_SIZE 48 #define WCN7850_PBL_BOOTSTRAP_STATUS 0x01A10008 @@ -99,6 +91,8 @@ #define PCIE_BHI_ERRDBG3_REG 0x01E0E23C #define PBL_WLAN_BOOT_CFG 0x01E22B34 #define PBL_BOOTSTRAP_STATUS 0x01910008 +#define SRAM_START 0x01400000 +#define SRAM_END 0x01800000 #define QCA6390_PCIE_SOC_WDOG_DISC_BAD_DATA_LOW_CFG_SOC_PCIE_REG 0x01E04234 #define QCA6390_PCIE_SOC_WDOG_DISC_BAD_DATA_LOW_CFG_SOC_PCIE_REG_VAL 0xDEAD1234 @@ -330,4 +324,9 @@ #define QCA6390_SYSPM_DBG_BTFM_AON_REG 0x1F82004 #define QCA6390_SYSPM_DBG_BUS_SEL_REG 0x1F82008 #define QCA6390_SYSPM_WCSSAON_SR_STATUS 0x1F8200C + +/* PCIE SOC scratch registers, address same for QCA6390 & QCA6490*/ +#define PCIE_SCRATCH_0_SOC_PCIE_REG 0x1E04040 +#define PCIE_SCRATCH_1_SOC_PCIE_REG 0x1E04044 +#define PCIE_SCRATCH_2_SOC_PCIE_REG 0x1E0405C #endif |