diff options
| author | Linux Build Service Account <lnxbuild@localhost> | 2013-03-18 05:16:50 -0700 |
|---|---|---|
| committer | Gerrit - the friendly Code Review server <code-review@localhost> | 2013-03-18 05:16:50 -0700 |
| commit | b15512a987f92a115dcdc60869535f43eba73549 (patch) | |
| tree | 95eaa6ffec2ac41dd66122205d183545487c1201 | |
| parent | bdcc859c7daf7f4e893eddb5ae057bac7e68ce22 (diff) | |
| parent | 965184188c516b1b97d3e44de93ce54e7137aae6 (diff) | |
| download | lk-b15512a987f92a115dcdc60869535f43eba73549.tar.gz | |
Merge "msm8974: mmc: Fix glitch observed during sd clock switch"
| -rw-r--r-- | platform/msm8974/acpuclock.c | 16 |
1 files changed, 5 insertions, 11 deletions
diff --git a/platform/msm8974/acpuclock.c b/platform/msm8974/acpuclock.c index 9ed41101..9f4b6e4b 100644 --- a/platform/msm8974/acpuclock.c +++ b/platform/msm8974/acpuclock.c @@ -122,6 +122,9 @@ void clock_config_mmc(uint32_t interface, uint32_t freq) snprintf(clk_name, 64, "sdc%u_core_clk", interface); + /* Disalbe MCI_CLK before changing the sdcc clock */ + mmc_boot_mci_clk_disable(); + if(freq == MMC_CLK_400KHZ) { ret = clk_get_set_enable(clk_name, 400000, 1); @@ -143,17 +146,8 @@ void clock_config_mmc(uint32_t interface, uint32_t freq) ASSERT(0); } - reg = 0; - reg |= MMC_BOOT_MCI_CLK_ENABLE; - reg |= MMC_BOOT_MCI_CLK_ENA_FLOW; - reg |= MMC_BOOT_MCI_CLK_IN_FEEDBACK; - writel(reg, MMC_BOOT_MCI_CLK); - - /* Wait for the MMC_BOOT_MCI_CLK write to go through. */ - mmc_mclk_reg_wr_delay(); - - /* Wait 1 ms to provide the free running SD CLK to the card. */ - mdelay(1); + /* Enalbe MCI clock */ + mmc_boot_mci_clk_enable(); } /* Configure UART clock based on the UART block id*/ |