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author | Linux Build Service Account <lnxbuild@localhost> | 2013-03-18 05:16:51 -0700 |
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committer | Gerrit - the friendly Code Review server <code-review@localhost> | 2013-03-18 05:16:51 -0700 |
commit | be71504fa3927f00ac61d213de7eb26c534b77ff (patch) | |
tree | 8fb548fe19596c7bc6aac0e46bf7352fc1378a2f | |
parent | b15512a987f92a115dcdc60869535f43eba73549 (diff) | |
parent | 17b659414d9a1f936ee36da05bcb082b88842636 (diff) | |
download | lk-be71504fa3927f00ac61d213de7eb26c534b77ff.tar.gz |
Merge "msm8960: mmc: Fix glitch observed during sd clock switch"
-rw-r--r-- | platform/msm8960/acpuclock.c | 15 |
1 files changed, 5 insertions, 10 deletions
diff --git a/platform/msm8960/acpuclock.c b/platform/msm8960/acpuclock.c index 65f41358..2681138c 100644 --- a/platform/msm8960/acpuclock.c +++ b/platform/msm8960/acpuclock.c @@ -215,6 +215,9 @@ void clock_config_mmc(uint32_t interface, uint32_t freq) snprintf(sdc_clk, 64, "sdc%u_clk", interface); + /* Disalbe MCI_CLK before changing the sdcc clock */ + mmc_boot_mci_clk_disable(); + switch(freq) { case MMC_CLK_400KHZ: @@ -231,16 +234,8 @@ void clock_config_mmc(uint32_t interface, uint32_t freq) clk_get_set_enable(sdc_clk, rate, 1); - reg |= MMC_BOOT_MCI_CLK_ENABLE; - reg |= MMC_BOOT_MCI_CLK_ENA_FLOW; - reg |= MMC_BOOT_MCI_CLK_IN_FEEDBACK; - writel(reg, MMC_BOOT_MCI_CLK); - - /* Wait for the MMC_BOOT_MCI_CLK write to go through. */ - mmc_mclk_reg_wr_delay(); - - /* Wait 1 ms to provide the free running SD CLK to the card. */ - mdelay(1); + /* Enable MCI clk */ + mmc_boot_mci_clk_enable(); } /* Configure crypto engine clock */ |