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| author | Channagoud Kadabi <ckadabi@codeaurora.org> | 2013-04-12 14:28:37 -0700 |
|---|---|---|
| committer | Channagoud Kadabi <ckadabi@codeaurora.org> | 2013-04-12 15:08:16 -0700 |
| commit | 45e22b26abf28f7c80b26e48ec957fad41551c4b (patch) | |
| tree | ca5b457cb3ecf25bd6049a0f8616e64a9d0cbfc4 | |
| parent | 590e75866906faecca2f35cf2f674d8beb5727c0 (diff) | |
| download | lk-45e22b26abf28f7c80b26e48ec957fad41551c4b.tar.gz | |
target: msm8974: Fix bus width for fluid devices
Due to hardware bug 8 bit bus width causes data crc's
during mmc write operations on v1 fluid devices. Limit
the bus width to 4 bit only for v1 fluid devices.
CRs-Fixed: 474895
Change-Id: Iffa78e261a5b57c4ba1cd270be75639214292e92
| -rw-r--r-- | target/msm8974/init.c | 21 |
1 files changed, 20 insertions, 1 deletions
diff --git a/target/msm8974/init.c b/target/msm8974/init.c index a3d48b7f..e1ab1c28 100644 --- a/target/msm8974/init.c +++ b/target/msm8974/init.c @@ -449,9 +449,28 @@ void shutdown_device() */ void target_mmc_caps(struct mmc_host *host) { + uint32_t soc_ver = 0; + + soc_ver = board_soc_version(); + + /* + * 8974 v1 fluid devices, have a hardware bug + * which limits the bus width to 4 bit. + */ + switch(board_hardware_id()) + { + case HW_PLATFORM_FLUID: + if (soc_ver >= BOARD_SOC_VERSION2) + host->caps.bus_width = MMC_BOOT_BUS_WIDTH_8_BIT; + else + host->caps.bus_width = MMC_BOOT_BUS_WIDTH_4_BIT; + break; + default: + host->caps.bus_width = MMC_BOOT_BUS_WIDTH_8_BIT; + }; + host->caps.ddr_mode = 1; host->caps.hs200_mode = 1; - host->caps.bus_width = MMC_BOOT_BUS_WIDTH_8_BIT; host->caps.hs_clk_rate = MMC_CLK_96MHZ; } |