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| author | Sudheer Papothi <spapothi@codeaurora.org> | 2020-07-31 10:34:29 +0530 |
|---|---|---|
| committer | Gerrit - the friendly Code Review server <code-review@localhost> | 2020-11-18 04:11:48 -0800 |
| commit | cd9b0b0b6cabdf23433ecfe5ea3f9a282fd943c6 (patch) | |
| tree | b75adaac799ae5c6ca27f86da2245110563bfece /asoc | |
| parent | 9503ada7a46d9bfb3dace9b147a05282935652f2 (diff) | |
| download | msm-extra-cd9b0b0b6cabdf23433ecfe5ea3f9a282fd943c6.tar.gz | |
ASoC: tx-macro: Allow regcache sync during clock enablement
Allow regcache sync during clock enable to make sure the registers
are in proper state before the usecase.
Change-Id: I8a9214e460c7f77759d1956e0e7e2d6b2f5b3d3a
Signed-off-by: Sudheer Papothi <spapothi@codeaurora.org>
Diffstat (limited to 'asoc')
| -rw-r--r-- | asoc/codecs/bolero/tx-macro.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/asoc/codecs/bolero/tx-macro.c b/asoc/codecs/bolero/tx-macro.c index 7e982fac..de04e1e9 100644 --- a/asoc/codecs/bolero/tx-macro.c +++ b/asoc/codecs/bolero/tx-macro.c @@ -234,11 +234,11 @@ static int tx_macro_mclk_enable(struct tx_macro_priv *tx_priv, } bolero_clk_rsc_fs_gen_request(tx_priv->dev, true); + regcache_mark_dirty(regmap); + regcache_sync_region(regmap, + TX_START_OFFSET, + TX_MAX_OFFSET); if (tx_priv->tx_mclk_users == 0) { - regcache_mark_dirty(regmap); - regcache_sync_region(regmap, - TX_START_OFFSET, - TX_MAX_OFFSET); /* 9.6MHz MCLK, set value 0x00 if other frequency */ regmap_update_bits(regmap, BOLERO_CDC_TX_TOP_CSR_FREQ_MCLK, 0x01, 0x01); |