diff options
| author | Wilson Sung <wilsonsung@google.com> | 2022-01-05 18:28:05 +0800 |
|---|---|---|
| committer | Wilson Sung <wilsonsung@google.com> | 2022-01-05 18:28:05 +0800 |
| commit | e15a3ffd15056de6bd8f149434d1e5034d957ea5 (patch) | |
| tree | 32e051ddc62a650d158c861dbe160dfd2c3323bb | |
| parent | 94928fb79f5e4098af3f623bad3a1fbfe0d98ab5 (diff) | |
| parent | fec624ed78328f88e6a87e92441af63d8a1fac24 (diff) | |
| download | devicetree-e15a3ffd15056de6bd8f149434d1e5034d957ea5.tar.gz | |
Merge branch LA.UM.9.12.C10.11.00.00.840.201 into qcom-msm-4.19-7250
Change-Id: I4e5db7e4f40009c3aa1e32dd0021721a86abf0e1
34 files changed, 3654 insertions, 474 deletions
diff --git a/bindings/sound/qcom-audio-dev.txt b/bindings/sound/qcom-audio-dev.txt index e28521a5..ffef4409 100644 --- a/bindings/sound/qcom-audio-dev.txt +++ b/bindings/sound/qcom-audio-dev.txt @@ -2007,6 +2007,10 @@ Optional properties: - qcom,msm-mi2s-master: This property is used to inform machine driver if MSM is the clock master of mi2s. 1 means master and 0 means slave. The first entry is primary mi2s; the second entry is secondary mi2s, and so on. +- qcom,tdm-clk-attribute: This property is used to set the clock attribute for tdm. + The first entry is primary tdm; the second entry is secondary tdm, and so on. +- qcom,mi2s-clk-attribute: This property is used to set the clock attribute for mi2s. + The first entry is primary mi2s; the second entry is secondary mi2s, and so on. - qcom,msm-mbhc-hphl-swh: This property is used to distinguish headset HPHL switch type on target typically the switch type will be normally open or normally close, value for this property 0 for normally close and 1 for @@ -2153,6 +2157,27 @@ Example: }; +Required properties: +- compatible : "qcom,spf-core-platform" + +Required properties: +- compatible : "qcom,audio-pkt-core-platform" + +Required properties: +- compatible : "qcom,gpr" + +Required properties: +- compatible : "qcom,spf_core" + +Required properties: +- compatible : "qcom,audio-pkt" + +Required properties: +- compatible : "qcom,audio_prm" + +Required properties: +- compatible : "qcom,voice_mhi_gpr" + * LITO ASoC Machine driver Required properties: diff --git a/qcom/Makefile b/qcom/Makefile index 3fb5707b..ad530812 100644 --- a/qcom/Makefile +++ b/qcom/Makefile @@ -2,6 +2,7 @@ ifeq ($(CONFIG_BUILD_ARM64_DT_OVERLAY),y) dtbo-$(CONFIG_ARCH_KONA) += \ kona-cdp-overlay.dtbo \ kona-cdp-lcd-overlay.dtbo \ + kona-cdp-lcd-tron-overlay.dtbo \ kona-mtp-overlay.dtbo \ kona-mtp-ws-overlay.dtbo \ kona-sa-mtp-overlay.dtbo \ @@ -15,6 +16,7 @@ ifeq ($(CONFIG_BUILD_ARM64_DT_OVERLAY),y) kona-cdp-overlay.dtbo-base := kona.dtb kona-v2.dtb kona-v2.1.dtb kona-cdp-lcd-overlay.dtbo-base := kona.dtb kona-v2.dtb kona-v2.1.dtb +kona-cdp-lcd-tron-overlay.dtbo-base := kona.dtb kona-v2.dtb kona-v2.1.dtb kona-mtp-overlay.dtbo-base := kona.dtb kona-v2.dtb kona-v2.1.dtb kona-mtp-ws-overlay.dtbo-base := kona.dtb kona-v2.dtb kona-v2.1.dtb kona-sa-mtp-overlay.dtbo-base := kona.dtb kona-v2.dtb kona-v2.1.dtb @@ -36,6 +38,7 @@ dtb-$(CONFIG_ARCH_KONA) += kona-rumi.dtb \ kona-arglass.dtb \ kona-cdp.dtb \ kona-cdp-lcd.dtb \ + kona-cdp-lcd-tron.dtb \ kona-qrd.dtb \ kona-v2-rumi.dtb \ kona-v2-mtp.dtb \ diff --git a/qcom/dsi-panel-nt36672e-fhd-plus-60hz-video.dtsi b/qcom/dsi-panel-nt36672e-fhd-plus-60hz-video.dtsi new file mode 100644 index 00000000..92f70b56 --- /dev/null +++ b/qcom/dsi-panel-nt36672e-fhd-plus-60hz-video.dtsi @@ -0,0 +1,312 @@ +&mdss_mdp { + dsi_nt36672e_fhd_plus_60_video: qcom,mdss_dsi_nt36672e_fhd_plus_60_video { + qcom,mdss-dsi-panel-name = + "nt36672e 60 Hz fhd plus video mode panel without DSC"; + qcom,mdss-dsi-panel-type = "dsi_video_mode"; + qcom,dsi-ctrl-num = <0>; + qcom,dsi-phy-num = <0>; + qcom,mdss-dsi-virtual-channel-id = <0>; + qcom,mdss-dsi-stream = <0>; + qcom,mdss-dsi-bpp = <24>; + qcom,mdss-dsi-border-color = <0>; + qcom,mdss-dsi-traffic-mode = "burst_mode"; + qcom,mdss-dsi-bllp-power-mode; + qcom,mdss-dsi-bllp-eof-power-mode; + qcom,mdss-dsi-lane-0-state; + qcom,mdss-dsi-lane-1-state; + qcom,mdss-dsi-lane-2-state; + qcom,mdss-dsi-lane-3-state; + qcom,mdss-dsi-dma-trigger = "trigger_sw"; + qcom,mdss-dsi-mdp-trigger = "none"; + qcom,mdss-dsi-reset-sequence = <1 10>, <0 10>, <1 10>; + qcom,mdss-dsi-tx-eot-append; + qcom,adjust-timer-wakeup-ms = <1>; + qcom,mdss-dsi-panel-hdr-enabled; + qcom,mdss-dsi-panel-hdr-color-primaries = <39000 16000 33750 + 39800 13250 34450 7500 3000>; + qcom,mdss-dsi-panel-peak-brightness = <6450000>; + qcom,mdss-dsi-panel-blackness-level = <4961>; + + qcom,mdss-dsi-display-timings { + timing@0 { + qcom,mdss-dsi-panel-width = <1080>; + qcom,mdss-dsi-panel-height = <2408>; + qcom,mdss-dsi-h-front-porch = <76>; + qcom,mdss-dsi-h-back-porch = <56>; + qcom,mdss-dsi-h-pulse-width = <12>; + qcom,mdss-dsi-h-sync-skew = <0>; + qcom,mdss-dsi-v-back-porch = <10>; + qcom,mdss-dsi-v-front-porch = <46>; + qcom,mdss-dsi-v-pulse-width = <10>; + qcom,mdss-dsi-panel-framerate = <60>; + qcom,mdss-dsi-on-command = [ + 39 01 00 00 00 00 02 FF 10 + 39 01 00 00 00 00 02 FB 01 + 39 01 00 00 00 00 02 B0 00 + 39 01 00 00 00 00 02 C0 00 + 39 01 00 00 00 00 11 C1 89 28 00 08 00 AA 02 0E 00 2B 00 07 0D B7 0C B7 + 39 01 00 00 00 00 03 C2 1B A0 + 39 01 00 00 00 00 02 FF 20 + 39 01 00 00 00 00 02 FB 01 + 39 01 00 00 00 00 02 01 66 + 39 01 00 00 00 00 02 06 40 + 39 01 00 00 00 00 02 07 38 + 39 01 00 00 00 00 02 2F 83 + 39 01 00 00 00 00 02 69 91 + 39 01 00 00 00 00 02 95 D1 + 39 01 00 00 00 00 02 96 D1 + 39 01 00 00 00 00 02 F2 64 + 39 01 00 00 00 00 02 F3 54 + 39 01 00 00 00 00 02 F4 64 + 39 01 00 00 00 00 02 F5 54 + 39 01 00 00 00 00 02 F6 64 + 39 01 00 00 00 00 02 F7 54 + 39 01 00 00 00 00 02 F8 64 + 39 01 00 00 00 00 02 F9 54 + 39 01 00 00 00 00 02 FF 24 + 39 01 00 00 00 00 02 FB 01 + 39 01 00 00 00 00 02 01 0F + 39 01 00 00 00 00 02 03 0C + 39 01 00 00 00 00 02 05 1D + 39 01 00 00 00 00 02 08 2F + 39 01 00 00 00 00 02 09 2E + 39 01 00 00 00 00 02 0A 2D + 39 01 00 00 00 00 02 0B 2C + 39 01 00 00 00 00 02 11 17 + 39 01 00 00 00 00 02 12 13 + 39 01 00 00 00 00 02 13 15 + 39 01 00 00 00 00 02 15 14 + 39 01 00 00 00 00 02 16 16 + 39 01 00 00 00 00 02 17 18 + 39 01 00 00 00 00 02 1B 01 + 39 01 00 00 00 00 02 1D 1D + 39 01 00 00 00 00 02 20 2F + 39 01 00 00 00 00 02 21 2E + 39 01 00 00 00 00 02 22 2D + 39 01 00 00 00 00 02 23 2C + 39 01 00 00 00 00 02 29 17 + 39 01 00 00 00 00 02 2A 13 + 39 01 00 00 00 00 02 2B 15 + 39 01 00 00 00 00 02 2F 14 + 39 01 00 00 00 00 02 30 16 + 39 01 00 00 00 00 02 31 18 + 39 01 00 00 00 00 02 32 04 + 39 01 00 00 00 00 02 34 10 + 39 01 00 00 00 00 02 35 1F + 39 01 00 00 00 00 02 36 1F + 39 01 00 00 00 00 02 4D 14 + 39 01 00 00 00 00 02 4E 36 + 39 01 00 00 00 00 02 4F 36 + 39 01 00 00 00 00 02 53 36 + 39 01 00 00 00 00 02 71 30 + 39 01 00 00 00 00 02 79 11 + 39 01 00 00 00 00 02 7A 82 + 39 01 00 00 00 00 02 7B 8F + 39 01 00 00 00 00 02 7D 04 + 39 01 00 00 00 00 02 80 04 + 39 01 00 00 00 00 02 81 04 + 39 01 00 00 00 00 02 82 13 + 39 01 00 00 00 00 02 84 31 + 39 01 00 00 00 00 02 85 00 + 39 01 00 00 00 00 02 86 00 + 39 01 00 00 00 00 02 87 00 + 39 01 00 00 00 00 02 90 13 + 39 01 00 00 00 00 02 92 31 + 39 01 00 00 00 00 02 93 00 + 39 01 00 00 00 00 02 94 00 + 39 01 00 00 00 00 02 95 00 + 39 01 00 00 00 00 02 9C F4 + 39 01 00 00 00 00 02 9D 01 + 39 01 00 00 00 00 02 A0 0F + 39 01 00 00 00 00 02 A2 0F + 39 01 00 00 00 00 02 A3 02 + 39 01 00 00 00 00 02 A4 04 + 39 01 00 00 00 00 02 A5 04 + 39 01 00 00 00 00 02 C6 C0 + 39 01 00 00 00 00 02 C9 00 + 39 01 00 00 00 00 02 D9 80 + 39 01 00 00 00 00 02 E9 02 + 39 01 00 00 00 00 02 FF 25 + 39 01 00 00 00 00 02 FB 01 + 39 01 00 00 00 00 02 18 22 + 39 01 00 00 00 00 02 19 E4 + 39 01 00 00 00 00 02 21 40 + 39 01 00 00 00 00 02 66 D8 + 39 01 00 00 00 00 02 68 50 + 39 01 00 00 00 00 02 69 10 + 39 01 00 00 00 00 02 6B 00 + 39 01 00 00 00 00 02 6D 0D + 39 01 00 00 00 00 02 6E 48 + 39 01 00 00 00 00 02 72 41 + 39 01 00 00 00 00 02 73 4A + 39 01 00 00 00 00 02 74 D0 + 39 01 00 00 00 00 02 77 62 + 39 01 00 00 00 00 02 79 7E + 39 01 00 00 00 00 02 7D 03 + 39 01 00 00 00 00 02 7E 15 + 39 01 00 00 00 00 02 7F 00 + 39 01 00 00 00 00 02 84 4D + 39 01 00 00 00 00 02 CF 80 + 39 01 00 00 00 00 02 D6 80 + 39 01 00 00 00 00 02 D7 80 + 39 01 00 00 00 00 02 EF 20 + 39 01 00 00 00 00 02 F0 84 + 39 01 00 00 00 00 02 FF 26 + 39 01 00 00 00 00 02 FB 01 + 39 01 00 00 00 00 02 81 0F + 39 01 00 00 00 00 02 83 01 + 39 01 00 00 00 00 02 84 03 + 39 01 00 00 00 00 02 85 01 + 39 01 00 00 00 00 02 86 03 + 39 01 00 00 00 00 02 87 01 + 39 01 00 00 00 00 02 88 05 + 39 01 00 00 00 00 02 8A 1A + 39 01 00 00 00 00 02 8B 11 + 39 01 00 00 00 00 02 8C 24 + 39 01 00 00 00 00 02 8E 42 + 39 01 00 00 00 00 02 8F 11 + 39 01 00 00 00 00 02 90 11 + 39 01 00 00 00 00 02 91 11 + 39 01 00 00 00 00 02 9A 80 + 39 01 00 00 00 00 02 9B 04 + 39 01 00 00 00 00 02 9C 00 + 39 01 00 00 00 00 02 9D 00 + 39 01 00 00 00 00 02 9E 00 + 39 01 00 00 00 00 02 FF 27 + 39 01 00 00 00 00 02 FB 01 + 39 01 00 00 00 00 02 01 68 + 39 01 00 00 00 00 02 20 81 + 39 01 00 00 00 00 02 21 6A + 39 01 00 00 00 00 02 25 81 + 39 01 00 00 00 00 02 26 94 + 39 01 00 00 00 00 02 6E 00 + 39 01 00 00 00 00 02 6F 00 + 39 01 00 00 00 00 02 70 00 + 39 01 00 00 00 00 02 71 00 + 39 01 00 00 00 00 02 72 00 + 39 01 00 00 00 00 02 75 00 + 39 01 00 00 00 00 02 76 00 + 39 01 00 00 00 00 02 77 00 + 39 01 00 00 00 00 02 7D 09 + 39 01 00 00 00 00 02 7E 67 + 39 01 00 00 00 00 02 80 23 + 39 01 00 00 00 00 02 82 09 + 39 01 00 00 00 00 02 83 67 + 39 01 00 00 00 00 02 88 01 + 39 01 00 00 00 00 02 89 10 + 39 01 00 00 00 00 02 A5 10 + 39 01 00 00 00 00 02 A6 23 + 39 01 00 00 00 00 02 A7 01 + 39 01 00 00 00 00 02 B6 40 + 39 01 00 00 00 00 02 E5 02 + 39 01 00 00 00 00 02 E6 D3 + 39 01 00 00 00 00 02 EB 03 + 39 01 00 00 00 00 02 EC 28 + 39 01 00 00 00 00 02 FF 2A + 39 01 00 00 00 00 02 FB 01 + 39 01 00 00 00 00 02 00 91 + 39 01 00 00 00 00 02 03 20 + 39 01 00 00 00 00 02 07 50 + 39 01 00 00 00 00 02 0A 70 + 39 01 00 00 00 00 02 0C 04 + 39 01 00 00 00 00 02 0D 40 + 39 01 00 00 00 00 02 0F 01 + 39 01 00 00 00 00 02 11 E0 + 39 01 00 00 00 00 02 15 0F + 39 01 00 00 00 00 02 16 A4 + 39 01 00 00 00 00 02 19 0F + 39 01 00 00 00 00 02 1A 78 + 39 01 00 00 00 00 02 1B 23 + 39 01 00 00 00 00 02 1D 36 + 39 01 00 00 00 00 02 1E 3E + 39 01 00 00 00 00 02 1F 3E + 39 01 00 00 00 00 02 20 3E + 39 01 00 00 00 00 02 28 FD + 39 01 00 00 00 00 02 29 12 + 39 01 00 00 00 00 02 2A E1 + 39 01 00 00 00 00 02 2D 0A + 39 01 00 00 00 00 02 30 49 + 39 01 00 00 00 00 02 33 96 + 39 01 00 00 00 00 02 34 FF + 39 01 00 00 00 00 02 35 40 + 39 01 00 00 00 00 02 36 DE + 39 01 00 00 00 00 02 37 F9 + 39 01 00 00 00 00 02 38 45 + 39 01 00 00 00 00 02 39 D9 + 39 01 00 00 00 00 02 3A 49 + 39 01 00 00 00 00 02 4A F0 + 39 01 00 00 00 00 02 7A 09 + 39 01 00 00 00 00 02 7B 40 + 39 01 00 00 00 00 02 7F F0 + 39 01 00 00 00 00 02 83 0F + 39 01 00 00 00 00 02 84 A4 + 39 01 00 00 00 00 02 87 0F + 39 01 00 00 00 00 02 88 78 + 39 01 00 00 00 00 02 89 23 + 39 01 00 00 00 00 02 8B 36 + 39 01 00 00 00 00 02 8C 7D + 39 01 00 00 00 00 02 8D 7D + 39 01 00 00 00 00 02 8E 7D + 39 01 00 00 00 00 02 FF 20 + 39 01 00 00 00 00 02 FB 01 + 39 01 00 00 00 00 11 B0 00 00 00 17 00 49 00 6A 00 89 00 9F 00 B6 00 C8 + 39 01 00 00 00 00 11 B1 00 D9 01 10 01 3A 01 7A 01 A9 01 F2 02 2D 02 2E + 39 01 00 00 00 00 11 B2 02 64 02 A3 02 CA 03 00 03 1E 03 4A 03 59 03 6A + 39 01 00 00 00 00 0F B3 03 7D 03 93 03 AB 03 C8 03 EC 03 FE 00 00 + 39 01 00 00 00 00 11 B4 00 00 00 1B 00 51 00 71 00 90 00 A7 00 BF 00 D1 + 39 01 00 00 00 00 11 B5 00 E2 01 1A 01 43 01 83 01 B2 01 FA 02 34 02 36 + 39 01 00 00 00 00 11 B6 02 6B 02 A8 02 D0 03 03 03 21 03 4D 03 5B 03 6B + 39 01 00 00 00 00 0F B7 03 7E 03 94 03 AC 03 C8 03 EC 03 FE 00 00 + 39 01 00 00 00 00 11 B8 00 00 00 1B 00 51 00 72 00 92 00 A8 00 BF 00 D1 + 39 01 00 00 00 00 11 B9 00 E2 01 18 01 42 01 81 01 AF 01 F5 02 2F 02 31 + 39 01 00 00 00 00 11 BA 02 68 02 A6 02 CD 03 01 03 1F 03 4A 03 59 03 6A + 39 01 00 00 00 00 0F BB 03 7D 03 93 03 AB 03 C8 03 EC 03 FE 00 00 + 39 01 00 00 00 00 02 FF 21 + 39 01 00 00 00 00 02 FB 01 + 39 01 00 00 00 00 11 B0 00 00 00 17 00 49 00 6A 00 89 00 9F 00 B6 00 C8 + 39 01 00 00 00 00 11 B1 00 D9 01 10 01 3A 01 7A 01 A9 01 F2 02 2D 02 2E + 39 01 00 00 00 00 11 B2 02 64 02 A3 02 CA 03 00 03 1E 03 4A 03 59 03 6A + 39 01 00 00 00 00 0F B3 03 7D 03 93 03 AB 03 C8 03 EC 03 FE 00 00 + 39 01 00 00 00 00 11 B4 00 00 00 1B 00 51 00 71 00 90 00 A7 00 BF 00 D1 + 39 01 00 00 00 00 11 B5 00 E2 01 1A 01 43 01 83 01 B2 01 FA 02 34 02 36 + 39 01 00 00 00 00 11 B6 02 6B 02 A8 02 D0 03 03 03 21 03 4D 03 5B 03 6B + 39 01 00 00 00 00 0F B7 03 7E 03 94 03 AC 03 C8 03 EC 03 FE 00 00 + 39 01 00 00 00 00 11 B8 00 00 00 1B 00 51 00 72 00 92 00 A8 00 BF 00 D1 + 39 01 00 00 00 00 11 B9 00 E2 01 18 01 42 01 81 01 AF 01 F5 02 2F 02 31 + 39 01 00 00 00 00 11 BA 02 68 02 A6 02 CD 03 01 03 1F 03 4A 03 59 03 6A + 39 01 00 00 00 00 0F BB 03 7D 03 93 03 AB 03 C8 03 EC 03 FE 00 00 + 39 01 00 00 00 00 02 FF 2C + 39 01 00 00 00 00 02 FB 01 + 39 01 00 00 00 00 02 61 1F + 39 01 00 00 00 00 02 62 1F + 39 01 00 00 00 00 02 7E 03 + 39 01 00 00 00 00 02 6A 14 + 39 01 00 00 00 00 02 6B 36 + 39 01 00 00 00 00 02 6C 36 + 39 01 00 00 00 00 02 6D 36 + 39 01 00 00 00 00 02 53 04 + 39 01 00 00 00 00 02 54 04 + 39 01 00 00 00 00 02 55 04 + 39 01 00 00 00 00 02 56 0F + 39 01 00 00 00 00 02 58 0F + 39 01 00 00 00 00 02 59 0F + 39 01 00 00 00 00 02 FF F0 + 39 01 00 00 00 00 02 FB 01 + 39 01 00 00 00 00 02 5A 00 + 15 01 00 00 00 00 02 FF 10 + 15 01 00 00 00 00 02 FB 01 + 15 01 00 00 00 00 02 51 FF + 15 01 00 00 00 00 02 53 24 + 15 01 00 00 00 00 02 55 01 + 05 01 00 00 78 00 01 11 + 05 01 00 00 64 00 01 29 + ]; + qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-off-command = [ + 05 01 00 00 10 00 01 28 + 05 01 00 00 32 00 01 10 + ]; + }; + }; + }; +}; diff --git a/qcom/fg-gen4-batterydata-goertek-650mah.dtsi b/qcom/fg-gen4-batterydata-goertek-650mah.dtsi new file mode 100644 index 00000000..f85b7aa3 --- /dev/null +++ b/qcom/fg-gen4-batterydata-goertek-650mah.dtsi @@ -0,0 +1,123 @@ +qcom,5376013_goertek_oracle_650mah_pm8150b_sept23rd2021 { + /* #5376013_Goertek_Oracle_650mAH_averaged_MasterSlave_Sept23rd2021*/ + qcom,max-voltage-uv = <4480000>; + qcom,fg-cc-cv-threshold-mv = <4470>; + qcom,nom-batt-capacity-mah = <650>; + qcom,batt-id-kohm = <100>; + qcom,battery-beta = <4250>; + qcom,therm-room-temp = <100000>; + qcom,battery-type = "goertek_oracle_650mah_pm8150b_sept23rd2021"; + qcom,therm-coefficients = <0x2318 0xd0c 0xdaf7 0xc556 0x848d>; + qcom,therm-center-offset = <0x70>; + qcom,therm-pull-up = <100>; + qcom,rslow-normal-coeffs = <0x3b 0xf2 0x34 0x0b>; + qcom,rslow-low-coeffs = <0x3f 0x0d 0x0c 0xea>; + qcom,checksum = <0x4B53>; + qcom,gui-version = "PM855GUI - 1.0.0.14"; + qcom,fg-profile-data = [ + 09 00 2F 01 + F8 05 9C 03 + 0F FC 00 00 + 3D CC 0D A2 + CC 87 E0 C2 + F1 C5 80 87 + 52 00 3B F2 + 34 0B FE D5 + 9A E2 CE 07 + 32 00 6E F2 + 15 E2 4A E2 + 62 13 97 F2 + FA C5 F1 1A + 15 07 DE CD + 60 00 42 00 + 40 00 3E 00 + 39 00 3D 00 + 3C 00 41 00 + 51 00 54 00 + 4C 00 60 00 + 34 00 3F 00 + 40 00 38 00 + 44 00 36 00 + 61 64 4A 00 + 3B E8 3E 00 + 60 F0 21 00 + 28 08 23 18 + 30 18 3D 00 + 2A 18 53 40 + 30 58 2A 07 + 33 00 D8 00 + 6F 1C 14 0B + 1C 02 59 0D + 6E 19 D9 13 + 4E 0D 1E 1B + B6 18 43 33 + 78 3D 80 03 + 4F 1B 3C 1F + 2A 05 63 0B + 30 05 C3 19 + 85 0A EC 0D + 6B 0B C4 17 + 68 1A C5 2D + 60 3B 85 20 + ED 1E 75 F5 + 3E F3 40 F5 + FE 19 3D EA + 97 04 D5 CA + E3 17 1E A2 + BA 84 0E CA + 87 C0 09 80 + B6 03 29 FD + B7 03 1C 05 + 00 F8 87 E4 + 04 D2 CB DF + 50 E2 8D CC + E4 25 30 00 + E8 E6 85 02 + EF 06 7E 00 + CE 07 32 00 + 15 03 56 02 + C3 05 C9 05 + 62 04 42 02 + C4 02 49 01 + EB 05 60 00 + 39 00 46 00 + 47 64 4B 00 + 52 08 53 10 + 52 08 51 00 + 50 00 3F 08 + 60 08 54 00 + 5B 20 5B 38 + 58 48 6B 15 + 74 00 5E 08 + 6B 10 60 00 + 6C 00 60 00 + 77 08 69 08 + 70 00 5F 20 + 73 38 7E 48 + 60 18 6F 00 + 72 08 8B 10 + D8 08 7F 23 + 9F 04 F1 02 + 83 05 E1 1C + 27 22 DF 3D + 4E 4A C7 18 + 7B 02 65 04 + A4 03 8E 17 + 3F 0A 8C 21 + 99 05 4E 02 + 25 04 9A 1C + 3B 02 F0 05 + 4A 02 C4 18 + 0F 02 69 05 + 49 02 87 00 + 38 22 36 05 + 9E 02 C3 05 + 65 1C 21 02 + D7 04 89 03 + B0 18 07 02 + 67 05 59 02 + 91 00 10 03 + C0 00 FA 00 + 93 02 00 00 + ]; +}; diff --git a/qcom/khaje-atp.dtsi b/qcom/khaje-atp.dtsi index 29855637..50b6b9a1 100644 --- a/qcom/khaje-atp.dtsi +++ b/qcom/khaje-atp.dtsi @@ -1,6 +1,7 @@ #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/iio/qcom,spmi-vadc.h> #include <dt-bindings/input/input.h> +#include "bengal-audio-overlay.dtsi" #include "khaje-sde-display.dtsi" #include "khaje-pm7250b.dtsi" diff --git a/qcom/khaje-qrd-pm7250b.dtsi b/qcom/khaje-qrd-pm7250b.dtsi index 25dd2d97..db33ce04 100644 --- a/qcom/khaje-qrd-pm7250b.dtsi +++ b/qcom/khaje-qrd-pm7250b.dtsi @@ -159,3 +159,34 @@ &usb0 { extcon = <&pm7250b_pdphy>, <&pm7250b_charger>, <&eud>; }; + +&thermal_zones { + quiet-thermal-step { + cooling-maps { + quiet_batt_cdev1 { + trip = <&quiet_batt_trip0>; + cooling-device = <&pm7250b_charger 8 8>; + }; + + quiet_batt_cdev2 { + trip = <&quiet_batt_trip1>; + cooling-device = <&pm7250b_charger 12 12>; + }; + + quiet_batt_cdev3 { + trip = <&quiet_batt_trip2>; + cooling-device = <&pm7250b_charger 14 14>; + }; + + quiet_batt_cdev4 { + trip = <&quiet_batt_trip3>; + cooling-device = <&pm7250b_charger 16 16>; + }; + + quiet_batt_cdev5 { + trip = <&quiet_batt_trip4>; + cooling-device = <&pm7250b_charger 18 18>; + }; + }; + }; +}; diff --git a/qcom/khaje-qrd.dtsi b/qcom/khaje-qrd.dtsi index 51df295e..8ac99391 100644 --- a/qcom/khaje-qrd.dtsi +++ b/qcom/khaje-qrd.dtsi @@ -323,15 +323,162 @@ }; &thermal_zones { - quiet-therm-step { - status = "ok"; + quiet-thermal-step { + polling-delay-passive = <2000>; + polling-delay = <0>; + thermal-governor = "step_wise"; + thermal-sensors = <&pm6125_adc_tm ADC_AMUX_THM2_PU2>; + wake-capable-sensor; + + trips { + quiet_batt_trip0: batt-trip0 { + temperature = <41000>; + hysteresis = <2000>; + type = "passive"; + }; + + quiet_modem_trip0: modem-trip0 { + temperature = <42000>; + hysteresis = <2000>; + type = "passive"; + }; + + quiet_batt_trip1: batt-trip1 { + temperature = <43000>; + hysteresis = <2000>; + type = "passive"; + }; + + quiet_batt_trip2: batt-trip2 { + temperature = <45000>; + hysteresis = <2000>; + type = "passive"; + }; + + quiet_gold_trip: gold-trip { + temperature = <47000>; + hysteresis = <0>; + type = "passive"; + }; + + quiet_batt_trip3: batt-trip3 { + temperature = <47000>; + hysteresis = <2000>; + type = "passive"; + }; + + quiet_batt_trip4: batt-trip4 { + temperature = <48000>; + hysteresis = <1000>; + type = "passive"; + }; + + quiet_gpu_trip: gpu-trip { + temperature = <48000>; + hysteresis = <4000>; + type = "passive"; + }; + + quiet_silver_trip: silver-trip { + temperature = <50000>; + hysteresis = <0>; + type = "passive"; + }; + + quiet_hvx_trip: hvx-trip { + temperature = <52000>; + hysteresis = <4000>; + type = "passive"; + }; + + quiet_modem_trip1: modem-trip1 { + temperature = <60000>; + hysteresis = <4000>; + type = "passive"; + }; + }; cooling-maps { + gold_cdev { + trip = <&quiet_gold_trip>; + /* limit to 1766400khz */ + cooling-device = <&CPU4 THERMAL_NO_LIMIT + (THERMAL_MAX_LIMIT-4)>; + }; + silver_cdev { + trip = <&quiet_silver_trip>; /* limit to 1516800khz */ cooling-device = <&CPU0 THERMAL_NO_LIMIT (THERMAL_MAX_LIMIT-4)>; }; + + gpu_cdev { + trip = <&quiet_gpu_trip>; + /* limit 785000000hz */ + cooling-device = <&msm_gpu THERMAL_NO_LIMIT + (THERMAL_MAX_LIMIT-3)>; + }; + + hvx_cdev { + trip = <&quiet_hvx_trip>; + cooling-device = <&cdsp_sw 4 4>; + }; + + mdm_cdev0 { + trip = <&quiet_modem_trip0>; + cooling-device = <&modem_proc 1 1>; + }; + + mdm_cdev1 { + trip = <&quiet_modem_trip1>; + cooling-device = <&modem_proc 3 3>; + }; + }; + }; + + pa-therm0-step { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-governor = "step_wise"; + thermal-sensors = <&pm6125_adc_tm ADC_AMUX_THM1_PU2>; + wake-capable-sensor; + + trips { + pa_therm0_trip0: pa-therm0-trip0 { + temperature = <52000>; + hysteresis = <2000>; + type = "passive"; + }; + + pa_therm0_trip1: pa-therm0-trip1 { + temperature = <54000>; + hysteresis = <2000>; + type = "passive"; + }; + + pa_therm0_trip2: pa-therm0-trip2 { + temperature = <60000>; + hysteresis = <4000>; + type = "passive"; + }; + }; + + cooling-maps { + modem_cdev0 { + trip = <&pa_therm0_trip0>; + cooling-device = <&modem_pa 1 1>; + }; + + modem_cdev1 { + trip = <&pa_therm0_trip1>; + cooling-device = <&modem_pa 2 2>; + }; + + modem_cdev2 { + trip = <&pa_therm0_trip2>; + cooling-device = <&modem_pa 3 3>; + }; }; }; }; diff --git a/qcom/khaje-sde-display.dtsi b/qcom/khaje-sde-display.dtsi index d31b659b..e3c3b4bf 100644 --- a/qcom/khaje-sde-display.dtsi +++ b/qcom/khaje-sde-display.dtsi @@ -59,7 +59,8 @@ msm_notifier: qcom,msm_notifier@0 { compatible = "qcom,msm-notifier"; - panel = <&dsi_nt36672e_fhd_plus_90hz_video>; + panel = <&dsi_nt36672e_fhd_plus_90hz_video + &dsi_nt36672e_fhd_plus_120hz_video>; }; }; diff --git a/qcom/khaje-usb.dtsi b/qcom/khaje-usb.dtsi index 55e53706..849cdf38 100644 --- a/qcom/khaje-usb.dtsi +++ b/qcom/khaje-usb.dtsi @@ -50,8 +50,6 @@ qcom,dwc-usb3-msm-tx-fifo-size = <21288>; qcom,gsi-disable-io-coherency; - qcom,pm-qos-latency = <43>; /* CPU0-WFI-LVL latency +1 */ - qcom,msm-bus,name = "usb0"; qcom,msm-bus,num-cases = <4>; qcom,msm-bus,num-paths = <3>; diff --git a/qcom/khaje.dtsi b/qcom/khaje.dtsi index d5e31f80..28c4c58d 100644 --- a/qcom/khaje.dtsi +++ b/qcom/khaje.dtsi @@ -4180,6 +4180,10 @@ tpdm_turing_llm: tpdm@8861000 { #include "pm8008.dtsi" }; +&pm8008_regulators { + /delete-property/ qcom,enable-ocp-broadcast; +}; + &pm8008_8 { /* PM8008 IRQ STAT */ interrupt-parent = <&tlmm>; diff --git a/qcom/kona-arglass.dtsi b/qcom/kona-arglass.dtsi index ee915f62..f892b1ee 100644 --- a/qcom/kona-arglass.dtsi +++ b/qcom/kona-arglass.dtsi @@ -2,6 +2,7 @@ #include "kona-pmic-overlay.dtsi" #include "kona-sde-display.dtsi" #include "kona-audio-overlay.dtsi" +#include "kona-audio-overlay-ar.dtsi" #include "kona-thermal-overlay.dtsi" #include "kona-xr-pinctrl-overlay.dtsi" #include "camera/kona-camera-sensor-arglass.dtsi" @@ -125,9 +126,9 @@ }; &vendor { - kona_xrfusion_batterydata: qcom,battery-data { + kona_arglass_batterydata: qcom,battery-data { qcom,batt-id-range-pct = <15>; - #include "fg-gen4-batterydata-goertek-6100mah.dtsi" + #include "fg-gen4-batterydata-goertek-650mah.dtsi" }; }; @@ -387,22 +388,24 @@ "sbux_res", "vph_voltage", "chg_temp"; - qcom,battery-data = <&kona_xrfusion_batterydata>; + qcom,battery-data = <&kona_arglass_batterydata>; qcom,sw-jeita-enable; qcom,wd-bark-time-secs = <16>; qcom,suspend-input-on-debug-batt; + qcom,hvdcp-disable; qcom,thermal-mitigation = <5325000 4500000 4000000 3500000 3000000 2500000 2000000 1500000 1000000 500000>; }; &pm8150b_fg { status = "ok"; - qcom,battery-data = <&kona_xrfusion_batterydata>; + qcom,battery-data = <&kona_arglass_batterydata>; qcom,hold-soc-while-full; qcom,linearize-soc; qcom,five-pin-battery; qcom,cl-wt-enable; qcom,soc-scale-mode-en; + qcom,fg-force-load-profile; /* ESR fast calibration */ qcom,fg-esr-timer-chg-fast = <0 7>; qcom,fg-esr-timer-dischg-fast = <0 7>; @@ -917,6 +920,82 @@ status = "disabled"; }; +&kona_snd_ar { + qcom,model = "kona-arglass-snd-card"; + qcom,mi2s-audio-intf = <0>; + qcom,audio-routing = + "TX DMIC0", "Digital Mic0", + "TX DMIC1", "Digital Mic1", + "TX DMIC2", "Digital Mic2", + "TX DMIC3", "Digital Mic3", + "TX DMIC4", "Digital Mic4", + "IN1_HPHL", "HPHL_OUT", + "IN2_HPHR", "HPHR_OUT", + "IN3_AUX", "AUX_OUT", + "TX SWR_ADC0", "ADC1_OUTPUT", + "TX SWR_ADC1", "ADC2_OUTPUT", + "TX SWR_ADC2", "ADC3_OUTPUT", + "TX SWR_ADC3", "ADC4_OUTPUT", + "TX SWR_DMIC0", "DMIC1_OUTPUT", + "TX SWR_DMIC1", "DMIC2_OUTPUT", + "TX SWR_DMIC2", "DMIC3_OUTPUT", + "TX SWR_DMIC3", "DMIC4_OUTPUT", + "TX SWR_DMIC4", "DMIC5_OUTPUT", + "TX SWR_DMIC5", "DMIC6_OUTPUT", + "TX SWR_DMIC6", "DMIC7_OUTPUT", + "TX SWR_DMIC7", "DMIC8_OUTPUT", + "WSA SRC0_INP", "SRC0", + "WSA_TX DEC0_INP", "TX DEC0 MUX", + "WSA_TX DEC1_INP", "TX DEC1 MUX", + "RX_TX DEC0_INP", "TX DEC0 MUX", + "RX_TX DEC1_INP", "TX DEC1 MUX", + "RX_TX DEC2_INP", "TX DEC2 MUX", + "RX_TX DEC3_INP", "TX DEC3 MUX", + "SpkrRight IN", "WSA_SPK2 OUT", + "VA_AIF1 CAP", "VA_SWR_CLK", + "VA_AIF2 CAP", "VA_SWR_CLK", + "VA_AIF3 CAP", "VA_SWR_CLK", + "VA DMIC0", "Digital Mic0", + "VA DMIC1", "Digital Mic1", + "VA DMIC2", "Digital Mic2", + "VA DMIC3", "Digital Mic3", + "VA DMIC4", "Digital Mic4", + "VA SWR_ADC1", "VA_SWR_CLK", + "VA SWR_MIC0", "VA_SWR_CLK", + "VA SWR_MIC1", "VA_SWR_CLK", + "VA SWR_MIC2", "VA_SWR_CLK", + "VA SWR_MIC3", "VA_SWR_CLK", + "VA SWR_MIC4", "VA_SWR_CLK", + "VA SWR_MIC5", "VA_SWR_CLK", + "VA SWR_MIC6", "VA_SWR_CLK", + "VA SWR_MIC7", "VA_SWR_CLK", + "VA SWR_MIC0", "DMIC1_OUTPUT", + "VA SWR_MIC1", "DMIC2_OUTPUT", + "VA SWR_MIC2", "DMIC3_OUTPUT", + "VA SWR_MIC3", "DMIC4_OUTPUT", + "VA SWR_MIC4", "DMIC5_OUTPUT", + "VA SWR_MIC5", "DMIC6_OUTPUT", + "VA SWR_MIC6", "DMIC7_OUTPUT", + "VA SWR_MIC7", "DMIC8_OUTPUT", + "VA SWR_ADC1", "ADC2_OUTPUT"; + qcom,msm-mbhc-hphl-swh = <0>; + qcom,msm-mbhc-gnd-swh = <0>; + qcom,codec-max-aux-devs = <0>; + /delete-property/ qcom,codec-aux-devs; +}; + +&wcd938x_tx_slave_ar { + status = "disabled"; +}; + +&wcd938x_rx_slave_ar { + status = "disabled"; +}; + +&wcd938x_codec_ar { + status = "disabled"; +}; + &pm8150a_l4 { qcom,init-voltage = <2800000>; }; @@ -980,3 +1059,9 @@ qcom,strobe-sel = <1>; status = "okay"; }; + +&pm8150b_pdphy { + /* Restricting only to 5V@3A */ + qcom,default-sink-caps = <5000 3000>; /* 5V @ 3A */ +}; + diff --git a/qcom/kona-audio-ar.dtsi b/qcom/kona-audio-ar.dtsi new file mode 100644 index 00000000..edefccc3 --- /dev/null +++ b/qcom/kona-audio-ar.dtsi @@ -0,0 +1,109 @@ +#include <dt-bindings/sound/qcom,gpr.h> + +&glink_adsp { + audio_gpr: qcom,gpr { + compatible = "qcom,gpr"; + qcom,glink-channels = "adsp_apps"; + qcom,intents = <0x200 20>; + reg = <GPR_DOMAIN_ADSP>; + spf_core { + compatible = "qcom,spf_core"; + reg = <GPR_SVC_ADSP_CORE>; + }; + + audio-pkt { + compatible = "qcom,audio-pkt"; + qcom,audiopkt-ch-name = "apr_audio_svc"; + reg = <GPR_SVC_MAX>; + }; + + audio_prm: q6prm { + compatible = "qcom,audio_prm"; + reg = <GPR_SVC_ASM>; + }; + + voice-mhi { + compatible = "qcom,voice_mhi_gpr"; + reg = <GPR_SVC_VPM>; + }; + }; +}; + +&soc { + spf_core_platform: spf_core_platform { + compatible = "qcom,spf-core-platform"; + }; + + audio_pkt_core_platform: qcom,audio-pkt-core-platform { + compatible = "qcom,audio-pkt-core-platform"; + }; +}; + +&spf_core_platform { + msm_audio_ion_ar: qcom,msm-audio-ion-ar { + compatible = "qcom,msm-audio-ion"; + qcom,smmu-version = <2>; + qcom,smmu-enabled; + iommus = <&apps_smmu 0x1801 0x0>; + qcom,iommu-dma-addr-pool = <0x10000000 0x10000000>; + qcom,smmu-sid-mask = /bits/ 64 <0xf>; + }; + + lpass_core_hw_vote_ar: vote_lpass_core_hw_ar { + compatible = "qcom,audio-ref-clk"; + qcom,codec-ext-clk-src = <AUDIO_LPASS_CORE_HW_VOTE>; + #clock-cells = <1>; + }; + + lpass_audio_hw_vote_ar: vote_lpass_audio_hw_ar { + compatible = "qcom,audio-ref-clk"; + qcom,codec-ext-clk-src = <AUDIO_LPASS_AUDIO_HW_VOTE>; + #clock-cells = <1>; + }; + + bolero_ar: bolero-cdc-ar { + compatible = "qcom,bolero-codec"; + clock-names = "lpass_core_hw_vote", + "lpass_audio_hw_vote"; + clocks = <&lpass_core_hw_vote_ar 0>, + <&lpass_audio_hw_vote_ar 0>; + bolero-clk-rsc-mngr-ar { + compatible = "qcom,bolero-clk-rsc-mngr"; + }; + + tx_macro_ar: tx-macro-ar@3220000 { + swr_ar2: tx_swr_master_ar { + }; + }; + + rx_macro_ar: rx-macro-ar@3200000 { + swr_ar1: rx_swr_master_ar { + }; + }; + + wsa_macro_ar: wsa-macro-ar@3240000 { + swr_ar0: wsa_swr_master_ar { + }; + }; + }; + + voice_mhi_audio_ar: qcom,voice-mhi-audio-ar { + compatible = "qcom,voice-mhi-audio"; + memory-region = <&mailbox_mem>; + voice_mhi_voting; + }; + + kona_snd_ar: sound_ar { + compatible = "qcom,kona-asoc-snd"; + qcom,mi2s-audio-intf = <1>; + qcom,auxpcm-audio-intf = <1>; + qcom,tdm-audio-intf = <1>; + qcom,wcn-bt = <0>; + qcom,ext-disp-audio-rx = <0>; + qcom,afe-rxtx-lb = <0>; + + clock-names = "lpass_audio_hw_vote"; + clocks = <&lpass_audio_hw_vote_ar 0>; + fsa4480-i2c-handle = <&fsa4480>; + }; +}; diff --git a/qcom/kona-audio-overlay-ar.dtsi b/qcom/kona-audio-overlay-ar.dtsi new file mode 100644 index 00000000..8cc61d5d --- /dev/null +++ b/qcom/kona-audio-overlay-ar.dtsi @@ -0,0 +1,382 @@ +#include "kona-lpi-ar.dtsi" +#include "kona-va-bolero-ar.dtsi" + +&bolero_ar { + qcom,num-macros = <4>; + bolero-clk-rsc-mngr-ar { + compatible = "qcom,bolero-clk-rsc-mngr"; + qcom,fs-gen-sequence = <0x3000 0x1>, + <0x3004 0x1>, <0x3080 0x2>; + qcom,rx_mclk_mode_muxsel = <0x033240D8>; + qcom,wsa_mclk_mode_muxsel = <0x033220D8>; + qcom,va_mclk_mode_muxsel = <0x033A0000>; + clock-names = "tx_core_clk", "tx_npl_clk", "rx_core_clk", "rx_npl_clk", + "wsa_core_clk", "wsa_npl_clk", "va_core_clk", "va_npl_clk"; + clocks = <&clock_audio_tx_1 0>, <&clock_audio_tx_2 0>, + <&clock_audio_rx_1 0>, <&clock_audio_rx_2 0>, + <&clock_audio_wsa_1 0>, <&clock_audio_wsa_2 0>, + <&clock_audio_va_1 0>, <&clock_audio_va_2 0>; + }; + + tx_macro_ar: tx-macro-ar@3220000 { + compatible = "qcom,tx-macro"; + reg = <0x3220000 0x0>; + clock-names = "tx_core_clk", "tx_npl_clk"; + clocks = <&clock_audio_tx_1 0>, + <&clock_audio_tx_2 0>; + qcom,tx-swr-gpios = <&tx_swr_gpios_ar>; + qcom,tx-dmic-sample-rate = <2400000>; + swr_ar2: tx_swr_master_ar { + compatible = "qcom,swr-mstr"; + #address-cells = <2>; + #size-cells = <0>; + clock-names = "lpass_core_hw_vote", + "lpass_audio_hw_vote"; + clocks = <&lpass_core_hw_vote_ar 0>, + <&lpass_audio_hw_vote_ar 0>; + qcom,swr-master-version = <0x01050001>; + qcom,swr_master_id = <3>; + qcom,mipi-sdw-block-packing-mode = <1>; + swrm-io-base = <0x3230000 0x0>; + interrupts-extended = + <&intc GIC_SPI 297 IRQ_TYPE_LEVEL_HIGH>, + <&pdc 109 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "swr_master_irq", "swr_wake_irq"; + qcom,swr-wakeup-required = <1>; + qcom,swr-num-ports = <5>; + qcom,swr-port-mapping = <1 PCM_OUT1 0xF>, + <2 ADC1 0x1>, <2 ADC2 0x2>, + <3 ADC3 0x1>, <3 ADC4 0x2>, + <4 DMIC0 0x1>, <4 DMIC1 0x2>, + <4 DMIC2 0x4>, <4 DMIC3 0x8>, + <5 DMIC4 0x1>, <5 DMIC5 0x2>, + <5 DMIC6 0x4>, <5 DMIC7 0x8>; + qcom,swr-num-dev = <1>; + qcom,swr-clock-stop-mode0 = <1>; + qcom,swr-mstr-irq-wakeup-capable = <1>; + wcd938x_tx_slave_ar: wcd938x-tx-slave_ar { + compatible = "qcom,wcd938x-slave"; + reg = <0x0D 0x01170223>; + }; + }; + }; + + rx_macro_ar: rx-macro-ar@3200000 { + compatible = "qcom,rx-macro"; + reg = <0x3200000 0x0>; + clock-names = "rx_core_clk", "rx_npl_clk"; + clocks = <&clock_audio_rx_1 0>, + <&clock_audio_rx_2 0>; + qcom,rx-swr-gpios = <&rx_swr_gpios_ar>; + qcom,rx_mclk_mode_muxsel = <0x033240D8>; + qcom,rx-bcl-pmic-params = /bits/ 8 <0x00 0x04 0x3E>; + qcom,default-clk-id = <TX_CORE_CLK>; + swr_ar1: rx_swr_master_ar { + compatible = "qcom,swr-mstr"; + #address-cells = <2>; + #size-cells = <0>; + clock-names = "lpass_core_hw_vote", + "lpass_audio_hw_vote"; + clocks = <&lpass_core_hw_vote_ar 0>, + <&lpass_audio_hw_vote_ar 0>; + qcom,swr-master-version = <0x01050001>; + qcom,swr_master_id = <2>; + qcom,mipi-sdw-block-packing-mode = <1>; + swrm-io-base = <0x3210000 0x0>; + interrupts = <GIC_SPI 298 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "swr_master_irq"; + qcom,swr-num-ports = <5>; + qcom,disable-div2-clk-switch = <1>; + qcom,swr-port-mapping = <1 HPH_L 0x1>, + <1 HPH_R 0x2>, <2 CLSH 0x1>, + <3 COMP_L 0x1>, <3 COMP_R 0x2>, + <4 LO 0x1>, <5 DSD_L 0x1>, + <5 DSD_R 0x2>; + qcom,swr-num-dev = <1>; + qcom,swr-clock-stop-mode0 = <1>; + wcd938x_rx_slave_ar: wcd938x-rx-slave-ar { + compatible = "qcom,wcd938x-slave"; + reg = <0x0D 0x01170224>; + }; + }; + }; + + wsa_macro_ar: wsa-macro-ar@3240000 { + compatible = "qcom,wsa-macro"; + reg = <0x3240000 0x0>; + clock-names = "wsa_core_clk", "wsa_npl_clk"; + clocks = <&clock_audio_wsa_1 0>, + <&clock_audio_wsa_2 0>; + qcom,wsa-swr-gpios = <&wsa_swr_gpios_ar>; + qcom,wsa-bcl-pmic-params = /bits/ 8 <0x00 0x04 0x3E>; + qcom,default-clk-id = <TX_CORE_CLK>; + swr_ar0: wsa_swr_master_ar { + compatible = "qcom,swr-mstr"; + #address-cells = <2>; + #size-cells = <0>; + clock-names = "lpass_core_hw_vote", + "lpass_audio_hw_vote"; + clocks = <&lpass_core_hw_vote_ar 0>, + <&lpass_audio_hw_vote_ar 0>; + qcom,swr-master-version = <0x01050001>; + qcom,swr_master_id = <1>; + qcom,mipi-sdw-block-packing-mode = <0>; + swrm-io-base = <0x3250000 0x0>; + interrupts = <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "swr_master_irq"; + qcom,swr-num-ports = <8>; + qcom,swr-port-mapping = <1 SPKR_L 0x1>, + <2 SPKR_L_COMP 0xF>, <3 SPKR_L_BOOST 0x3>, + <4 SPKR_R 0x1>, <5 SPKR_R_COMP 0xF>, + <6 SPKR_R_BOOST 0x3>, <7 SPKR_L_VI 0x3>, + <8 SPKR_R_VI 0x3>; + qcom,swr-num-dev = <2>; + wsa881x_0211_ar: wsa881x_ar@20170211 { + compatible = "qcom,wsa881x"; + reg = <0x10 0x20170211>; + qcom,spkr-sd-n-node = <&wsa_spkr_en1>; + qcom,bolero-handle = <&bolero_ar>; + }; + + wsa881x_0212_ar: wsa881x_ar@20170212 { + compatible = "qcom,wsa881x"; + reg = <0x10 0x20170212>; + qcom,spkr-sd-n-node = <&wsa_spkr_en2>; + qcom,bolero-handle = <&bolero_ar>; + }; + + wsa881x_0213_ar: wsa881x_ar@21170213 { + compatible = "qcom,wsa881x"; + reg = <0x10 0x21170213>; + qcom,spkr-sd-n-node = <&wsa_spkr_en1>; + qcom,bolero-handle = <&bolero_ar>; + }; + + wsa881x_0214_ar: wsa881x_ar@21170214 { + compatible = "qcom,wsa881x"; + reg = <0x10 0x21170214>; + qcom,spkr-sd-n-node = <&wsa_spkr_en2>; + qcom,bolero-handle = <&bolero_ar>; + }; + }; + + }; + + wcd938x_codec_ar: wcd938x-codec-ar { + compatible = "qcom,wcd938x-codec"; + qcom,split-codec = <1>; + qcom,rx_swr_ch_map = <0 HPH_L 0x1 0 HPH_L>, + <0 HPH_R 0x2 0 HPH_R>, <1 CLSH 0x1 0 CLSH>, + <2 COMP_L 0x1 0 COMP_L>, <2 COMP_R 0x2 0 COMP_R>, + <3 LO 0x1 0 LO>, <4 DSD_L 0x1 0 DSD_L>, + <4 DSD_R 0x2 0 DSD_R>; + qcom,tx_swr_ch_map = <0 ADC1 0x1 0 ADC1>, + <0 ADC2 0x2 0 ADC2>, <1 ADC3 0x1 0 ADC3>, + <1 ADC4 0x2 0 ADC4>, <2 DMIC0 0x1 0 DMIC0>, + <2 DMIC1 0x2 0 DMIC1>, <2 MBHC 0x4 0 DMIC2>, + <2 DMIC2 0x4 0 DMIC2>, <2 DMIC3 0x8 0 DMIC3>, + <3 DMIC4 0x1 0 DMIC4>, <3 DMIC5 0x2 0 DMIC5>, + <3 DMIC6 0x4 0 DMIC6>, <3 DMIC7 0x8 0 DMIC7>; + + qcom,wcd-rst-gpio-node = <&wcd938x_rst_gpio>; + qcom,rx-slave = <&wcd938x_rx_slave_ar>; + qcom,tx-slave = <&wcd938x_tx_slave_ar>; + + cdc-vdd-rxtx-supply = <&S4A>; + qcom,cdc-vdd-rxtx-voltage = <1800000 1800000>; + qcom,cdc-vdd-rxtx-current = <30000>; + + cdc-vddio-supply = <&S4A>; + qcom,cdc-vddio-voltage = <1800000 1800000>; + qcom,cdc-vddio-current = <30000>; + + cdc-vdd-buck-supply = <&S4A>; + qcom,cdc-vdd-buck-voltage = <1800000 1800000>; + qcom,cdc-vdd-buck-current = <650000>; + + cdc-vdd-mic-bias-supply = <&BOB>; + qcom,cdc-vdd-mic-bias-voltage = <3296000 3296000>; + qcom,cdc-vdd-mic-bias-current = <30000>; + + qcom,cdc-micbias1-mv = <1800>; + qcom,cdc-micbias2-mv = <1800>; + qcom,cdc-micbias3-mv = <1800>; + qcom,cdc-micbias4-mv = <1800>; + + qcom,cdc-static-supplies = "cdc-vdd-rxtx", + "cdc-vddio", + "cdc-vdd-buck", + "cdc-vdd-mic-bias"; + }; + +}; + +&kona_snd_ar { + qcom,model = "kona-mtp-snd-card"; + qcom,msm-mi2s-master = <1>, <1>, <1>, <1>, <1>, <1>; + qcom,mi2s-tdm-is-hw-vote-needed = <1>, <0>, <1>, <0>, <0>, <0>; + qcom,wcn-bt = <0>; + qcom,ext-disp-audio-rx = <1>; + qcom,tdm-max-slots = <8>; + qcom,tdm-clk-attribute = <0x1>, <0x1>, <0x1>, <0x1>, <0x1>, <0x1>; + qcom,mi2s-clk-attribute = <0x1>, <0x1>, <0x1>, <0x1>, <0x1>, <0x1>; + qcom,audio-routing = + "AMIC1", "MIC BIAS1", + "MIC BIAS1", "Analog Mic1", + "AMIC2", "MIC BIAS2", + "MIC BIAS2", "Analog Mic2", + "AMIC3", "MIC BIAS3", + "MIC BIAS3", "Analog Mic3", + "AMIC4", "MIC BIAS3", + "MIC BIAS3", "Analog Mic4", + "AMIC5", "MIC BIAS4", + "MIC BIAS4", "Analog Mic5", + "TX DMIC0", "MIC BIAS3", + "MIC BIAS3", "Digital Mic0", + "TX DMIC1", "MIC BIAS3", + "MIC BIAS3", "Digital Mic1", + "TX DMIC2", "MIC BIAS1", + "MIC BIAS1", "Digital Mic2", + "TX DMIC3", "MIC BIAS1", + "MIC BIAS1", "Digital Mic3", + "TX DMIC4", "MIC BIAS4", + "MIC BIAS4", "Digital Mic4", + "TX DMIC5", "MIC BIAS4", + "MIC BIAS4", "Digital Mic5", + "IN1_HPHL", "HPHL_OUT", + "IN2_HPHR", "HPHR_OUT", + "IN3_AUX", "AUX_OUT", + "TX SWR_ADC0", "ADC1_OUTPUT", + "TX SWR_ADC1", "ADC2_OUTPUT", + "TX SWR_ADC2", "ADC3_OUTPUT", + "TX SWR_ADC3", "ADC4_OUTPUT", + "TX SWR_DMIC0", "DMIC1_OUTPUT", + "TX SWR_DMIC1", "DMIC2_OUTPUT", + "TX SWR_DMIC2", "DMIC3_OUTPUT", + "TX SWR_DMIC3", "DMIC4_OUTPUT", + "TX SWR_DMIC4", "DMIC5_OUTPUT", + "TX SWR_DMIC5", "DMIC6_OUTPUT", + "TX SWR_DMIC6", "DMIC7_OUTPUT", + "TX SWR_DMIC7", "DMIC8_OUTPUT", + "WSA SRC0_INP", "SRC0", + "WSA_TX DEC0_INP", "TX DEC0 MUX", + "WSA_TX DEC1_INP", "TX DEC1 MUX", + "RX_TX DEC0_INP", "TX DEC0 MUX", + "RX_TX DEC1_INP", "TX DEC1 MUX", + "RX_TX DEC2_INP", "TX DEC2 MUX", + "RX_TX DEC3_INP", "TX DEC3 MUX", + "SpkrLeft IN", "WSA_SPK1 OUT", + "SpkrRight IN", "WSA_SPK2 OUT", + "VA_AIF1 CAP", "VA_SWR_CLK", + "VA_AIF2 CAP", "VA_SWR_CLK", + "VA_AIF3 CAP", "VA_SWR_CLK", + "VA MIC BIAS3", "Digital Mic0", + "VA MIC BIAS3", "Digital Mic1", + "VA MIC BIAS1", "Digital Mic2", + "VA MIC BIAS1", "Digital Mic3", + "VA MIC BIAS4", "Digital Mic4", + "VA MIC BIAS4", "Digital Mic5", + "VA DMIC0", "VA MIC BIAS3", + "VA DMIC1", "VA MIC BIAS3", + "VA DMIC2", "VA MIC BIAS1", + "VA DMIC3", "VA MIC BIAS1", + "VA DMIC4", "VA MIC BIAS4", + "VA DMIC5", "VA MIC BIAS4", + "VA SWR_ADC0", "VA_SWR_CLK", + "VA SWR_ADC1", "VA_SWR_CLK", + "VA SWR_ADC2", "VA_SWR_CLK", + "VA SWR_ADC3", "VA_SWR_CLK", + "VA SWR_MIC0", "VA_SWR_CLK", + "VA SWR_MIC1", "VA_SWR_CLK", + "VA SWR_MIC2", "VA_SWR_CLK", + "VA SWR_MIC3", "VA_SWR_CLK", + "VA SWR_MIC4", "VA_SWR_CLK", + "VA SWR_MIC5", "VA_SWR_CLK", + "VA SWR_MIC6", "VA_SWR_CLK", + "VA SWR_MIC7", "VA_SWR_CLK", + "VA SWR_ADC0", "ADC1_OUTPUT", + "VA SWR_ADC1", "ADC2_OUTPUT", + "VA SWR_ADC2", "ADC3_OUTPUT", + "VA SWR_ADC3", "ADC4_OUTPUT", + "VA SWR_MIC0", "DMIC1_OUTPUT", + "VA SWR_MIC1", "DMIC2_OUTPUT", + "VA SWR_MIC2", "DMIC3_OUTPUT", + "VA SWR_MIC3", "DMIC4_OUTPUT", + "VA SWR_MIC4", "DMIC5_OUTPUT", + "VA SWR_MIC5", "DMIC6_OUTPUT", + "VA SWR_MIC6", "DMIC7_OUTPUT", + "VA SWR_MIC7", "DMIC8_OUTPUT"; + qcom,msm-mbhc-hphl-swh = <1>; + qcom,msm-mbhc-gnd-swh = <1>; + qcom,cdc-dmic01-gpios = <&cdc_dmic01_gpios_ar>; + qcom,cdc-dmic23-gpios = <&cdc_dmic23_gpios_ar>; + qcom,cdc-dmic45-gpios = <&cdc_dmic45_gpios_ar>; + asoc-codec = <&stub_codec>, <&bolero_ar>, <&ext_disp_audio_codec>; + asoc-codec-names = "msm-stub-codec.1", "bolero_codec", + "msm-ext-disp-audio-codec-rx"; + qcom,wsa-max-devs = <2>; + qcom,wsa-devs = <&wsa881x_0211_ar>, <&wsa881x_0212_ar>, + <&wsa881x_0213_ar>, <&wsa881x_0214_ar>; + qcom,wsa-aux-dev-prefix = "SpkrLeft", "SpkrRight", + "SpkrLeft", "SpkrRight"; + qcom,codec-max-aux-devs = <1>; + qcom,codec-aux-devs = <&wcd938x_codec_ar>; + qcom,msm_audio_ssr_devs = <&audio_gpr>, <&lpi_tlmm_ar>, + <&bolero_ar>; +}; + +&spf_core_platform { + cdc_dmic01_gpios_ar: cdc_dmic01_pinctrl_ar { + compatible = "qcom,msm-cdc-pinctrl"; + pinctrl-names = "aud_active", "aud_sleep"; + pinctrl-0 = <&cdc_dmic01_clk_active_ar &cdc_dmic01_data_active_ar>; + pinctrl-1 = <&cdc_dmic01_clk_sleep_ar &cdc_dmic01_data_sleep_ar>; + qcom,lpi-gpios; + }; + + cdc_dmic23_gpios_ar: cdc_dmic23_pinctrl_ar { + compatible = "qcom,msm-cdc-pinctrl"; + pinctrl-names = "aud_active", "aud_sleep"; + pinctrl-0 = <&cdc_dmic23_clk_active_ar &cdc_dmic23_data_active_ar>; + pinctrl-1 = <&cdc_dmic23_clk_sleep_ar &cdc_dmic23_data_sleep_ar>; + qcom,lpi-gpios; + }; + + cdc_dmic45_gpios_ar: cdc_dmic45_pinctrl_ar { + compatible = "qcom,msm-cdc-pinctrl"; + pinctrl-names = "aud_active", "aud_sleep"; + pinctrl-0 = <&cdc_dmic45_clk_active_ar &cdc_dmic45_data_active_ar>; + pinctrl-1 = <&cdc_dmic45_clk_sleep_ar &cdc_dmic45_data_sleep_ar>; + qcom,lpi-gpios; + qcom,tlmm-gpio = <158>; + }; + + wsa_swr_gpios_ar: wsa_swr_clk_data_pinctrl_ar { + compatible = "qcom,msm-cdc-pinctrl"; + pinctrl-names = "aud_active", "aud_sleep"; + pinctrl-0 = <&wsa_swr_clk_active_ar &wsa_swr_data_active_ar>; + pinctrl-1 = <&wsa_swr_clk_sleep_ar &wsa_swr_data_sleep_ar>; + qcom,lpi-gpios; + }; + + rx_swr_gpios_ar: rx_swr_clk_data_pinctrl_ar { + compatible = "qcom,msm-cdc-pinctrl"; + pinctrl-names = "aud_active", "aud_sleep"; + pinctrl-0 = <&rx_swr_clk_active_ar &rx_swr_data_active_ar + &rx_swr_data1_active_ar>; + pinctrl-1 = <&rx_swr_clk_sleep_ar &rx_swr_data_sleep_ar + &rx_swr_data1_sleep_ar>; + qcom,lpi-gpios; + }; + + tx_swr_gpios_ar: tx_swr_clk_data_pinctrl_ar { + compatible = "qcom,msm-cdc-pinctrl"; + pinctrl-names = "aud_active", "aud_sleep"; + pinctrl-0 = <&tx_swr_clk_active_ar &tx_swr_data1_active_ar + &tx_swr_data2_active_ar>; + pinctrl-1 = <&tx_swr_clk_sleep_ar &tx_swr_data1_sleep_ar + &tx_swr_data2_sleep_ar>; + qcom,lpi-gpios; + qcom,tlmm-gpio = <147>; + }; +}; diff --git a/qcom/kona-cdp-lcd-tron-overlay.dts b/qcom/kona-cdp-lcd-tron-overlay.dts new file mode 100644 index 00000000..efee808e --- /dev/null +++ b/qcom/kona-cdp-lcd-tron-overlay.dts @@ -0,0 +1,14 @@ +/dts-v1/; +/plugin/; + +#include "kona-cdp-lcd.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. kona CDP (LCD) tron"; + compatible = "qcom,kona-cdp", "qcom,kona", "qcom,cdp"; + qcom,board-id = <0x01020001 0>; +}; + +&mdm0 { + status = "disabled"; +}; diff --git a/qcom/kona-cdp-lcd-tron.dts b/qcom/kona-cdp-lcd-tron.dts new file mode 100644 index 00000000..b367423c --- /dev/null +++ b/qcom/kona-cdp-lcd-tron.dts @@ -0,0 +1,14 @@ +/dts-v1/; + +#include "kona.dtsi" +#include "kona-cdp-lcd.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. kona CDP (LCD) tron"; + compatible = "qcom,kona-cdp", "qcom,kona", "qcom,cdp"; + qcom,board-id = <0x01020001 0>; +}; + +&mdm0 { + status = "disabled"; +}; diff --git a/qcom/kona-cdp-lcd.dtsi b/qcom/kona-cdp-lcd.dtsi index a73e6a22..c5013f27 100644 --- a/qcom/kona-cdp-lcd.dtsi +++ b/qcom/kona-cdp-lcd.dtsi @@ -40,6 +40,19 @@ /delete-property/ qcom,platform-en-gpio; }; +&dsi_nt36672e_fhd_plus_60_video { + qcom,panel-supply-entries = <&dsi_panel_pwr_supply_lab_ibb>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled"; + + qcom,esd-check-enabled; + qcom,mdss-dsi-panel-status-check-mode = "reg_read"; + qcom,mdss-dsi-panel-status-command = [06 01 00 01 00 00 01 0a]; + qcom,mdss-dsi-panel-status-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-panel-status-value = <0x9c>; + qcom,mdss-dsi-panel-status-read-length = <1>; + /delete-property/ qcom,platform-en-gpio; +}; + &dsi_sharp_qsync_wqhd_cmd { qcom,esd-check-enabled; qcom,mdss-dsi-panel-status-check-mode = "reg_read"; diff --git a/qcom/kona-cdp.dtsi b/qcom/kona-cdp.dtsi index 19e30f64..cb06ea89 100644 --- a/qcom/kona-cdp.dtsi +++ b/qcom/kona-cdp.dtsi @@ -202,6 +202,26 @@ panel = <&dsi_r66451_amoled_144hz_cmd>; }; + + novatek@62 { + compatible = "novatek,NVT-ts"; + reg = <0x62>; + + interrupt-parent = <&tlmm>; + interrupts = <39 0x2008>; + + pinctrl-names = "pmx_ts_active", "pmx_ts_suspend", + "pmx_ts_release"; + pinctrl-0 = <&ts_active>; + pinctrl-1 = <&ts_int_suspend &ts_reset_suspend>; + pinctrl-2 = <&pmx_ts_release>; + + novatek,reset-gpio = <&tlmm 38 0x00>; + novatek,irq-gpio = <&tlmm 39 0x2008>; + + panel = <&dsi_nt36672e_fhd_plus_60_video>; + + }; }; &vendor { @@ -309,6 +329,15 @@ qcom,platform-en-gpio = <&tlmm 60 0>; }; +&dsi_nt36672e_fhd_plus_60_video { + qcom,panel-supply-entries = <&dsi_panel_pwr_supply_avdd>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_external"; + qcom,mdss-dsi-bl-min-level = <1>; + qcom,mdss-dsi-bl-max-level = <4095>; + qcom,platform-reset-gpio = <&tlmm 75 0>; + qcom,platform-en-gpio = <&tlmm 60 0>; +}; + &dsi_sharp_1080_cmd { qcom,panel-supply-entries = <&dsi_panel_pwr_supply_avdd>; qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_external"; diff --git a/qcom/kona-lpi-ar.dtsi b/qcom/kona-lpi-ar.dtsi new file mode 100644 index 00000000..adb00ed4 --- /dev/null +++ b/qcom/kona-lpi-ar.dtsi @@ -0,0 +1,1679 @@ +&spf_core_platform { + lpi_tlmm_ar: lpi_pinctrl_ar { + compatible = "qcom,lpi-pinctrl"; + reg = <0x33c0000 0x0>; + qcom,slew-reg = <0x355a000 0x0>; + qcom,num-gpios = <14>; + gpio-controller; + #gpio-cells = <2>; + qcom,lpi-offset-tbl = <0x00000000>, <0x00001000>, + <0x00002000>, <0x00003000>, + <0x00004000>, <0x00005000>, + <0x00006000>, <0x00007000>, + <0x00008000>, <0x00009000>, + <0x0000A000>, <0x0000B000>, + <0x0000C000>, <0x0000D000>; + qcom,lpi-slew-offset-tbl = <0x00000000>, <0x00000002>, + <0x00000004>, <0x00000008>, + <0x0000000A>, <0x0000000C>, + <0x00000000>, <0x00000000>, + <0x00000000>, <0x00000000>, + <0x00000010>, <0x00000012>, + <0x00000000>, <0x00000000>; + + clock-names = "lpass_core_hw_vote", + "lpass_audio_hw_vote"; + clocks = <&lpass_core_hw_vote_ar 0>, + <&lpass_audio_hw_vote_ar 0>; + + quat_mi2s_sck_ar { + quat_mi2s_sck_sleep_ar: quat_mi2s_sck_sleep_ar { + mux { + pins = "gpio0"; + function = "func2"; + }; + + config { + pins = "gpio0"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + quat_mi2s_sck_active_ar: quat_mi2s_sck_active_ar { + mux { + pins = "gpio0"; + function = "func2"; + }; + + config { + pins = "gpio0"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + quat_mi2s_ws_ar { + quat_mi2s_ws_sleep_ar: quat_mi2s_ws_sleep_ar { + mux { + pins = "gpio1"; + function = "func2"; + }; + + config { + pins = "gpio1"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + quat_mi2s_ws_active_ar: quat_mi2s_ws_active_ar { + mux { + pins = "gpio1"; + function = "func2"; + }; + + config { + pins = "gpio1"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + quat_mi2s_sd0_ar { + quat_mi2s_sd0_sleep_ar: quat_mi2s_sd0_sleep_ar { + mux { + pins = "gpio2"; + function = "func2"; + }; + + config { + pins = "gpio2"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + quat_mi2s_sd0_active_ar: quat_mi2s_sd0_active_ar { + mux { + pins = "gpio2"; + function = "func2"; + }; + + config { + pins = "gpio2"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + quat_mi2s_sd1_ar { + quat_mi2s_sd1_sleep_ar: quat_mi2s_sd1_sleep_ar { + mux { + pins = "gpio3"; + function = "func2"; + }; + + config { + pins = "gpio3"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + quat_mi2s_sd1_active_ar: quat_mi2s_sd1_active_ar { + mux { + pins = "gpio3"; + function = "func2"; + }; + + config { + pins = "gpio3"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + quat_mi2s_sd2_ar { + quat_mi2s_sd2_sleep_ar: quat_mi2s_sd2_sleep_ar { + mux { + pins = "gpio4"; + function = "func2"; + }; + + config { + pins = "gpio4"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + quat_mi2s_sd2_active_ar: quat_mi2s_sd2_active_ar { + mux { + pins = "gpio4"; + function = "func2"; + }; + + config { + pins = "gpio4"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + quat_mi2s_sd3_ar { + quat_mi2s_sd3_sleep_ar: quat_mi2s_sd3_sleep_ar { + mux { + pins = "gpio5"; + function = "func4"; + }; + + config { + pins = "gpio5"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + quat_mi2s_sd3_active_ar: quat_mi2s_sd3_active_ar { + mux { + pins = "gpio5"; + function = "func4"; + }; + + config { + pins = "gpio5"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_i2s1_sck_ar { + lpi_i2s1_sck_sleep_ar: lpi_i2s1_sck_sleep_ar { + mux { + pins = "gpio6"; + function = "func2"; + }; + + config { + pins = "gpio6"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_i2s1_sck_active_ar: lpi_i2s1_sck_active_ar { + mux { + pins = "gpio6"; + function = "func2"; + }; + + config { + pins = "gpio6"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_i2s1_ws_ar { + lpi_i2s1_ws_sleep_ar: lpi_i2s1_ws_sleep_ar { + mux { + pins = "gpio7"; + function = "func2"; + }; + + config { + pins = "gpio7"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_i2s1_ws_active_ar: lpi_i2s1_ws_active_ar { + mux { + pins = "gpio7"; + function = "func2"; + }; + + config { + pins = "gpio7"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_i2s1_sd0_ar { + lpi_i2s1_sd0_sleep_ar: lpi_i2s1_sd0_sleep_ar { + mux { + pins = "gpio8"; + function = "func2"; + }; + + config { + pins = "gpio8"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_i2s1_sd0_active_ar: lpi_i2s1_sd0_active_ar { + mux { + pins = "gpio8"; + function = "func2"; + }; + + config { + pins = "gpio8"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_i2s1_sd1_ar { + lpi_i2s1_sd1_sleep_ar: lpi_i2s1_sd1_sleep_ar { + mux { + pins = "gpio9"; + function = "func2"; + }; + + config { + pins = "gpio9"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_i2s1_sd1_active_ar: lpi_i2s1_sd1_active_ar { + mux { + pins = "gpio9"; + function = "func2"; + }; + + config { + pins = "gpio9"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_i2s2_sck_ar { + lpi_i2s2_sck_sleep_ar: lpi_i2s2_sck_sleep_ar { + mux { + pins = "gpio10"; + function = "func1"; + }; + + config { + pins = "gpio10"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_i2s2_sck_active_ar: lpi_i2s2_sck_active_ar { + mux { + pins = "gpio10"; + function = "func1"; + }; + + config { + pins = "gpio10"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_i2s2_ws_ar { + lpi_i2s2_ws_sleep_ar: lpi_i2s2_ws_sleep_ar { + mux { + pins = "gpio11"; + function = "func1"; + }; + + config { + pins = "gpio11"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_i2s2_ws_active_ar: lpi_i2s2_ws_active_ar { + mux { + pins = "gpio11"; + function = "func1"; + }; + + config { + pins = "gpio11"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_i2s2_sd0_ar { + lpi_i2s2_sd0_sleep_ar: lpi_i2s2_sd0_sleep_ar { + mux { + pins = "gpio12"; + function = "func2"; + }; + + config { + pins = "gpio12"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_i2s2_sd0_active_ar: lpi_i2s2_sd0_active_ar { + mux { + pins = "gpio12"; + function = "func2"; + }; + + config { + pins = "gpio12"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_i2s2_sd1_ar { + lpi_i2s2_sd1_sleep_ar: lpi_i2s2_sd1_sleep_ar { + mux { + pins = "gpio13"; + function = "func2"; + }; + + config { + pins = "gpio13"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_i2s2_sd1_active_ar: lpi_i2s2_sd1_active_ar { + mux { + pins = "gpio13"; + function = "func2"; + }; + + config { + pins = "gpio13"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + quat_tdm_sck_ar { + quat_tdm_sck_sleep_ar: quat_tdm_sck_sleep_ar { + mux { + pins = "gpio0"; + function = "func2"; + }; + + config { + pins = "gpio0"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + quat_tdm_sck_active_ar: quat_tdm_sck_active_ar { + mux { + pins = "gpio0"; + function = "func2"; + }; + + config { + pins = "gpio0"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + quat_tdm_ws_ar { + quat_tdm_ws_sleep_ar: quat_tdm_ws_sleep_ar { + mux { + pins = "gpio1"; + function = "func2"; + }; + + config { + pins = "gpio1"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + quat_tdm_ws_active_ar: quat_tdm_ws_active_ar { + mux { + pins = "gpio1"; + function = "func2"; + }; + + config { + pins = "gpio1"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + quat_tdm_sd0_ar { + quat_tdm_sd0_sleep_ar: quat_tdm_sd0_sleep_ar { + mux { + pins = "gpio2"; + function = "func2"; + }; + + config { + pins = "gpio2"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + quat_tdm_sd0_active_ar: quat_tdm_sd0_active_ar { + mux { + pins = "gpio2"; + function = "func2"; + }; + + config { + pins = "gpio2"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + quat_tdm_sd1_ar { + quat_tdm_sd1_sleep_ar: quat_tdm_sd1_sleep_ar { + mux { + pins = "gpio3"; + function = "func2"; + }; + + config { + pins = "gpio3"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + quat_tdm_sd1_active_ar: quat_tdm_sd1_active_ar { + mux { + pins = "gpio3"; + function = "func2"; + }; + + config { + pins = "gpio3"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + quat_tdm_sd2_ar { + quat_tdm_sd2_sleep_ar: quat_tdm_sd2_sleep_ar { + mux { + pins = "gpio4"; + function = "func2"; + }; + + config { + pins = "gpio4"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + quat_tdm_sd2_active_ar: quat_tdm_sd2_active_ar { + mux { + pins = "gpio4"; + function = "func2"; + }; + + config { + pins = "gpio4"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + quat_tdm_sd3_ar { + quat_tdm_sd3_sleep_ar: quat_tdm_sd3_sleep_ar { + mux { + pins = "gpio5"; + function = "func4"; + }; + + config { + pins = "gpio5"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + quat_tdm_sd3_active_ar: quat_tdm_sd3_active_ar { + mux { + pins = "gpio5"; + function = "func4"; + }; + + config { + pins = "gpio5"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_tdm1_sck_ar { + lpi_tdm1_sck_sleep_ar: lpi_tdm1_sck_sleep_ar { + mux { + pins = "gpio6"; + function = "func2"; + }; + + config { + pins = "gpio6"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_tdm1_sck_active_ar: lpi_tdm1_sck_active_ar { + mux { + pins = "gpio6"; + function = "func2"; + }; + + config { + pins = "gpio6"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_tdm1_ws_ar { + lpi_tdm1_ws_sleep_ar: lpi_tdm1_ws_sleep_ar { + mux { + pins = "gpio7"; + function = "func2"; + }; + + config { + pins = "gpio7"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_tdm1_ws_active_ar: lpi_tdm1_ws_active_ar { + mux { + pins = "gpio7"; + function = "func2"; + }; + + config { + pins = "gpio7"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_tdm1_sd0_ar { + lpi_tdm1_sd0_sleep_ar: lpi_tdm1_sd0_sleep_ar { + mux { + pins = "gpio8"; + function = "func2"; + }; + + config { + pins = "gpio8"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_tdm1_sd0_active_ar: lpi_tdm1_sd0_active_ar { + mux { + pins = "gpio8"; + function = "func2"; + }; + + config { + pins = "gpio8"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_tdm1_sd1_ar { + lpi_tdm1_sd1_sleep_ar: lpi_tdm1_sd1_sleep_ar { + mux { + pins = "gpio9"; + function = "func2"; + }; + + config { + pins = "gpio9"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_tdm1_sd1_active_ar: lpi_tdm1_sd1_active_ar { + mux { + pins = "gpio9"; + function = "func2"; + }; + + config { + pins = "gpio9"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_tdm2_sck_ar { + lpi_tdm2_sck_sleep_ar: lpi_tdm2_sck_sleep_ar { + mux { + pins = "gpio10"; + function = "func1"; + }; + + config { + pins = "gpio10"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_tdm2_sck_active_ar: lpi_tdm2_sck_active_ar { + mux { + pins = "gpio10"; + function = "func1"; + }; + + config { + pins = "gpio10"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_tdm2_ws_ar { + lpi_tdm2_ws_sleep_ar: lpi_tdm2_ws_sleep_ar { + mux { + pins = "gpio11"; + function = "func1"; + }; + + config { + pins = "gpio11"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_tdm2_ws_active_ar: lpi_tdm2_ws_active_ar { + mux { + pins = "gpio11"; + function = "func1"; + }; + + config { + pins = "gpio11"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_tdm2_sd0_ar { + lpi_tdm2_sd0_sleep_ar: lpi_tdm2_sd0_sleep_ar { + mux { + pins = "gpio12"; + function = "func2"; + }; + + config { + pins = "gpio12"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_tdm2_sd0_active_ar: lpi_tdm2_sd0_active_ar { + mux { + pins = "gpio12"; + function = "func2"; + }; + + config { + pins = "gpio12"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_tdm2_sd1_ar { + lpi_tdm2_sd1_sleep_ar: lpi_tdm2_sd1_sleep_ar { + mux { + pins = "gpio13"; + function = "func2"; + }; + + config { + pins = "gpio13"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_tdm2_sd1_active_ar: lpi_tdm2_sd1_active_ar { + mux { + pins = "gpio13"; + function = "func2"; + }; + + config { + pins = "gpio13"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + quat_aux_sck_ar { + quat_aux_sck_sleep_ar: quat_aux_sck_sleep_ar { + mux { + pins = "gpio0"; + function = "func2"; + }; + + config { + pins = "gpio0"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + quat_aux_sck_active_ar: quat_aux_sck_active_ar { + mux { + pins = "gpio0"; + function = "func2"; + }; + + config { + pins = "gpio0"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + quat_aux_ws_ar { + quat_aux_ws_sleep_ar: quat_aux_ws_sleep_ar { + mux { + pins = "gpio1"; + function = "func2"; + }; + + config { + pins = "gpio1"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + quat_aux_ws_active_ar: quat_aux_ws_active_ar { + mux { + pins = "gpio1"; + function = "func2"; + }; + + config { + pins = "gpio1"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + quat_aux_sd0_ar { + quat_aux_sd0_sleep_ar: quat_aux_sd0_sleep_ar { + mux { + pins = "gpio2"; + function = "func2"; + }; + + config { + pins = "gpio2"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + quat_aux_sd0_active_ar: quat_aux_sd0_active_ar { + mux { + pins = "gpio2"; + function = "func2"; + }; + + config { + pins = "gpio2"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + quat_aux_sd1_ar { + quat_aux_sd1_sleep_ar: quat_aux_sd1_sleep_ar { + mux { + pins = "gpio3"; + function = "func2"; + }; + + config { + pins = "gpio3"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + quat_aux_sd1_active_ar: quat_aux_sd1_active_ar { + mux { + pins = "gpio3"; + function = "func2"; + }; + + config { + pins = "gpio3"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + quat_aux_sd2_ar { + quat_aux_sd2_sleep_ar: quat_aux_sd2_sleep_ar { + mux { + pins = "gpio4"; + function = "func2"; + }; + + config { + pins = "gpio4"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + quat_aux_sd2_active_ar: quat_aux_sd2_active_ar { + mux { + pins = "gpio4"; + function = "func2"; + }; + + config { + pins = "gpio4"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + quat_aux_sd3_ar { + quat_aux_sd3_sleep_ar: quat_aux_sd3_sleep_ar { + mux { + pins = "gpio5"; + function = "func4"; + }; + + config { + pins = "gpio5"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + quat_aux_sd3_active_ar: quat_aux_sd3_active_ar { + mux { + pins = "gpio5"; + function = "func4"; + }; + + config { + pins = "gpio5"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_aux1_sck_ar { + lpi_aux1_sck_sleep_ar: lpi_aux1_sck_sleep_ar { + mux { + pins = "gpio6"; + function = "func2"; + }; + + config { + pins = "gpio6"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_aux1_sck_active_ar: lpi_aux1_sck_active_ar { + mux { + pins = "gpio6"; + function = "func2"; + }; + + config { + pins = "gpio6"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_aux1_ws_ar { + lpi_aux1_ws_sleep_ar: lpi_aux1_ws_sleep_ar { + mux { + pins = "gpio7"; + function = "func2"; + }; + + config { + pins = "gpio7"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_aux1_ws_active_ar: lpi_aux1_ws_active_ar { + mux { + pins = "gpio7"; + function = "func2"; + }; + + config { + pins = "gpio7"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_aux1_sd0_ar { + lpi_aux1_sd0_sleep_ar: lpi_aux1_sd0_sleep_ar { + mux { + pins = "gpio8"; + function = "func2"; + }; + + config { + pins = "gpio8"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_aux1_sd0_active_ar: lpi_aux1_sd0_active_ar { + mux { + pins = "gpio8"; + function = "func2"; + }; + + config { + pins = "gpio8"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_aux1_sd1_ar { + lpi_aux1_sd1_sleep_ar: lpi_aux1_sd1_sleep_ar { + mux { + pins = "gpio9"; + function = "func2"; + }; + + config { + pins = "gpio9"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_aux1_sd1_active_ar: lpi_aux1_sd1_active_ar { + mux { + pins = "gpio9"; + function = "func2"; + }; + + config { + pins = "gpio9"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_aux2_sck_ar { + lpi_aux2_sck_sleep_ar: lpi_aux2_sck_sleep_ar { + mux { + pins = "gpio10"; + function = "func1"; + }; + + config { + pins = "gpio10"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_aux2_sck_active_ar: lpi_aux2_sck_active_ar { + mux { + pins = "gpio10"; + function = "func1"; + }; + + config { + pins = "gpio10"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_aux2_ws_ar { + lpi_aux2_ws_sleep_ar: lpi_aux2_ws_sleep_ar { + mux { + pins = "gpio11"; + function = "func1"; + }; + + config { + pins = "gpio11"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_aux2_ws_active_ar: lpi_aux2_ws_active_ar { + mux { + pins = "gpio11"; + function = "func1"; + }; + + config { + pins = "gpio11"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_aux2_sd0_ar { + lpi_aux2_sd0_sleep_ar: lpi_aux2_sd0_sleep_ar { + mux { + pins = "gpio12"; + function = "func2"; + }; + + config { + pins = "gpio12"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_aux2_sd0_active_ar: lpi_aux2_sd0_active_ar { + mux { + pins = "gpio12"; + function = "func2"; + }; + + config { + pins = "gpio12"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + lpi_aux2_sd1_ar { + lpi_aux2_sd1_sleep_ar: lpi_aux2_sd1_sleep_ar { + mux { + pins = "gpio13"; + function = "func2"; + }; + + config { + pins = "gpio13"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + lpi_aux2_sd1_active_ar: lpi_aux2_sd1_active_ar { + mux { + pins = "gpio13"; + function = "func2"; + }; + + config { + pins = "gpio13"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + wsa_swr_clk_pin_ar { + wsa_swr_clk_sleep_ar: wsa_swr_clk_sleep_ar { + mux { + pins = "gpio10"; + function = "func2"; + }; + + config { + pins = "gpio10"; + drive-strength = <2>; + input-enable; + bias-pull-down; + }; + }; + + wsa_swr_clk_active_ar: wsa_swr_clk_active_ar { + mux { + pins = "gpio10"; + function = "func2"; + }; + + config { + pins = "gpio10"; + drive-strength = <2>; + slew-rate = <1>; + bias-disable; + }; + }; + }; + + wsa_swr_data_pin_ar { + wsa_swr_data_sleep_ar: wsa_swr_data_sleep_ar { + mux { + pins = "gpio11"; + function = "func2"; + }; + + config { + pins = "gpio11"; + drive-strength = <2>; + input-enable; + bias-pull-down; + }; + }; + + wsa_swr_data_active_ar: wsa_swr_data_active_ar { + mux { + pins = "gpio11"; + function = "func2"; + }; + + config { + pins = "gpio11"; + drive-strength = <2>; + slew-rate = <1>; + bias-bus-hold; + }; + }; + }; + + tx_swr_clk_sleep_ar: tx_swr_clk_sleep_ar { + mux { + pins = "gpio0"; + function = "func1"; + input-enable; + bias-pull-down; + }; + + config { + pins = "gpio0"; + drive-strength = <2>; + }; + }; + + tx_swr_clk_active_ar: tx_swr_clk_active_ar { + mux { + pins = "gpio0"; + function = "func1"; + }; + + config { + pins = "gpio0"; + drive-strength = <2>; + slew-rate = <1>; + bias-disable; + }; + }; + + tx_swr_data1_sleep_ar: tx_swr_data1_sleep_ar { + mux { + pins = "gpio1"; + function = "func1"; + }; + + config { + pins = "gpio1"; + drive-strength = <2>; + input-enable; + bias-bus-hold; + }; + }; + + tx_swr_data1_active_ar: tx_swr_data1_active_ar { + mux { + pins = "gpio1"; + function = "func1"; + }; + + config { + pins = "gpio1"; + drive-strength = <2>; + slew-rate = <1>; + bias-bus-hold; + }; + }; + + tx_swr_data2_sleep_ar: tx_swr_data2_sleep_ar { + mux { + pins = "gpio2"; + function = "func1"; + }; + + config { + pins = "gpio2"; + drive-strength = <2>; + input-enable; + bias-pull-down; + }; + }; + + tx_swr_data2_active_ar: tx_swr_data2_active_ar { + mux { + pins = "gpio2"; + function = "func1"; + }; + + config { + pins = "gpio2"; + drive-strength = <2>; + slew-rate = <1>; + bias-bus-hold; + }; + }; + + rx_swr_clk_sleep_ar: rx_swr_clk_sleep_ar { + mux { + pins = "gpio3"; + function = "func1"; + }; + + config { + pins = "gpio3"; + drive-strength = <2>; + input-enable; + bias-pull-down; + }; + }; + + rx_swr_clk_active_ar: rx_swr_clk_active_ar { + mux { + pins = "gpio3"; + function = "func1"; + }; + + config { + pins = "gpio3"; + drive-strength = <2>; + slew-rate = <1>; + bias-disable; + }; + }; + + rx_swr_data_sleep_ar: rx_swr_data_sleep_ar { + mux { + pins = "gpio4"; + function = "func1"; + }; + + config { + pins = "gpio4"; + drive-strength = <2>; + input-enable; + bias-pull-down; + }; + }; + + rx_swr_data_active_ar: rx_swr_data_active_ar { + mux { + pins = "gpio4"; + function = "func1"; + }; + + config { + pins = "gpio4"; + drive-strength = <2>; + slew-rate = <1>; + bias-bus-hold; + }; + }; + + rx_swr_data1_sleep_ar: rx_swr_data1_sleep_ar { + mux { + pins = "gpio5"; + function = "func2"; + }; + + config { + pins = "gpio5"; + drive-strength = <2>; + input-enable; + bias-pull-down; + }; + }; + + rx_swr_data1_active_ar: rx_swr_data1_active_ar { + mux { + pins = "gpio5"; + function = "func2"; + }; + + config { + pins = "gpio5"; + drive-strength = <2>; + slew-rate = <1>; + bias-bus-hold; + }; + }; + + cdc_dmic01_clk_active_ar: dmic01_clk_active_ar { + mux { + pins = "gpio6"; + function = "func1"; + }; + + config { + pins = "gpio6"; + drive-strength = <8>; + output-high; + }; + }; + + cdc_dmic01_clk_sleep_ar: dmic01_clk_sleep_ar { + mux { + pins = "gpio6"; + function = "func1"; + }; + + config { + pins = "gpio6"; + drive-strength = <2>; + bias-disable; + output-low; + }; + }; + + cdc_dmic01_data_active_ar: dmic01_data_active_ar { + mux { + pins = "gpio7"; + function = "func1"; + }; + + config { + pins = "gpio7"; + drive-strength = <8>; + input-enable; + }; + }; + + cdc_dmic01_data_sleep_ar: dmic01_data_sleep_ar { + mux { + pins = "gpio7"; + function = "func1"; + }; + + config { + pins = "gpio7"; + drive-strength = <2>; + pull-down; + input-enable; + }; + }; + + cdc_dmic23_clk_active_ar: dmic23_clk_active_ar { + mux { + pins = "gpio8"; + function = "func1"; + }; + + config { + pins = "gpio8"; + drive-strength = <8>; + output-high; + }; + }; + + cdc_dmic23_clk_sleep_ar: dmic23_clk_sleep_ar { + mux { + pins = "gpio8"; + function = "func1"; + }; + + config { + pins = "gpio8"; + drive-strength = <2>; + bias-disable; + output-low; + }; + }; + + cdc_dmic23_data_active_ar: dmic23_data_active_ar { + mux { + pins = "gpio9"; + function = "func1"; + }; + + config { + pins = "gpio9"; + drive-strength = <8>; + input-enable; + }; + }; + + cdc_dmic23_data_sleep_ar: dmic23_data_sleep_ar { + mux { + pins = "gpio9"; + function = "func1"; + }; + + config { + pins = "gpio9"; + drive-strength = <2>; + pull-down; + input-enable; + }; + }; + + cdc_dmic45_clk_active_ar: dmic45_clk_active_ar { + mux { + pins = "gpio12"; + function = "func1"; + }; + + config { + pins = "gpio12"; + drive-strength = <8>; + output-high; + }; + }; + + cdc_dmic45_clk_sleep_ar: dmic45_clk_sleep_ar { + mux { + pins = "gpio12"; + function = "func1"; + }; + + config { + pins = "gpio12"; + drive-strength = <2>; + bias-disable; + output-low; + }; + }; + + cdc_dmic45_data_active_ar: dmic45_data_active_ar { + mux { + pins = "gpio13"; + function = "func1"; + }; + + config { + pins = "gpio13"; + drive-strength = <8>; + input-enable; + }; + }; + + cdc_dmic45_data_sleep_ar: dmic45_data_sleep_ar { + mux { + pins = "gpio13"; + function = "func1"; + }; + + config { + pins = "gpio13"; + drive-strength = <2>; + pull-down; + input-enable; + }; + }; + }; +}; diff --git a/qcom/kona-mtp.dtsi b/qcom/kona-mtp.dtsi index 6c64598e..476ccf0e 100644 --- a/qcom/kona-mtp.dtsi +++ b/qcom/kona-mtp.dtsi @@ -5,6 +5,7 @@ #include "kona-sde-display.dtsi" #include "camera/kona-camera-sensor-mtp.dtsi" #include "kona-audio-overlay.dtsi" +#include "kona-audio-overlay-ar.dtsi" #include "kona-thermal-overlay.dtsi" &qupv3_se12_2uart { diff --git a/qcom/kona-sde-display.dtsi b/qcom/kona-sde-display.dtsi index 5a6bf555..22911ac4 100644 --- a/qcom/kona-sde-display.dtsi +++ b/qcom/kona-sde-display.dtsi @@ -23,6 +23,7 @@ #include "dsi-panel-xrsmrtvwr-jdi-dual-video.dtsi" #include "dsi-panel-r66451-dsc-fhd-plus-144hz-cmd.dtsi" #include "dsi-panel-arglass-seeya-dual-1080p-video.dtsi" +#include "dsi-panel-nt36672e-fhd-plus-60hz-video.dtsi" #include <dt-bindings/clock/mdss-7nm-pll-clk.h> &tlmm { @@ -557,6 +558,18 @@ }; }; +&dsi_nt36672e_fhd_plus_60_video { + qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0"; + qcom,mdss-dsi-display-timings { + timing@0 { + qcom,mdss-dsi-panel-phy-timings = [00 13 05 04 1f 1e 05 + 05 03 02 04 00 12 14]; + qcom,display-topology = <1 0 1>; + qcom,default-topology-index = <0>; + }; + }; +}; + &dsi_sharp_1080_cmd { qcom,ulps-enabled; qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0"; diff --git a/qcom/kona-v2.1-iot-rb5.dtsi b/qcom/kona-v2.1-iot-rb5.dtsi index a81bced5..4b2aa986 100644 --- a/qcom/kona-v2.1-iot-rb5.dtsi +++ b/qcom/kona-v2.1-iot-rb5.dtsi @@ -196,6 +196,10 @@ }; &soc { + msm_vidc: qcom,vidc@aa00000 { + compatible = "qcom,msm-vidc", "qcom,qcs8250-vidc"; + }; + clk40M: can_clock { compatible = "fixed-clock"; #clock-cells = <0>; diff --git a/qcom/kona-va-bolero-ar.dtsi b/qcom/kona-va-bolero-ar.dtsi new file mode 100644 index 00000000..b4622311 --- /dev/null +++ b/qcom/kona-va-bolero-ar.dtsi @@ -0,0 +1,15 @@ +&bolero_ar { + va_macro_ar: va-macro-ar@3370000 { + compatible = "qcom,va-macro"; + reg = <0x3370000 0x0>; + clock-names = "lpass_audio_hw_vote"; + clocks = <&lpass_audio_hw_vote_ar 0>; + va-vdd-micb-supply = <&S4A>; + qcom,va-vdd-micb-voltage = <1800000 1800000>; + qcom,va-vdd-micb-current = <11200>; + qcom,va-dmic-sample-rate = <600000>; + qcom,va-clk-mux-select = <1>; + qcom,va-island-mode-muxsel = <0x033A0000>; + qcom,default-clk-id = <TX_CORE_CLK>; + }; +}; diff --git a/qcom/kona-xrfusion-ult.dtsi b/qcom/kona-xrfusion-ult.dtsi index 95437f54..d9c69782 100644 --- a/qcom/kona-xrfusion-ult.dtsi +++ b/qcom/kona-xrfusion-ult.dtsi @@ -2,6 +2,7 @@ #include "kona-pmic-overlay.dtsi" #include "kona-sde-display.dtsi" #include "kona-audio-overlay.dtsi" +#include "kona-audio-overlay-ar.dtsi" #include "kona-thermal-overlay.dtsi" #include "kona-xr-pinctrl-overlay.dtsi" #include "camera/kona-camera-sensor-xrfusion.dtsi" @@ -340,6 +341,92 @@ <&bolero>; }; +&kona_snd_ar { + qcom,model = "kona-xrfusionult-snd-card"; + qcom,mi2s-audio-intf = <0>; + qcom,audio-routing = + "AMIC1", "MIC BIAS1", + "MIC BIAS1", "Analog Mic1", + "AMIC2", "MIC BIAS2", + "MIC BIAS2", "Analog Mic2", + "AMIC3", "MIC BIAS3", + "MIC BIAS3", "Analog Mic3", + "AMIC4", "MIC BIAS4", + "MIC BIAS4", "Analog Mic4", + "AMIC5", "MIC BIAS4", + "MIC BIAS4", "Analog Mic5", + "DMIC1", "MIC BIAS1", + "MIC BIAS1", "Digital Mic0", + "DMIC2", "MIC BIAS1", + "MIC BIAS1", "Digital Mic1", + "DMIC3", "MIC BIAS1", + "MIC BIAS1", "Digital Mic2", + "DMIC4", "MIC BIAS1", + "MIC BIAS1", "Digital Mic3", + "DMIC5", "MIC BIAS3", + "MIC BIAS3", "Digital Mic4", + "DMIC6", "MIC BIAS3", + "MIC BIAS3", "Digital Mic5", + "DMIC7", "MIC BIAS4", + "MIC BIAS4", "Digital Mic6", + "DMIC8", "MIC BIAS4", + "MIC BIAS4", "Digital Mic7", + "IN1_HPHL", "HPHL_OUT", + "IN2_HPHR", "HPHR_OUT", + "IN3_AUX", "AUX_OUT", + "TX SWR_ADC0", "ADC1_OUTPUT", + "TX SWR_ADC1", "ADC2_OUTPUT", + "TX SWR_ADC2", "ADC3_OUTPUT", + "TX SWR_ADC3", "ADC4_OUTPUT", + "TX SWR_DMIC0", "DMIC1_OUTPUT", + "TX SWR_DMIC1", "DMIC2_OUTPUT", + "TX SWR_DMIC2", "DMIC3_OUTPUT", + "TX SWR_DMIC3", "DMIC4_OUTPUT", + "TX SWR_DMIC4", "DMIC5_OUTPUT", + "TX SWR_DMIC5", "DMIC6_OUTPUT", + "TX SWR_DMIC6", "DMIC7_OUTPUT", + "TX SWR_DMIC7", "DMIC8_OUTPUT", + "WSA SRC0_INP", "SRC0", + "WSA_TX DEC0_INP", "TX DEC0 MUX", + "WSA_TX DEC1_INP", "TX DEC1 MUX", + "RX_TX DEC0_INP", "TX DEC0 MUX", + "RX_TX DEC1_INP", "TX DEC1 MUX", + "RX_TX DEC2_INP", "TX DEC2 MUX", + "RX_TX DEC3_INP", "TX DEC3 MUX", + "SpkrRight IN", "WSA_SPK2 OUT", + "VA_AIF1 CAP", "VA_SWR_CLK", + "VA_AIF2 CAP", "VA_SWR_CLK", + "VA_AIF3 CAP", "VA_SWR_CLK", + "VA MIC BIAS3", "Digital Mic0", + "VA MIC BIAS3", "Digital Mic1", + "VA MIC BIAS1", "Digital Mic2", + "VA MIC BIAS1", "Digital Mic3", + "VA MIC BIAS4", "Digital Mic5", + "VA DMIC0", "VA MIC BIAS3", + "VA DMIC1", "VA MIC BIAS3", + "VA DMIC2", "VA MIC BIAS1", + "VA DMIC3", "VA MIC BIAS1", + "VA DMIC5", "VA MIC BIAS4", + "VA SWR_ADC1", "VA_SWR_CLK", + "VA SWR_MIC0", "VA_SWR_CLK", + "VA SWR_MIC1", "VA_SWR_CLK", + "VA SWR_MIC2", "VA_SWR_CLK", + "VA SWR_MIC3", "VA_SWR_CLK", + "VA SWR_MIC4", "VA_SWR_CLK", + "VA SWR_MIC5", "VA_SWR_CLK", + "VA SWR_MIC6", "VA_SWR_CLK", + "VA SWR_MIC7", "VA_SWR_CLK", + "VA SWR_MIC0", "DMIC1_OUTPUT", + "VA SWR_MIC1", "DMIC2_OUTPUT", + "VA SWR_MIC2", "DMIC3_OUTPUT", + "VA SWR_MIC3", "DMIC4_OUTPUT", + "VA SWR_MIC4", "DMIC5_OUTPUT", + "VA SWR_MIC5", "DMIC6_OUTPUT", + "VA SWR_MIC6", "DMIC7_OUTPUT", + "VA SWR_MIC7", "DMIC8_OUTPUT", + "VA SWR_ADC1", "ADC2_OUTPUT"; +}; + &pm8150_l10 { regulator-max-microvolt = <3304000>; qcom,init-voltage = <3304000>; diff --git a/qcom/kona-xrfusion.dtsi b/qcom/kona-xrfusion.dtsi index 2992e347..5d27eb9c 100644 --- a/qcom/kona-xrfusion.dtsi +++ b/qcom/kona-xrfusion.dtsi @@ -2,6 +2,7 @@ #include "kona-pmic-overlay.dtsi" #include "kona-sde-display.dtsi" #include "kona-audio-overlay.dtsi" +#include "kona-audio-overlay-ar.dtsi" #include "kona-thermal-overlay.dtsi" #include "kona-xr-pinctrl-overlay.dtsi" #include "camera/kona-camera-sensor-xrfusion.dtsi" @@ -298,6 +299,78 @@ <&bolero>; }; +&kona_snd_ar { + qcom,model = "kona-xrfusion-snd-card"; + qcom,mi2s-audio-intf = <0>; + qcom,audio-routing = + "AMIC2", "MIC BIAS2", + "MIC BIAS2", "Analog Mic2", + "TX DMIC0", "MIC BIAS1", + "MIC BIAS1", "Digital Mic0", + "TX DMIC1", "MIC BIAS1", + "MIC BIAS1", "Digital Mic1", + "TX DMIC2", "MIC BIAS4", + "MIC BIAS4", "Digital Mic2", + "TX DMIC3", "MIC BIAS4", + "MIC BIAS4", "Digital Mic3", + "TX DMIC5", "MIC BIAS3", + "MIC BIAS3", "Digital Mic5", + "IN1_HPHL", "HPHL_OUT", + "IN2_HPHR", "HPHR_OUT", + "IN3_AUX", "AUX_OUT", + "TX SWR_ADC0", "ADC1_OUTPUT", + "TX SWR_ADC1", "ADC2_OUTPUT", + "TX SWR_ADC2", "ADC3_OUTPUT", + "TX SWR_ADC3", "ADC4_OUTPUT", + "TX SWR_DMIC0", "DMIC1_OUTPUT", + "TX SWR_DMIC1", "DMIC2_OUTPUT", + "TX SWR_DMIC2", "DMIC3_OUTPUT", + "TX SWR_DMIC3", "DMIC4_OUTPUT", + "TX SWR_DMIC4", "DMIC5_OUTPUT", + "TX SWR_DMIC5", "DMIC6_OUTPUT", + "TX SWR_DMIC6", "DMIC7_OUTPUT", + "TX SWR_DMIC7", "DMIC8_OUTPUT", + "WSA SRC0_INP", "SRC0", + "WSA_TX DEC0_INP", "TX DEC0 MUX", + "WSA_TX DEC1_INP", "TX DEC1 MUX", + "RX_TX DEC0_INP", "TX DEC0 MUX", + "RX_TX DEC1_INP", "TX DEC1 MUX", + "RX_TX DEC2_INP", "TX DEC2 MUX", + "RX_TX DEC3_INP", "TX DEC3 MUX", + "SpkrRight IN", "WSA_SPK2 OUT", + "VA_AIF1 CAP", "VA_SWR_CLK", + "VA_AIF2 CAP", "VA_SWR_CLK", + "VA_AIF3 CAP", "VA_SWR_CLK", + "VA MIC BIAS3", "Digital Mic0", + "VA MIC BIAS3", "Digital Mic1", + "VA MIC BIAS1", "Digital Mic2", + "VA MIC BIAS1", "Digital Mic3", + "VA MIC BIAS4", "Digital Mic5", + "VA DMIC0", "VA MIC BIAS3", + "VA DMIC1", "VA MIC BIAS3", + "VA DMIC2", "VA MIC BIAS1", + "VA DMIC3", "VA MIC BIAS1", + "VA DMIC5", "VA MIC BIAS4", + "VA SWR_ADC1", "VA_SWR_CLK", + "VA SWR_MIC0", "VA_SWR_CLK", + "VA SWR_MIC1", "VA_SWR_CLK", + "VA SWR_MIC2", "VA_SWR_CLK", + "VA SWR_MIC3", "VA_SWR_CLK", + "VA SWR_MIC4", "VA_SWR_CLK", + "VA SWR_MIC5", "VA_SWR_CLK", + "VA SWR_MIC6", "VA_SWR_CLK", + "VA SWR_MIC7", "VA_SWR_CLK", + "VA SWR_MIC0", "DMIC1_OUTPUT", + "VA SWR_MIC1", "DMIC2_OUTPUT", + "VA SWR_MIC2", "DMIC3_OUTPUT", + "VA SWR_MIC3", "DMIC4_OUTPUT", + "VA SWR_MIC4", "DMIC5_OUTPUT", + "VA SWR_MIC5", "DMIC6_OUTPUT", + "VA SWR_MIC6", "DMIC7_OUTPUT", + "VA SWR_MIC7", "DMIC8_OUTPUT", + "VA SWR_ADC1", "ADC2_OUTPUT"; +}; + &pm8150_l10 { regulator-max-microvolt = <3304000>; qcom,init-voltage = <3304000>; diff --git a/qcom/kona.dtsi b/qcom/kona.dtsi index 65c1dd61..86300eda 100644 --- a/qcom/kona.dtsi +++ b/qcom/kona.dtsi @@ -55,6 +55,9 @@ swr0 = &swr0; swr1 = &swr1; swr2 = &swr2; + swr_ar0 = &swr_ar0; + swr_ar1 = &swr_ar1; + swr_ar2 = &swr_ar2; mhi-netdev0 = &mhi_netdev_0; }; @@ -5050,6 +5053,7 @@ #include "camera/kona-camera.dtsi" #include "kona-qupv3.dtsi" #include "kona-audio.dtsi" +#include "kona-audio-ar.dtsi" #include "kona-thermal.dtsi" #include "kona-vidc.dtsi" #include "kona-cvp.dtsi" diff --git a/qcom/litomagnus-cdp-overlay.dts b/qcom/litomagnus-cdp-overlay.dts index 878110c0..9924e3b2 100644 --- a/qcom/litomagnus-cdp-overlay.dts +++ b/qcom/litomagnus-cdp-overlay.dts @@ -11,11 +11,3 @@ qcom,msm-id = <400 0x20000>, <440 0x20000>; qcom,board-id = <1 1>; }; - -/* - * overriding adsp-fw-names with empty string - * to allow default adsp img load - */ -&adsp_loader { - adsp-fw-names=""; -}; diff --git a/qcom/litomagnus-mtp-overlay.dts b/qcom/litomagnus-mtp-overlay.dts index 58a6b346..4bce6191 100644 --- a/qcom/litomagnus-mtp-overlay.dts +++ b/qcom/litomagnus-mtp-overlay.dts @@ -11,11 +11,3 @@ qcom,msm-id = <400 0x20000>, <440 0x20000>; qcom,board-id = <8 1>; }; - -/* - * overriding adsp-fw-names with empty string - * to allow default adsp img load - */ -&adsp_loader { - adsp-fw-names=""; -}; diff --git a/qcom/msm8937-coresight.dtsi b/qcom/msm8937-coresight.dtsi index cbaa44a9..68477095 100644 --- a/qcom/msm8937-coresight.dtsi +++ b/qcom/msm8937-coresight.dtsi @@ -1,7 +1,7 @@ &soc { tmc_etr: tmc@6028000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b961>; + arm,primecell-periphid = <0x000bb961>; reg = <0x6028000 0x1000>, <0x6044000 0x15000>; @@ -10,9 +10,9 @@ interrupts = <0 166 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "byte-cntr-irq"; - arm,buffer-size = <0x100000>; - arm,sg-enable; + arm,buffer-size = <0x400000>; qcom,force-reg-dump; + arm,scatter-gather; coresight-name = "coresight-tmc-etr"; coresight-csr = <&csr>; @@ -32,7 +32,7 @@ tmc_etf: tmc@6027000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b961>; + arm,primecell-periphid = <0x000bb961>; reg = <0x6027000 0x1000>; reg-names = "tmc-base"; @@ -73,7 +73,7 @@ replicator: replicator@6026000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b909>; + arm,primecell-periphid = <0x000bb909>; reg = <0x6026000 0x1000>; reg-names = "replicator-base"; @@ -108,7 +108,7 @@ funnel_in0: funnel@6021000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b908>; + arm,primecell-periphid = <0x000bb908>; reg = <0x6021000 0x1000>; reg-names = "funnel-base"; @@ -178,7 +178,7 @@ funnel_center: funnel@6100000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b908>; + arm,primecell-periphid = <0x000bb908>; reg = <0x6100000 0x1000>; reg-names = "funnel-base"; @@ -222,7 +222,7 @@ funnel_right: funnel@6120000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b908>; + arm,primecell-periphid = <0x000bb908>; reg = <0x6120000 0x1000>; reg-names = "funnel-base"; @@ -266,7 +266,7 @@ funnel_mm: funnel@6130000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b908>; + arm,primecell-periphid = <0x000bb908>; reg = <0x6130000 0x1000>; reg-names = "funnel-base"; @@ -327,7 +327,7 @@ funnel_cam: funnel@6132000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b908>; + arm,primecell-periphid = <0x000bb908>; reg = <0x6132000 0x1000>; reg-names = "funnel-base"; @@ -347,7 +347,7 @@ funnel_apss: funnel@61a1000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b908>; + arm,primecell-periphid = <0x000bb908>; reg = <0x61a1000 0x1000>; reg-names = "funnel-base"; @@ -613,7 +613,7 @@ stm: stm@6002000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b962>; + arm,primecell-periphid = <0x000bb962>; reg = <0x6002000 0x1000>, <0x9280000 0x180000>; @@ -634,7 +634,7 @@ cti0: cti@6010000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b966>; + arm,primecell-periphid = <0x000bb966>; reg = <0x6010000 0x1000>; reg-names = "cti-base"; @@ -647,7 +647,7 @@ cti1: cti@6011000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b966>; + arm,primecell-periphid = <0x000bb966>; reg = <0x6011000 0x1000>; reg-names = "cti-base"; @@ -660,7 +660,7 @@ cti2: cti@6012000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b966>; + arm,primecell-periphid = <0x000bb966>; reg = <0x6012000 0x1000>; reg-names = "cti-base"; @@ -673,7 +673,7 @@ cti3: cti@6013000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b966>; + arm,primecell-periphid = <0x000bb966>; reg = <0x6013000 0x1000>; reg-names = "cti-base"; @@ -686,7 +686,7 @@ cti4: cti@6014000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b966>; + arm,primecell-periphid = <0x000bb966>; reg = <0x6014000 0x1000>; reg-names = "cti-base"; @@ -699,7 +699,7 @@ cti5: cti@6015000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b966>; + arm,primecell-periphid = <0x000bb966>; reg = <0x6015000 0x1000>; reg-names = "cti-base"; @@ -712,7 +712,7 @@ cti6: cti@6016000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b966>; + arm,primecell-periphid = <0x000bb966>; reg = <0x6016000 0x1000>; reg-names = "cti-base"; @@ -725,7 +725,7 @@ cti7: cti@6017000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b966>; + arm,primecell-periphid = <0x000bb966>; reg = <0x6017000 0x1000>; reg-names = "cti-base"; @@ -738,7 +738,7 @@ cti8: cti@6018000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b966>; + arm,primecell-periphid = <0x000bb966>; reg = <0x6018000 0x1000>; reg-names = "cti-base"; @@ -751,7 +751,7 @@ cti9: cti@6019000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b966>; + arm,primecell-periphid = <0x000bb966>; reg = <0x6019000 0x1000>; reg-names = "cti-base"; @@ -764,7 +764,7 @@ cti10: cti@601a000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b966>; + arm,primecell-periphid = <0x000bb966>; reg = <0x601a000 0x1000>; reg-names = "cti-base"; @@ -777,7 +777,7 @@ cti11: cti@601b000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b966>; + arm,primecell-periphid = <0x000bb966>; reg = <0x601b000 0x1000>; reg-names = "cti-base"; @@ -790,7 +790,7 @@ cti12: cti@601c000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b966>; + arm,primecell-periphid = <0x000bb966>; reg = <0x601c000 0x1000>; reg-names = "cti-base"; @@ -803,7 +803,7 @@ cti13: cti@601d000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b966>; + arm,primecell-periphid = <0x000bb966>; reg = <0x601d000 0x1000>; reg-names = "cti-base"; @@ -816,7 +816,7 @@ cti14: cti@601e000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b966>; + arm,primecell-periphid = <0x000bb966>; reg = <0x601e000 0x1000>; reg-names = "cti-base"; @@ -829,7 +829,7 @@ cti15: cti@601f000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b966>; + arm,primecell-periphid = <0x000bb966>; reg = <0x601f000 0x1000>; reg-names = "cti-base"; @@ -842,7 +842,7 @@ cti_cpu0: cti@61b8000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b966>; + arm,primecell-periphid = <0x000bb966>; reg = <0x61b8000 0x1000>; reg-names = "cti-base"; @@ -857,7 +857,7 @@ cti_cpu1: cti@61b9000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b966>; + arm,primecell-periphid = <0x000bb966>; reg = <0x61b9000 0x1000>; reg-names = "cti-base"; @@ -872,7 +872,7 @@ cti_cpu2: cti@61ba000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b966>; + arm,primecell-periphid = <0x000bb966>; reg = <0x61ba000 0x1000>; reg-names = "cti-base"; @@ -887,7 +887,7 @@ cti_cpu3: cti@61bb000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b966>; + arm,primecell-periphid = <0x000bb966>; reg = <0x61bb000 0x1000>; reg-names = "cti-base"; @@ -902,7 +902,7 @@ cti_cpu4: cti@6198000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b966>; + arm,primecell-periphid = <0x000bb966>; reg = <0x6198000 0x1000>; reg-names = "cti-base"; @@ -917,7 +917,7 @@ cti_cpu5: cti@6199000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b966>; + arm,primecell-periphid = <0x000bb966>; reg = <0x6199000 0x1000>; reg-names = "cti-base"; @@ -932,7 +932,7 @@ cti_cpu6: cti@619a000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b966>; + arm,primecell-periphid = <0x000bb966>; reg = <0x619a000 0x1000>; reg-names = "cti-base"; @@ -947,7 +947,7 @@ cti_cpu7: cti@619b000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b966>; + arm,primecell-periphid = <0x000bb966>; reg = <0x619b000 0x1000>; reg-names = "cti-base"; @@ -962,7 +962,7 @@ cti_modem_cpu0: cti@6124000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b966>; + arm,primecell-periphid = <0x000bb966>; reg = <0x6124000 0x1000>; reg-names = "cti-base"; @@ -976,7 +976,7 @@ /* Venus CTI */ cti_video_cpu0: cti@6035000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b966>; + arm,primecell-periphid = <0x000bb966>; reg = <0x6035000 0x1000>; reg-names = "cti-base"; @@ -991,7 +991,7 @@ /* Pronto CTI */ cti_wcn_cpu0: cti@6039000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b966>; + arm,primecell-periphid = <0x000bb966>; reg = <0x6039000 0x1000>; reg-names = "cti-base"; @@ -1006,7 +1006,7 @@ /* LPASS CTI */ cti_audio_cpu0: cti@613c000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b966>; + arm,primecell-periphid = <0x000bb966>; reg = <0x613c000 0x1000>; reg-names = "cti-base"; @@ -1019,7 +1019,7 @@ cti_rpm_cpu0: cti@610c000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b966>; + arm,primecell-periphid = <0x000bb966>; reg = <0x610c000 0x1000>; reg-names = "cti-base"; @@ -1122,7 +1122,7 @@ tpda: tpda@6003000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b969>; + arm,primecell-periphid = <0x000bb969>; reg = <0x6003000 0x1000>; reg-names = "tpda-base"; @@ -1158,7 +1158,7 @@ tpdm_dcc: tpdm@6110000 { compatible = "arm,primecell"; - arm,primecell-periphid = <0x0003b968>; + arm,primecell-periphid = <0x000bb968>; reg = <0x6110000 0x1000>; reg-names = "tpdm-base"; diff --git a/qcom/pm8916.dtsi b/qcom/pm8916.dtsi index f10c0094..f5059b43 100644 --- a/qcom/pm8916.dtsi +++ b/qcom/pm8916.dtsi @@ -1,3 +1,4 @@ +#include <dt-bindings/iio/qcom,spmi-vadc.h> #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/spmi/spmi.h> @@ -76,63 +77,67 @@ pm8916_vadc: vadc@3100 { compatible = "qcom,spmi-vadc"; reg = <0x3100 0x100>; + interrupts = <0x0 0x31 0x0 IRQ_TYPE_EDGE_RISING>; #address-cells = <1>; #size-cells = <0>; - interrupts = <0x0 0x31 0x0 IRQ_TYPE_EDGE_RISING>; - interrupt-names = "eoc-int-en-set"; - qcom,adc-bit-resolution = <15>; - qcom,adc-vdd-reference = <1800>; - qcom,vadc-poll-eoc; - qcom,pmic-revid = <&pm8916_revid>; - #thermal-sensor-cells = <1>; + #io-channel-cells = <1>; - chan@8 { + die_temp { + reg = <VADC_DIE_TEMP>; label = "die_temp"; - reg = <8>; - qcom,decimation = <0>; - qcom,pre-div-channel-scaling = <0>; - qcom,calibration-type = "absolute"; - qcom,scale-function = <3>; - qcom,hw-settle-time = <0>; - qcom,fast-avg-setup = <0>; + qcom,pre-scaling = <1 1>; }; - chan@9 { + ref_625mv { + reg = <VADC_REF_625MV>; label = "ref_625mv"; - reg = <9>; - qcom,decimation = <0>; - qcom,pre-div-channel-scaling = <0>; - qcom,calibration-type = "absolute"; - qcom,scale-function = <0>; - qcom,hw-settle-time = <0>; - qcom,fast-avg-setup = <0>; + qcom,pre-scaling = <1 1>; }; - chan@a { + ref_1250v { + reg = <VADC_REF_1250MV>; label = "ref_1250v"; - reg = <0xa>; - qcom,decimation = <0>; - qcom,pre-div-channel-scaling = <0>; - qcom,calibration-type = "absolute"; - qcom,scale-function = <0>; - qcom,hw-settle-time = <0>; - qcom,fast-avg-setup = <0>; + qcom,pre-scaling = <1 1>; + }; + + ref_buf_625mv { + reg = <VADC_SPARE1>; + label = "ref_buf_625mv"; + qcom,pre-scaling = <1 1>; + }; + + ref_vdd { + reg = <VADC_VDD_VADC>; + label = "ref_vdd"; + qcom,pre-scaling = <1 1>; + }; + + ref_gnd { + reg = <VADC_GND_REF>; + label = "ref_gnd"; + qcom,pre-scaling = <1 1>; }; }; - pm8916_tz: qcom,temp-alarm@2400 { + pm8916_tz: temp-alarm@2400 { compatible = "qcom,spmi-temp-alarm"; reg = <0x2400 0x100>; - interrupts = <0x0 0x24 0x0 IRQ_TYPE_EDGE_RISING>; - label = "pm8916_tz"; - qcom,channel-num = <8>; - qcom,threshold-set = <0>; - qcom,temp_alarm-vadc = <&pm8916_vadc>; + interrupts = <0 0x24 0 IRQ_TYPE_EDGE_RISING>; + io-channels = <&pm8916_vadc VADC_DIE_TEMP>; + io-channel-names = "thermal"; #thermal-sensor-cells = <0>; }; + pm8916_adc_tm_iio: adc_tm_iio { + compatible = "qcom,adc-tm5-iio"; + reg = <0x3500 0x100>; + #address-cells = <1>; + #size-cells = <0>; + #thermal-sensor-cells = <1>; + }; + pm8916_adc_tm: vadc@3400 { - compatible = "qcom,adc-tm-rev2"; + compatible = "qcom,qpnp-adc-tm"; reg = <0x3400 0x100>; #address-cells = <1>; #size-cells = <0>; @@ -142,10 +147,15 @@ interrupt-names = "eoc-int-en-set", "high-thr-en-set", "low-thr-en-set"; - qcom,adc-bit-resolution = <15>; qcom,adc-vdd-reference = <1800>; - qcom,adc_tm-vadc = <&pm8916_vadc>; + #thermal-sensor-cells = <1>; qcom,pmic-revid = <&pm8916_revid>; + io-channels = <&pm8916_vadc VADC_REF_625MV>, + <&pm8916_vadc VADC_REF_1250MV>, + <&pm8916_vadc VADC_VDD_VADC>, + <&pm8916_vadc VADC_GND_REF>; + io-channel-names = "ref_625mv", "ref_1250v", "ref_vdd", + "ref_gnd"; }; pm8916_chg: qcom,charger { @@ -170,7 +180,9 @@ qcom,batt-cold-percentage = <80>; qcom,tchg-mins = <232>; qcom,resume-soc = <99>; - qcom,chg-vadc = <&pm8916_vadc>; + io-channels = <&pm8916_vadc VADC_VBAT_SNS>, + <&pm8916_vadc VADC_LR_MUX1_BAT_THERM>; + io-channel-names = "vbat_sns", "batt_therm"; qcom,chg-adc_tm = <&pm8916_adc_tm>; status = "disabled"; @@ -231,7 +243,15 @@ qcom,s3-ocv-tolerence-uv = <1200>; qcom,s2-fifo-length = <5>; qcom,low-soc-fifo-length = <2>; - qcom,bms-vadc = <&pm8916_vadc>; + io-channels = <&pm8916_vadc VADC_REF_625MV>, + <&pm8916_vadc VADC_REF_1250MV>, + <&pm8916_vadc VADC_VBAT_SNS>, + <&pm8916_vadc VADC_LR_MUX1_BAT_THERM>, + <&pm8916_vadc VADC_DIE_TEMP>, + <&pm8916_vadc VADC_LR_MUX2_BAT_ID>; + io-channel-names = "ref_625mv", "ref_1250v", + "vbat_sns", "batt_therm", + "die_temp", "batt_id"; qcom,bms-adc_tm = <&pm8916_adc_tm>; qcom,pmic-revid = <&pm8916_revid>; diff --git a/qcom/pm8937.dtsi b/qcom/pm8937.dtsi index 2a9ed193..701ad1c5 100644 --- a/qcom/pm8937.dtsi +++ b/qcom/pm8937.dtsi @@ -1,3 +1,7 @@ +#include <dt-bindings/iio/qcom,spmi-vadc.h> +#include <dt-bindings/interrupt-controller/irq.h> +#include <dt-bindings/spmi/spmi.h> + &spmi_bus { qcom,pm8937@0 { @@ -37,14 +41,12 @@ }; }; - pm8937_temp_alarm: qcom,temp-alarm@2400 { + pm8937_tz: qcom,temp-alarm@2400 { compatible = "qcom,spmi-temp-alarm"; reg = <0x2400 0x100>; interrupts = <0x0 0x24 0x0 IRQ_TYPE_EDGE_RISING>; - label = "pm8937_tz"; - qcom,channel-num = <8>; - qcom,threshold-set = <0>; - qcom,temp_alarm-vadc = <&pm8937_vadc>; + io-channels = <&pm8937_vadc VADC_DIE_TEMP>; + io-channel-names = "thermal"; #thermal-sensor-cells = <0>; }; @@ -104,185 +106,197 @@ pm8937_vadc: vadc@3100 { compatible = "qcom,spmi-vadc"; reg = <0x3100 0x100>; + interrupts = <0x0 0x31 0x0 IRQ_TYPE_EDGE_RISING>; #address-cells = <1>; #size-cells = <0>; - interrupts = <0x0 0x31 0x0 IRQ_TYPE_EDGE_RISING>; - interrupt-names = "eoc-int-en-set"; - qcom,adc-bit-resolution = <15>; - qcom,adc-vdd-reference = <1800>; - qcom,vadc-poll-eoc; - #thermal-sensor-cells = <1>; + #io-channel-cells = <1>; + io-channel-ranges; pinctrl-names = "default"; pinctrl-0 = <&pa_therm1_default &cas_therm_default>; - chan@5 { + /* Channel nodes */ + vcoin { + reg = <VADC_VCOIN>; label = "vcoin"; - reg = <5>; - qcom,decimation = <0>; - qcom,pre-div-channel-scaling = <1>; - qcom,calibration-type = "absolute"; - qcom,scale-function = <0>; - qcom,hw-settle-time = <0>; - qcom,fast-avg-setup = <0>; + qcom,pre-scaling = <1 3>; }; - chan@7 { + vph_pwr { + reg = <VADC_VSYS>; label = "vph_pwr"; - reg = <7>; - qcom,decimation = <0>; - qcom,pre-div-channel-scaling = <1>; - qcom,calibration-type = "absolute"; - qcom,scale-function = <0>; - qcom,hw-settle-time = <0>; - qcom,fast-avg-setup = <0>; + qcom,pre-scaling = <1 3>; }; - chan@8 { + die_temp { + reg = <VADC_DIE_TEMP>; label = "die_temp"; - reg = <8>; - qcom,decimation = <0>; - qcom,pre-div-channel-scaling = <0>; - qcom,calibration-type = "absolute"; - qcom,scale-function = <3>; - qcom,hw-settle-time = <0>; - qcom,fast-avg-setup = <0>; + qcom,pre-scaling = <1 1>; }; - chan@9 { + ref_625mv { + reg = <VADC_REF_625MV>; label = "ref_625mv"; - reg = <9>; - qcom,decimation = <0>; - qcom,pre-div-channel-scaling = <0>; - qcom,calibration-type = "absolute"; - qcom,scale-function = <0>; - qcom,hw-settle-time = <0>; - qcom,fast-avg-setup = <0>; + qcom,pre-scaling = <1 1>; }; - chan@a { + ref_1250v { + reg = <VADC_REF_1250MV>; label = "ref_1250v"; - reg = <0xa>; - qcom,decimation = <0>; - qcom,pre-div-channel-scaling = <0>; - qcom,calibration-type = "absolute"; - qcom,scale-function = <0>; - qcom,hw-settle-time = <0>; - qcom,fast-avg-setup = <0>; + qcom,pre-scaling = <1 1>; }; - chan@c { + ref_buf_625mv { + reg = <VADC_SPARE1>; label = "ref_buf_625mv"; - reg = <0xc>; - qcom,decimation = <0>; - qcom,pre-div-channel-scaling = <0>; - qcom,calibration-type = "absolute"; - qcom,scale-function = <0>; - qcom,hw-settle-time = <0>; - qcom,fast-avg-setup = <0>; + qcom,pre-scaling = <1 1>; + }; + + ref_vdd { + reg = <VADC_VDD_VADC>; + label = "ref_vdd"; + qcom,pre-scaling = <1 1>; + }; + + ref_gnd { + reg = <VADC_GND_REF>; + label = "ref_gnd"; + qcom,pre-scaling = <1 1>; }; - chan@36 { + pa_therm0 { + reg = <VADC_LR_MUX7_HW_ID>; label = "pa_therm0"; - reg = <0x36>; - qcom,decimation = <0>; - qcom,pre-div-channel-scaling = <0>; - qcom,calibration-type = "ratiometric"; - qcom,scale-function = <2>; - qcom,hw-settle-time = <2>; - qcom,fast-avg-setup = <0>; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; }; - chan@11 { + pa_therm1 { + reg = <VADC_P_MUX2_1_1>; label = "pa_therm1"; - reg = <0x11>; - qcom,decimation = <0>; - qcom,pre-div-channel-scaling = <0>; - qcom,calibration-type = "ratiometric"; - qcom,scale-function = <2>; - qcom,hw-settle-time = <2>; - qcom,fast-avg-setup = <0>; - qcom,vadc-thermal-node; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; }; - chan@32 { + xo_therm { + reg = <VADC_LR_MUX3_XO_THERM>; label = "xo_therm"; - reg = <0x32>; - qcom,decimation = <0>; - qcom,pre-div-channel-scaling = <0>; - qcom,calibration-type = "ratiometric"; - qcom,scale-function = <4>; - qcom,hw-settle-time = <2>; - qcom,fast-avg-setup = <0>; - qcom,vadc-thermal-node; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; }; - chan@3c { + xo_therm_buf { + reg = <VADC_LR_MUX3_BUF_XO_THERM>; label = "xo_therm_buf"; - reg = <0x3c>; - qcom,decimation = <0>; - qcom,pre-div-channel-scaling = <0>; - qcom,calibration-type = "ratiometric"; - qcom,scale-function = <4>; - qcom,hw-settle-time = <2>; - qcom,fast-avg-setup = <0>; - qcom,vadc-thermal-node; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; }; - chan@13 { + case_therm { + reg = <VADC_P_MUX4_1_1>; label = "case_therm"; - reg = <0x13>; - qcom,decimation = <0>; - qcom,pre-div-channel-scaling = <0>; - qcom,calibration-type = "ratiometric"; - qcom,scale-function = <2>; - qcom,hw-settle-time = <2>; - qcom,fast-avg-setup = <0>; - qcom,vadc-thermal-node; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + }; + }; + + pm8937_adc_tm_iio: adc_tm_iio { + compatible = "qcom,adc-tm5-iio"; + reg = <0x3500 0x100>; + #address-cells = <1>; + #size-cells = <0>; + #thermal-sensor-cells = <1>; + io-channels = <&pm8937_vadc VADC_P_MUX2_1_1>, + <&pm8937_vadc VADC_LR_MUX3_XO_THERM>, + <&pm8937_vadc + VADC_LR_MUX3_BUF_XO_THERM>, + <&pm8937_vadc VADC_P_MUX4_1_1>; + + pa_therm1 { + reg = <VADC_P_MUX2_1_1>; + label = "pa_therm1"; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + }; + + xo_therm { + reg = <VADC_LR_MUX3_XO_THERM>; + label = "xo_therm"; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + }; + + xo_therm_buf { + reg = <VADC_LR_MUX3_BUF_XO_THERM>; + label = "xo_therm_buf"; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + }; + + case_therm { + reg = <VADC_P_MUX4_1_1>; + label = "case_therm"; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; }; }; pm8937_adc_tm: vadc@3400 { - compatible = "qcom,adc-tm-rev2"; + compatible = "qcom,qpnp-adc-tm"; reg = <0x3400 0x100>; #address-cells = <1>; #size-cells = <0>; - interrupts = <0x0 0x34 0x0 IRQ_TYPE_EDGE_RISING>, + interrupts = <0x0 0x34 0x0 IRQ_TYPE_EDGE_RISING>, <0x0 0x34 0x3 IRQ_TYPE_EDGE_RISING>, <0x0 0x34 0x4 IRQ_TYPE_EDGE_RISING>; - interrupt-names = "eoc-int-en-set", + interrupt-names = "eoc-int-en-set", "high-thr-en-set", "low-thr-en-set"; - qcom,adc-bit-resolution = <15>; - qcom,adc-vdd-reference = <1800>; - qcom,adc_tm-vadc = <&pm8937_vadc>; #thermal-sensor-cells = <1>; - - chan@36 { + qcom,adc-vdd-reference = <1800>; + io-channels = <&pm8937_vadc VADC_REF_625MV>, + <&pm8937_vadc VADC_REF_1250MV>, + <&pm8937_vadc VADC_VDD_VADC>, + <&pm8937_vadc VADC_GND_REF>; + io-channel-names = "ref_625mv", "ref_1250v", "ref_vdd", + "ref_gnd"; + + pa_therm0 { label = "pa_therm0"; - reg = <0x36>; + reg = <VADC_LR_MUX7_HW_ID>; + io-channels = <&pm8937_vadc VADC_LR_MUX7_HW_ID>; + io-channel-names = "pa_therm0"; qcom,decimation = <0>; qcom,pre-div-channel-scaling = <0>; - qcom,calibration-type = "ratiometric"; - qcom,scale-function = <2>; + qcom,ratiometric; + qcom,scale-fn-type = <2>; qcom,hw-settle-time = <2>; qcom,fast-avg-setup = <0>; qcom,btm-channel-number = <0x48>; qcom,thermal-node; }; - chan@7 { + vph_pwr { label = "vph_pwr"; - reg = <0x7>; + reg = <VADC_VSYS>; + io-channels = <&pm8937_vadc VADC_VSYS>; + io-channel-names = "vph_pwr"; qcom,decimation = <0>; qcom,pre-div-channel-scaling = <1>; - qcom,calibration-type = "absolute"; - qcom,scale-function = <0>; + qcom,scale-fn-type = <0>; qcom,hw-settle-time = <0>; qcom,fast-avg-setup = <0>; qcom,btm-channel-number = <0x68>; }; }; - }; pm8937_1: qcom,pm8937@1 { @@ -307,7 +321,7 @@ pa-therm1-adc { polling-delay-passive = <0>; polling-delay = <0>; - thermal-sensors = <&pm8937_vadc 0x11>; + thermal-sensors = <&pm8937_adc_tm_iio VADC_P_MUX2_1_1>; thermal-governor = "user_space"; wake-capable-sensor; @@ -323,7 +337,7 @@ xo-therm-adc { polling-delay-passive = <0>; polling-delay = <0>; - thermal-sensors = <&pm8937_vadc 0x32>; + thermal-sensors = <&pm8937_adc_tm_iio VADC_LR_MUX3_XO_THERM>; thermal-governor = "user_space"; wake-capable-sensor; @@ -339,7 +353,8 @@ xo-therm-buf-adc { polling-delay-passive = <0>; polling-delay = <0>; - thermal-sensors = <&pm8937_vadc 0x3c>; + thermal-sensors = <&pm8937_adc_tm_iio + VADC_LR_MUX3_BUF_XO_THERM>; thermal-governor = "user_space"; wake-capable-sensor; @@ -355,7 +370,7 @@ case-therm-adc { polling-delay-passive = <0>; polling-delay = <0>; - thermal-sensors = <&pm8937_vadc 0x13>; + thermal-sensors = <&pm8937_adc_tm_iio VADC_P_MUX4_1_1>; thermal-governor = "user_space"; wake-capable-sensor; @@ -371,7 +386,7 @@ pa-therm0-adc { polling-delay-passive = <0>; polling-delay = <0>; - thermal-sensors = <&pm8937_adc_tm 0x36>; + thermal-sensors = <&pm8937_adc_tm VADC_LR_MUX7_HW_ID>; thermal-governor = "user_space"; wake-capable-sensor; @@ -385,10 +400,10 @@ }; pm8937_tz { - polling-delay-passive = <0>; + polling-delay-passive = <100>; polling-delay = <0>; thermal-governor = "step_wise"; - thermal-sensors = <&pm8937_temp_alarm>; + thermal-sensors = <&pm8937_tz>; wake-capable-sensor; trips { diff --git a/qcom/pm8953.dtsi b/qcom/pm8953.dtsi index 05a07ecf..ba8b0711 100644 --- a/qcom/pm8953.dtsi +++ b/qcom/pm8953.dtsi @@ -1,3 +1,7 @@ +#include <dt-bindings/iio/qcom,spmi-vadc.h> +#include <dt-bindings/interrupt-controller/irq.h> +#include <dt-bindings/spmi/spmi.h> + &spmi_bus { qcom,pm8953@0 { @@ -41,10 +45,8 @@ compatible = "qcom,spmi-temp-alarm"; reg = <0x2400 0x100>; interrupts = <0x0 0x24 0x0 IRQ_TYPE_EDGE_RISING>; - label = "pm8953_tz"; - qcom,channel-num = <8>; - qcom,threshold-set = <0>; - qcom,temp_alarm-vadc = <&pm8953_vadc>; + io-channels = <&pm8953_vadc VADC_DIE_TEMP>; + io-channel-names = "thermal"; #thermal-sensor-cells = <0>; }; @@ -103,178 +105,166 @@ pm8953_vadc: vadc@3100 { compatible = "qcom,spmi-vadc"; reg = <0x3100 0x100>; + interrupts = <0x0 0x31 0x0 IRQ_TYPE_EDGE_RISING>; #address-cells = <1>; #size-cells = <0>; - interrupts = <0x0 0x31 0x0 IRQ_TYPE_EDGE_RISING>; - interrupt-names = "eoc-int-en-set"; - qcom,adc-bit-resolution = <15>; - qcom,adc-vdd-reference = <1800>; - qcom,vadc-poll-eoc; - #thermal-sensor-cells = <1>; + #io-channel-cells = <1>; + io-channel-ranges; pinctrl-names = "default"; pinctrl-0 = <&pa_therm1_default &cas_therm_default>; - chan@5 { + /* Channel nodes */ + vcoin { + reg = <VADC_VCOIN>; label = "vcoin"; - reg = <5>; - qcom,decimation = <0>; - qcom,pre-div-channel-scaling = <1>; - qcom,calibration-type = "absolute"; - qcom,scale-function = <0>; - qcom,hw-settle-time = <0>; - qcom,fast-avg-setup = <0>; + qcom,pre-scaling = <1 3>; }; - chan@7 { + vph_pwr { + reg = <VADC_VSYS>; label = "vph_pwr"; - reg = <7>; - qcom,decimation = <0>; - qcom,pre-div-channel-scaling = <1>; - qcom,calibration-type = "absolute"; - qcom,scale-function = <0>; - qcom,hw-settle-time = <0>; - qcom,fast-avg-setup = <0>; + qcom,pre-scaling = <1 3>; }; - chan@8 { + die_temp { + reg = <VADC_DIE_TEMP>; label = "die_temp"; - reg = <8>; - qcom,decimation = <0>; - qcom,pre-div-channel-scaling = <0>; - qcom,calibration-type = "absolute"; - qcom,scale-function = <3>; - qcom,hw-settle-time = <0>; - qcom,fast-avg-setup = <0>; + qcom,pre-scaling = <1 1>; }; - chan@9 { + ref_625mv { + reg = <VADC_REF_625MV>; label = "ref_625mv"; - reg = <9>; - qcom,decimation = <0>; - qcom,pre-div-channel-scaling = <0>; - qcom,calibration-type = "absolute"; - qcom,scale-function = <0>; - qcom,hw-settle-time = <0>; - qcom,fast-avg-setup = <0>; + qcom,pre-scaling = <1 1>; }; - chan@a { + ref_1250v { + reg = <VADC_REF_1250MV>; label = "ref_1250v"; - reg = <0xa>; - qcom,decimation = <0>; - qcom,pre-div-channel-scaling = <0>; - qcom,calibration-type = "absolute"; - qcom,scale-function = <0>; - qcom,hw-settle-time = <0>; - qcom,fast-avg-setup = <0>; + qcom,pre-scaling = <1 1>; }; - chan@c { + ref_buf_625mv { + reg = <VADC_SPARE1>; label = "ref_buf_625mv"; - reg = <0xc>; - qcom,decimation = <0>; - qcom,pre-div-channel-scaling = <0>; - qcom,calibration-type = "absolute"; - qcom,scale-function = <0>; - qcom,hw-settle-time = <0>; - qcom,fast-avg-setup = <0>; + qcom,pre-scaling = <1 1>; + }; + + ref_vdd { + reg = <VADC_VDD_VADC>; + label = "ref_vdd"; + qcom,pre-scaling = <1 1>; }; - chan@36 { + ref_gnd { + reg = <VADC_GND_REF>; + label = "ref_gnd"; + qcom,pre-scaling = <1 1>; + }; + + pa_therm0 { + reg = <VADC_LR_MUX7_HW_ID>; label = "pa_therm0"; - reg = <0x36>; - qcom,decimation = <0>; - qcom,pre-div-channel-scaling = <0>; - qcom,calibration-type = "ratiometric"; - qcom,scale-function = <2>; - qcom,hw-settle-time = <2>; - qcom,fast-avg-setup = <0>; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; }; - chan@11 { + pa_therm1 { + reg = <VADC_P_MUX2_1_1>; label = "pa_therm1"; - reg = <0x11>; - qcom,decimation = <0>; - qcom,pre-div-channel-scaling = <0>; - qcom,calibration-type = "ratiometric"; - qcom,scale-function = <2>; - qcom,hw-settle-time = <2>; - qcom,fast-avg-setup = <0>; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; }; - - chan@32 { + xo_therm { + reg = <VADC_LR_MUX3_XO_THERM>; label = "xo_therm"; - reg = <0x32>; - qcom,decimation = <0>; - qcom,pre-div-channel-scaling = <0>; - qcom,calibration-type = "ratiometric"; - qcom,scale-function = <4>; - qcom,hw-settle-time = <2>; - qcom,fast-avg-setup = <0>; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; }; - chan@3c { + xo_therm_buf { + reg = <VADC_LR_MUX3_BUF_XO_THERM>; label = "xo_therm_buf"; - reg = <0x3c>; - qcom,decimation = <0>; - qcom,pre-div-channel-scaling = <0>; - qcom,calibration-type = "ratiometric"; - qcom,scale-function = <4>; - qcom,hw-settle-time = <2>; - qcom,fast-avg-setup = <0>; - qcom,vadc-thermal-node; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; }; - chan@13 { + case_therm { + reg = <VADC_P_MUX4_1_1>; label = "case_therm"; - reg = <0x13>; - qcom,decimation = <0>; - qcom,pre-div-channel-scaling = <0>; - qcom,calibration-type = "ratiometric"; - qcom,scale-function = <2>; - qcom,hw-settle-time = <2>; - qcom,fast-avg-setup = <0>; - qcom,vadc-thermal-node; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + }; + }; + + pm8953_adc_tm_iio: adc_tm_iio { + compatible = "qcom,adc-tm5-iio"; + reg = <0x3500 0x100>; + #thermal-sensor-cells = <1>; + #address-cells = <1>; + #size-cells = <0>; + io-channels = <&pm8953_vadc VADC_LR_MUX3_BUF_XO_THERM>; + + xo_therm_buf { + reg = <VADC_LR_MUX3_BUF_XO_THERM>; + label = "xo_therm_buf"; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; }; }; pm8953_adc_tm: vadc@3400 { - compatible = "qcom,adc-tm-rev2"; + compatible = "qcom,qpnp-adc-tm"; reg = <0x3400 0x100>; #address-cells = <1>; #size-cells = <0>; - interrupts = <0x0 0x34 0x0 IRQ_TYPE_EDGE_RISING>, + interrupts = <0x0 0x34 0x0 IRQ_TYPE_EDGE_RISING>, <0x0 0x34 0x3 IRQ_TYPE_EDGE_RISING>, <0x0 0x34 0x4 IRQ_TYPE_EDGE_RISING>; - interrupt-names = "eoc-int-en-set", + interrupt-names = "eoc-int-en-set", "high-thr-en-set", "low-thr-en-set"; - qcom,adc-bit-resolution = <15>; - qcom,adc-vdd-reference = <1800>; - qcom,adc_tm-vadc = <&pm8953_vadc>; #thermal-sensor-cells = <1>; - - chan@36 { + qcom,adc-vdd-reference = <1800>; + io-channels = <&pm8953_vadc VADC_REF_625MV>, + <&pm8953_vadc VADC_REF_1250MV>, + <&pm8953_vadc VADC_VDD_VADC>, + <&pm8953_vadc VADC_GND_REF>; + io-channel-names = "ref_625mv", "ref_1250v", "ref_vdd", + "ref_gnd"; + + pa_therm0 { label = "pa_therm0"; - reg = <0x36>; + reg = <VADC_LR_MUX7_HW_ID>; + io-channels = <&pm8953_vadc VADC_LR_MUX7_HW_ID>; + io-channel-names = "pa_therm0"; qcom,pre-div-channel-scaling = <0>; qcom,decimation = <0>; - qcom,calibration-type = "ratiometric"; - qcom,scale-function = <2>; + qcom,ratiometric; + qcom,scale-fn-type = <2>; qcom,hw-settle-time = <2>; qcom,btm-channel-number = <0x48>; qcom,fast-avg-setup = <0>; qcom,thermal-node; }; - chan@32 { + xo_therm { label = "xo_therm"; - reg = <0x32>; + reg = <VADC_LR_MUX3_XO_THERM>; + io-channels = <&pm8953_vadc + VADC_LR_MUX3_XO_THERM>; + io-channel-names = "xo_therm"; qcom,pre-div-channel-scaling = <0>; qcom,decimation = <0>; - qcom,calibration-type = "ratiometric"; - qcom,scale-function = <4>; + qcom,ratiometric; + qcom,scale-fn-type = <4>; qcom,hw-settle-time = <2>; qcom,btm-channel-number = <0x68>; qcom,fast-avg-setup = <0>; @@ -329,7 +319,7 @@ xo-therm-adc { polling-delay-passive = <0>; polling-delay = <0>; - thermal-sensors = <&pm8953_adc_tm 0x32>; + thermal-sensors = <&pm8953_adc_tm VADC_LR_MUX3_XO_THERM>; thermal-governor = "user_space"; wake-capable-sensor; @@ -345,7 +335,8 @@ xo-therm-buf-adc { polling-delay-passive = <0>; polling-delay = <0>; - thermal-sensors = <&pm8953_vadc 0x3c>; + thermal-sensors = <&pm8953_adc_tm_iio + VADC_LR_MUX3_BUF_XO_THERM>; thermal-governor = "user_space"; wake-capable-sensor; @@ -358,9 +349,10 @@ }; }; - pm8953_tz { - polling-delay-passive = <0>; + pm8953_temp_alarm: pm8953_tz { + polling-delay-passive = <100>; polling-delay = <0>; + thermal-governor = "step_wise"; thermal-sensors = <&pm8953_tz>; wake-capable-sensor; diff --git a/qcom/qm215-pm8916.dtsi b/qcom/qm215-pm8916.dtsi index 2433e885..13797f13 100644 --- a/qcom/qm215-pm8916.dtsi +++ b/qcom/qm215-pm8916.dtsi @@ -198,165 +198,159 @@ }; &pm8916_vadc { - chan@0 { + #thermal-sensor-cells = <1>; + usb_in { + reg = <VADC_USBIN>; label = "usb_in"; - reg = <0>; - qcom,decimation = <0>; - qcom,pre-div-channel-scaling = <7>; - qcom,calibration-type = "absolute"; - qcom,scale-function = <0>; - qcom,hw-settle-time = <0>; - qcom,fast-avg-setup = <0>; + qcom,pre-scaling = <1 10>; }; - chan@2 { + ireg_fb { + reg = <VADC_VCHG_SNS>; label = "ireg_fb"; - reg = <2>; - qcom,decimation = <0>; - qcom,pre-div-channel-scaling = <6>; - qcom,calibration-type = "absolute"; - qcom,scale-function = <0>; - qcom,hw-settle-time = <0>; - qcom,fast-avg-setup = <0>; + qcom,pre-scaling = <10 81>; }; - chan@5 { + vcoin { + reg = <VADC_VCOIN>; label = "vcoin"; - reg = <5>; - qcom,decimation = <0>; - qcom,pre-div-channel-scaling = <1>; - qcom,calibration-type = "absolute"; - qcom,scale-function = <0>; - qcom,hw-settle-time = <0>; - qcom,fast-avg-setup = <0>; + qcom,pre-scaling = <1 3>; }; - chan@6 { + vbat_sns { + reg = <VADC_VBAT_SNS>; label = "vbat_sns"; - reg = <6>; - qcom,decimation = <0>; - qcom,pre-div-channel-scaling = <1>; - qcom,calibration-type = "absolute"; - qcom,scale-function = <0>; - qcom,hw-settle-time = <0>; - qcom,fast-avg-setup = <0>; + qcom,pre-scaling = <1 3>; }; - chan@7 { + vph_pwr { + reg = <VADC_VSYS>; label = "vph_pwr"; - reg = <7>; - qcom,decimation = <0>; - qcom,pre-div-channel-scaling = <1>; - qcom,calibration-type = "absolute"; - qcom,scale-function = <0>; - qcom,hw-settle-time = <0>; - qcom,fast-avg-setup = <0>; + qcom,pre-scaling = <1 3>; }; - chan@b { + chg_temp { + reg = <VADC_CHG_TEMP>; label = "chg_temp"; - reg = <0xb>; - qcom,decimation = <0>; - qcom,pre-div-channel-scaling = <0>; - qcom,calibration-type = "absolute"; - qcom,scale-function = <3>; - qcom,hw-settle-time = <0>; - qcom,fast-avg-setup = <0>; + qcom,pre-scaling = <1 1>; }; - chan@11 { + skin_therm { + reg = <VADC_P_MUX2_1_1>; label = "skin_therm"; - reg = <0x11>; - qcom,decimation = <0>; - qcom,pre-div-channel-scaling = <0>; - qcom,calibration-type = "ratiometric"; - qcom,scale-function = <2>; - qcom,hw-settle-time = <2>; - qcom,fast-avg-setup = <0>; - qcom,vadc-thermal-node; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; }; - chan@30 { + batt_therm { + reg = <VADC_LR_MUX1_BAT_THERM>; label = "batt_therm"; - reg = <0x30>; - qcom,decimation = <0>; - qcom,pre-div-channel-scaling = <0>; qcom,calibration-type = "ratiometric"; - qcom,scale-function = <26>; - qcom,hw-settle-time = <0xb>; - qcom,fast-avg-setup = <0>; + qcom,ratiometric; + qcom,hw-settle-time = <2000>; + qcom,pre-scaling = <1 1>; }; - chan@31 { + batt_id { + reg = <VADC_LR_MUX2_BAT_ID>; label = "batt_id"; - reg = <0x31>; - qcom,decimation = <0>; - qcom,pre-div-channel-scaling = <0>; - qcom,calibration-type = "ratiometric"; - qcom,scale-function = <0>; - qcom,hw-settle-time = <0xb>; - qcom,fast-avg-setup = <0>; + qcom,ratiometric; + qcom,hw-settle-time = <2000>; + qcom,pre-scaling = <1 1>; }; - chan@36 { + pa_therm0 { + reg = <VADC_LR_MUX7_HW_ID>; label = "pa_therm0"; - reg = <0x36>; - qcom,decimation = <0>; - qcom,pre-div-channel-scaling = <0>; - qcom,calibration-type = "ratiometric"; - qcom,scale-function = <2>; - qcom,hw-settle-time = <2>; - qcom,fast-avg-setup = <0>; - qcom,vadc-thermal-node; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; }; - chan@32 { + xo_therm { + reg = <VADC_LR_MUX3_XO_THERM>; label = "xo_therm"; - reg = <0x32>; - qcom,decimation = <0>; - qcom,pre-div-channel-scaling = <0>; - qcom,calibration-type = "ratiometric"; - qcom,scale-function = <4>; - qcom,hw-settle-time = <2>; - qcom,fast-avg-setup = <0>; - qcom,vadc-thermal-node; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; }; - chan@3c { + xo_therm_buf { + reg = <VADC_LR_MUX3_BUF_XO_THERM>; label = "xo_therm_buf"; - reg = <0x3c>; - qcom,decimation = <0>; - qcom,pre-div-channel-scaling = <0>; - qcom,calibration-type = "ratiometric"; - qcom,scale-function = <4>; - qcom,hw-settle-time = <2>; - qcom,fast-avg-setup = <0>; - qcom,vadc-thermal-node; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + }; +}; + +&pm8916_adc_tm_iio { + io-channels = <&pm8916_vadc VADC_LR_MUX3_BUF_XO_THERM>, + <&pm8916_vadc VADC_LR_MUX3_XO_THERM>, + <&pm8916_vadc VADC_LR_MUX7_HW_ID>, + <&pm8916_vadc VADC_P_MUX2_1_1>; + io-channel-names = "xo_therm_buf", "xo_therm", "pa_therm0", + "skin_therm"; + + pa_therm0 { + reg = <VADC_LR_MUX7_HW_ID>; + label = "pa_therm0"; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + }; + + xo_therm { + reg = <VADC_LR_MUX3_XO_THERM>; + label = "xo_therm"; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + }; + + xo_therm_buf { + reg = <VADC_LR_MUX3_BUF_XO_THERM>; + label = "xo_therm_buf"; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + }; + + skin_therm { + reg = <VADC_P_MUX2_1_1>; + label = "skin_therm"; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; }; }; &pm8916_adc_tm { - /* Channel Node */ - chan@30 { + /* Channel Nodes */ + batt_therm { + reg = <VADC_LR_MUX1_BAT_THERM>; label = "batt_therm"; - reg = <0x30>; - qcom,decimation = <0>; + io-channels = <&pm8916_vadc VADC_LR_MUX1_BAT_THERM>; + io-channel-names = "batt_therm"; qcom,pre-div-channel-scaling = <0>; - qcom,calibration-type = "ratiometric"; - qcom,scale-function = <8>; + qcom,decimation = <0>; + qcom,ratiometric; qcom,hw-settle-time = <0xb>; + qcom,scale-fn-type = <8>; qcom,fast-avg-setup = <0x2>; qcom,btm-channel-number = <0x48>; }; - chan@6 { + vbat_sns { + reg = <VADC_VBAT_SNS>; label = "vbat_sns"; - reg = <0x6>; - qcom,decimation = <0>; + io-channels = <&pm8916_vadc VADC_VBAT_SNS>; + io-channel-names = "vbat_sns"; qcom,pre-div-channel-scaling = <1>; - qcom,calibration-type = "absolute"; - qcom,scale-function = <0>; + qcom,decimation = <0>; qcom,hw-settle-time = <0xb>; + qcom,scale-fn-type = <0>; qcom,fast-avg-setup = <0x2>; qcom,btm-channel-number = <0x68>; }; @@ -367,7 +361,8 @@ xo-therm-buf-adc { polling-delay-passive = <0>; polling-delay = <5000>; - thermal-sensors = <&pm8916_vadc 0x3c>; + thermal-sensors = <&pm8916_adc_tm_iio + VADC_LR_MUX3_BUF_XO_THERM>; thermal-governor = "user_space"; trips { @@ -382,7 +377,8 @@ xo-therm-adc { polling-delay-passive = <0>; polling-delay = <5000>; - thermal-sensors = <&pm8916_vadc 0x32>; + thermal-sensors = <&pm8916_adc_tm_iio + VADC_LR_MUX3_XO_THERM>; thermal-governor = "user_space"; trips { @@ -397,7 +393,8 @@ pa-therm0-adc { polling-delay-passive = <0>; polling-delay = <5000>; - thermal-sensors = <&pm8916_vadc 0x36>; + thermal-sensors = <&pm8916_adc_tm_iio + VADC_LR_MUX7_HW_ID>; thermal-governor = "user_space"; trips { @@ -412,7 +409,8 @@ skin-therm-adc { polling-delay-passive = <0>; polling-delay = <5000>; - thermal-sensors = <&pm8916_vadc 0x11>; + thermal-sensors = <&pm8916_adc_tm_iio + VADC_P_MUX2_1_1>; thermal-governor = "user_space"; trips { @@ -433,7 +431,7 @@ }; pm8916_tz { - polling-delay-passive = <0>; + polling-delay-passive = <100>; polling-delay = <0>; thermal-governor = "step_wise"; thermal-sensors = <&pm8916_tz>; @@ -462,7 +460,8 @@ xo-therm-step { polling-delay-passive = <1000>; polling-delay = <5000>; - thermal-sensors = <&pm8916_vadc 0x32>; + thermal-sensors = <&pm8916_adc_tm_iio + VADC_LR_MUX3_XO_THERM>; thermal-governor = "step_wise"; trips { diff --git a/qcom/qm215-qrd-smb1360.dtsi b/qcom/qm215-qrd-smb1360.dtsi index 84e9e78b..97568702 100644 --- a/qcom/qm215-qrd-smb1360.dtsi +++ b/qcom/qm215-qrd-smb1360.dtsi @@ -1,4 +1,5 @@ #include "qm215-qrd.dtsi" +#include <dt-bindings/iio/qcom,spmi-vadc.h> &pm8916_chg { qcom,use-external-charger; @@ -71,6 +72,8 @@ qcom,cool-bat-mv = <4200>; qcom,warm-bat-ma = <1000>; qcom,cool-bat-ma = <1000>; + io-channels = <&pm8916_vadc VADC_LR_MUX2_BAT_ID>; + io-channel-names = "batt_id"; status= "okay"; }; }; diff --git a/qcom/sdm439-pm8953.dtsi b/qcom/sdm439-pm8953.dtsi index c3b2649e..27b9179e 100644 --- a/qcom/sdm439-pm8953.dtsi +++ b/qcom/sdm439-pm8953.dtsi @@ -271,7 +271,7 @@ pa-therm0 { polling-delay-passive = <0>; polling-delay = <0>; - thermal-sensors = <&pm8953_adc_tm 0x36>; + thermal-sensors = <&pm8953_adc_tm VADC_LR_MUX7_HW_ID>; thermal-governor = "user_space"; wake-capable-sensor; @@ -287,7 +287,7 @@ &pm8953_vadc { pinctrl-0 = <&pa_therm1_default>; - /delete-node/ chan@13; + /delete-node/ case_therm; }; &pm8953_mpps { |