ARM: dts: qcom: Add support for AudioReach on kona

Adds device tree changes to support AudioReach
on sxr2130. Also, add documentation for AR related
nodes that are introduced.

Change-Id: Id32fdf03cc743025052bf41d72695e7c7d7c68bc

10 files changed, 2444 insertions, 0 deletions

diff --git a/bindings/sound/qcom-audio-dev.txt b/bindings/sound/qcom-audio-dev.txt
index e28521a5..b6674c26 100644
--- a/bindings/sound/qcom-audio-dev.txt
+++ b/bindings/sound/qcom-audio-dev.txt
@@ -2153,6 +2153,27 @@ Example:
 
 };
 
+Required properties:
+- compatible : "qcom,spf-core-platform"
+
+Required properties:
+- compatible : "qcom,audio-pkt-core-platform"
+
+Required properties:
+- compatible : "qcom,gpr"
+
+Required properties:
+- compatible : "qcom,spf_core"
+
+Required properties:
+- compatible : "qcom,audio-pkt"
+
+Required properties:
+- compatible : "qcom,audio_prm"
+
+Required properties:
+- compatible : "qcom,voice_mhi_gpr"
+
 * LITO ASoC Machine driver
 
 Required properties:
diff --git a/qcom/kona-arglass.dtsi b/qcom/kona-arglass.dtsi
index ee915f62..44430885 100644
--- a/qcom/kona-arglass.dtsi
+++ b/qcom/kona-arglass.dtsi
@@ -2,6 +2,7 @@
 #include "kona-pmic-overlay.dtsi"
 #include "kona-sde-display.dtsi"
 #include "kona-audio-overlay.dtsi"
+#include "kona-audio-overlay-ar.dtsi"
 #include "kona-thermal-overlay.dtsi"
 #include "kona-xr-pinctrl-overlay.dtsi"
 #include "camera/kona-camera-sensor-arglass.dtsi"
@@ -917,6 +918,82 @@
 	status = "disabled";
 };
 
+&kona_snd_ar {
+	qcom,model = "kona-arglass-snd-card";
+	qcom,mi2s-audio-intf = <0>;
+	qcom,audio-routing =
+		"TX DMIC0", "Digital Mic0",
+		"TX DMIC1", "Digital Mic1",
+		"TX DMIC2", "Digital Mic2",
+		"TX DMIC3", "Digital Mic3",
+		"TX DMIC4", "Digital Mic4",
+		"IN1_HPHL", "HPHL_OUT",
+		"IN2_HPHR", "HPHR_OUT",
+		"IN3_AUX", "AUX_OUT",
+		"TX SWR_ADC0", "ADC1_OUTPUT",
+		"TX SWR_ADC1", "ADC2_OUTPUT",
+		"TX SWR_ADC2", "ADC3_OUTPUT",
+		"TX SWR_ADC3", "ADC4_OUTPUT",
+		"TX SWR_DMIC0", "DMIC1_OUTPUT",
+		"TX SWR_DMIC1", "DMIC2_OUTPUT",
+		"TX SWR_DMIC2", "DMIC3_OUTPUT",
+		"TX SWR_DMIC3", "DMIC4_OUTPUT",
+		"TX SWR_DMIC4", "DMIC5_OUTPUT",
+		"TX SWR_DMIC5", "DMIC6_OUTPUT",
+		"TX SWR_DMIC6", "DMIC7_OUTPUT",
+		"TX SWR_DMIC7", "DMIC8_OUTPUT",
+		"WSA SRC0_INP", "SRC0",
+		"WSA_TX DEC0_INP", "TX DEC0 MUX",
+		"WSA_TX DEC1_INP", "TX DEC1 MUX",
+		"RX_TX DEC0_INP", "TX DEC0 MUX",
+		"RX_TX DEC1_INP", "TX DEC1 MUX",
+		"RX_TX DEC2_INP", "TX DEC2 MUX",
+		"RX_TX DEC3_INP", "TX DEC3 MUX",
+		"SpkrRight IN", "WSA_SPK2 OUT",
+		"VA_AIF1 CAP", "VA_SWR_CLK",
+		"VA_AIF2 CAP", "VA_SWR_CLK",
+		"VA_AIF3 CAP", "VA_SWR_CLK",
+		"VA DMIC0", "Digital Mic0",
+		"VA DMIC1", "Digital Mic1",
+		"VA DMIC2", "Digital Mic2",
+		"VA DMIC3", "Digital Mic3",
+		"VA DMIC4", "Digital Mic4",
+		"VA SWR_ADC1", "VA_SWR_CLK",
+		"VA SWR_MIC0", "VA_SWR_CLK",
+		"VA SWR_MIC1", "VA_SWR_CLK",
+		"VA SWR_MIC2", "VA_SWR_CLK",
+		"VA SWR_MIC3", "VA_SWR_CLK",
+		"VA SWR_MIC4", "VA_SWR_CLK",
+		"VA SWR_MIC5", "VA_SWR_CLK",
+		"VA SWR_MIC6", "VA_SWR_CLK",
+		"VA SWR_MIC7", "VA_SWR_CLK",
+		"VA SWR_MIC0", "DMIC1_OUTPUT",
+		"VA SWR_MIC1", "DMIC2_OUTPUT",
+		"VA SWR_MIC2", "DMIC3_OUTPUT",
+		"VA SWR_MIC3", "DMIC4_OUTPUT",
+		"VA SWR_MIC4", "DMIC5_OUTPUT",
+		"VA SWR_MIC5", "DMIC6_OUTPUT",
+		"VA SWR_MIC6", "DMIC7_OUTPUT",
+		"VA SWR_MIC7", "DMIC8_OUTPUT",
+		"VA SWR_ADC1", "ADC2_OUTPUT";
+	qcom,msm-mbhc-hphl-swh = <0>;
+	qcom,msm-mbhc-gnd-swh = <0>;
+	qcom,codec-max-aux-devs = <0>;
+	/delete-property/ qcom,codec-aux-devs;
+};
+
+&wcd938x_tx_slave_ar {
+	status = "disabled";
+};
+
+&wcd938x_rx_slave_ar {
+	status = "disabled";
+};
+
+&wcd938x_codec_ar {
+	status = "disabled";
+};
+
 &pm8150a_l4 {
 	qcom,init-voltage = <2800000>;
 };
diff --git a/qcom/kona-audio-ar.dtsi b/qcom/kona-audio-ar.dtsi
new file mode 100644
index 00000000..edefccc3
--- /dev/null
+++ b/qcom/kona-audio-ar.dtsi
@@ -0,0 +1,109 @@
+#include <dt-bindings/sound/qcom,gpr.h>
+
+&glink_adsp {
+	audio_gpr: qcom,gpr {
+		compatible = "qcom,gpr";
+		qcom,glink-channels = "adsp_apps";
+		qcom,intents = <0x200 20>;
+		reg = <GPR_DOMAIN_ADSP>;
+		spf_core {
+			compatible = "qcom,spf_core";
+			reg = <GPR_SVC_ADSP_CORE>;
+		};
+
+		audio-pkt {
+			compatible = "qcom,audio-pkt";
+			qcom,audiopkt-ch-name = "apr_audio_svc";
+			reg = <GPR_SVC_MAX>;
+		};
+
+		audio_prm: q6prm {
+			compatible = "qcom,audio_prm";
+			reg = <GPR_SVC_ASM>;
+		};
+
+		voice-mhi {
+			compatible = "qcom,voice_mhi_gpr";
+			reg = <GPR_SVC_VPM>;
+		};
+	};
+};
+
+&soc {
+	spf_core_platform: spf_core_platform {
+		compatible = "qcom,spf-core-platform";
+	};
+
+	audio_pkt_core_platform: qcom,audio-pkt-core-platform {
+		compatible = "qcom,audio-pkt-core-platform";
+	};
+};
+
+&spf_core_platform {
+	msm_audio_ion_ar: qcom,msm-audio-ion-ar {
+		compatible = "qcom,msm-audio-ion";
+		qcom,smmu-version = <2>;
+		qcom,smmu-enabled;
+		iommus = <&apps_smmu 0x1801 0x0>;
+		qcom,iommu-dma-addr-pool = <0x10000000 0x10000000>;
+		qcom,smmu-sid-mask = /bits/ 64 <0xf>;
+	};
+
+	lpass_core_hw_vote_ar: vote_lpass_core_hw_ar {
+		compatible = "qcom,audio-ref-clk";
+		qcom,codec-ext-clk-src = <AUDIO_LPASS_CORE_HW_VOTE>;
+		#clock-cells = <1>;
+	};
+
+	lpass_audio_hw_vote_ar: vote_lpass_audio_hw_ar {
+		compatible = "qcom,audio-ref-clk";
+		qcom,codec-ext-clk-src = <AUDIO_LPASS_AUDIO_HW_VOTE>;
+		#clock-cells = <1>;
+	};
+
+	bolero_ar: bolero-cdc-ar {
+		compatible = "qcom,bolero-codec";
+		clock-names = "lpass_core_hw_vote",
+				"lpass_audio_hw_vote";
+		clocks = <&lpass_core_hw_vote_ar 0>,
+				<&lpass_audio_hw_vote_ar 0>;
+		bolero-clk-rsc-mngr-ar {
+			compatible = "qcom,bolero-clk-rsc-mngr";
+		};
+
+		tx_macro_ar: tx-macro-ar@3220000 {
+			swr_ar2: tx_swr_master_ar {
+			};
+		};
+
+		rx_macro_ar: rx-macro-ar@3200000 {
+			swr_ar1: rx_swr_master_ar {
+			};
+		};
+
+		wsa_macro_ar: wsa-macro-ar@3240000 {
+			swr_ar0: wsa_swr_master_ar {
+			};
+		};
+	};
+
+	voice_mhi_audio_ar: qcom,voice-mhi-audio-ar {
+		compatible = "qcom,voice-mhi-audio";
+		memory-region = <&mailbox_mem>;
+		voice_mhi_voting;
+	};
+
+	kona_snd_ar: sound_ar {
+		compatible = "qcom,kona-asoc-snd";
+		qcom,mi2s-audio-intf = <1>;
+		qcom,auxpcm-audio-intf = <1>;
+		qcom,tdm-audio-intf = <1>;
+		qcom,wcn-bt = <0>;
+		qcom,ext-disp-audio-rx = <0>;
+		qcom,afe-rxtx-lb = <0>;
+
+		clock-names = "lpass_audio_hw_vote";
+		clocks = <&lpass_audio_hw_vote_ar 0>;
+		fsa4480-i2c-handle = <&fsa4480>;
+	};
+};
diff --git a/qcom/kona-audio-overlay-ar.dtsi b/qcom/kona-audio-overlay-ar.dtsi
new file mode 100644
index 00000000..67596564
--- /dev/null
+++ b/qcom/kona-audio-overlay-ar.dtsi
@@ -0,0 +1,378 @@
+#include "kona-lpi-ar.dtsi"
+#include "kona-va-bolero-ar.dtsi"
+
+&bolero_ar {
+	qcom,num-macros = <4>;
+	bolero-clk-rsc-mngr-ar {
+		compatible = "qcom,bolero-clk-rsc-mngr";
+		qcom,fs-gen-sequence = <0x3000 0x1>,
+					<0x3004 0x1>, <0x3080 0x2>;
+	qcom,rx_mclk_mode_muxsel = <0x033240D8>;
+	qcom,wsa_mclk_mode_muxsel = <0x033220D8>;
+	qcom,va_mclk_mode_muxsel = <0x033A0000>;
+	clock-names = "tx_core_clk", "tx_npl_clk", "rx_core_clk", "rx_npl_clk",
+		 "wsa_core_clk", "wsa_npl_clk", "va_core_clk", "va_npl_clk";
+	clocks = <&clock_audio_tx_1 0>, <&clock_audio_tx_2 0>,
+		<&clock_audio_rx_1 0>, <&clock_audio_rx_2 0>,
+		<&clock_audio_wsa_1 0>, <&clock_audio_wsa_2 0>,
+		<&clock_audio_va_1 0>, <&clock_audio_va_2 0>;
+	};
+
+	tx_macro_ar: tx-macro-ar@3220000 {
+		compatible = "qcom,tx-macro";
+		reg = <0x3220000 0x0>;
+		clock-names = "tx_core_clk", "tx_npl_clk";
+		clocks = <&clock_audio_tx_1 0>,
+			 <&clock_audio_tx_2 0>;
+		qcom,tx-swr-gpios = <&tx_swr_gpios_ar>;
+		qcom,tx-dmic-sample-rate = <2400000>;
+		swr_ar2: tx_swr_master_ar {
+			compatible = "qcom,swr-mstr";
+			#address-cells = <2>;
+			#size-cells = <0>;
+			clock-names = "lpass_core_hw_vote",
+					"lpass_audio_hw_vote";
+			clocks = <&lpass_core_hw_vote_ar 0>,
+					<&lpass_audio_hw_vote_ar 0>;
+			qcom,swr-master-version = <0x01050001>;
+			qcom,swr_master_id = <3>;
+			qcom,mipi-sdw-block-packing-mode = <1>;
+			swrm-io-base = <0x3230000 0x0>;
+			interrupts-extended =
+				<&intc GIC_SPI 297 IRQ_TYPE_LEVEL_HIGH>,
+				<&pdc 109 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "swr_master_irq", "swr_wake_irq";
+			qcom,swr-wakeup-required = <1>;
+			qcom,swr-num-ports = <5>;
+			qcom,swr-port-mapping = <1 PCM_OUT1 0xF>,
+				<2 ADC1 0x1>, <2 ADC2 0x2>,
+				<3 ADC3 0x1>, <3 ADC4 0x2>,
+				<4 DMIC0 0x1>, <4 DMIC1 0x2>,
+				<4 DMIC2 0x4>, <4 DMIC3 0x8>,
+				<5 DMIC4 0x1>, <5 DMIC5 0x2>,
+				<5 DMIC6 0x4>, <5 DMIC7 0x8>;
+			qcom,swr-num-dev = <1>;
+			qcom,swr-clock-stop-mode0 = <1>;
+			qcom,swr-mstr-irq-wakeup-capable = <1>;
+			wcd938x_tx_slave_ar: wcd938x-tx-slave_ar {
+				compatible = "qcom,wcd938x-slave";
+				reg = <0x0D 0x01170223>;
+			};
+		};
+	};
+
+	rx_macro_ar: rx-macro-ar@3200000 {
+		compatible = "qcom,rx-macro";
+		reg = <0x3200000 0x0>;
+		clock-names = "rx_core_clk", "rx_npl_clk";
+		clocks = <&clock_audio_rx_1 0>,
+			 <&clock_audio_rx_2 0>;
+		qcom,rx-swr-gpios = <&rx_swr_gpios_ar>;
+		qcom,rx_mclk_mode_muxsel = <0x033240D8>;
+		qcom,rx-bcl-pmic-params = /bits/ 8 <0x00 0x04 0x3E>;
+		qcom,default-clk-id = <TX_CORE_CLK>;
+		swr_ar1: rx_swr_master_ar {
+			compatible = "qcom,swr-mstr";
+			#address-cells = <2>;
+			#size-cells = <0>;
+			clock-names = "lpass_core_hw_vote",
+					"lpass_audio_hw_vote";
+			clocks = <&lpass_core_hw_vote_ar 0>,
+					<&lpass_audio_hw_vote_ar 0>;
+			qcom,swr-master-version = <0x01050001>;
+			qcom,swr_master_id = <2>;
+			qcom,mipi-sdw-block-packing-mode = <1>;
+			swrm-io-base = <0x3210000 0x0>;
+			interrupts = <GIC_SPI 298 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "swr_master_irq";
+			qcom,swr-num-ports = <5>;
+			qcom,disable-div2-clk-switch = <1>;
+			qcom,swr-port-mapping = <1 HPH_L 0x1>,
+				<1 HPH_R 0x2>, <2 CLSH 0x1>,
+				<3 COMP_L 0x1>, <3 COMP_R 0x2>,
+				<4 LO 0x1>, <5 DSD_L 0x1>,
+				<5 DSD_R 0x2>;
+			qcom,swr-num-dev = <1>;
+			qcom,swr-clock-stop-mode0 = <1>;
+			wcd938x_rx_slave_ar: wcd938x-rx-slave-ar {
+				compatible = "qcom,wcd938x-slave";
+				reg = <0x0D 0x01170224>;
+			};
+		};
+	};
+
+	wsa_macro_ar: wsa-macro-ar@3240000 {
+		compatible = "qcom,wsa-macro";
+		reg = <0x3240000 0x0>;
+		clock-names = "wsa_core_clk", "wsa_npl_clk";
+		clocks = <&clock_audio_wsa_1 0>,
+			 <&clock_audio_wsa_2 0>;
+		qcom,wsa-swr-gpios = <&wsa_swr_gpios_ar>;
+		qcom,wsa-bcl-pmic-params = /bits/ 8 <0x00 0x04 0x3E>;
+		qcom,default-clk-id = <TX_CORE_CLK>;
+		swr_ar0: wsa_swr_master_ar {
+			compatible = "qcom,swr-mstr";
+			#address-cells = <2>;
+			#size-cells = <0>;
+			clock-names = "lpass_core_hw_vote",
+					"lpass_audio_hw_vote";
+			clocks = <&lpass_core_hw_vote_ar 0>,
+					<&lpass_audio_hw_vote_ar 0>;
+			qcom,swr-master-version = <0x01050001>;
+			qcom,swr_master_id = <1>;
+			qcom,mipi-sdw-block-packing-mode = <0>;
+			swrm-io-base = <0x3250000 0x0>;
+			interrupts = <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "swr_master_irq";
+			qcom,swr-num-ports = <8>;
+			qcom,swr-port-mapping = <1 SPKR_L 0x1>,
+				<2 SPKR_L_COMP 0xF>, <3 SPKR_L_BOOST 0x3>,
+				<4 SPKR_R 0x1>, <5 SPKR_R_COMP 0xF>,
+				<6 SPKR_R_BOOST 0x3>, <7 SPKR_L_VI 0x3>,
+				<8 SPKR_R_VI 0x3>;
+			qcom,swr-num-dev = <2>;
+			wsa881x_0211_ar: wsa881x_ar@20170211 {
+				compatible = "qcom,wsa881x";
+				reg = <0x10 0x20170211>;
+				qcom,spkr-sd-n-node = <&wsa_spkr_en1>;
+				qcom,bolero-handle = <&bolero_ar>;
+			};
+
+			wsa881x_0212_ar: wsa881x_ar@20170212 {
+				compatible = "qcom,wsa881x";
+				reg = <0x10 0x20170212>;
+				qcom,spkr-sd-n-node = <&wsa_spkr_en2>;
+				qcom,bolero-handle = <&bolero_ar>;
+			};
+
+			wsa881x_0213_ar: wsa881x_ar@21170213 {
+				compatible = "qcom,wsa881x";
+				reg = <0x10 0x21170213>;
+				qcom,spkr-sd-n-node = <&wsa_spkr_en1>;
+				qcom,bolero-handle = <&bolero_ar>;
+			};
+
+			wsa881x_0214_ar: wsa881x_ar@21170214 {
+				compatible = "qcom,wsa881x";
+				reg = <0x10 0x21170214>;
+				qcom,spkr-sd-n-node = <&wsa_spkr_en2>;
+				qcom,bolero-handle = <&bolero_ar>;
+			};
+		};
+
+	};
+
+	wcd938x_codec_ar: wcd938x-codec-ar {
+		compatible = "qcom,wcd938x-codec";
+		qcom,split-codec = <1>;
+		qcom,rx_swr_ch_map = <0 HPH_L 0x1 0 HPH_L>,
+			<0 HPH_R 0x2 0 HPH_R>, <1 CLSH 0x1 0 CLSH>,
+			<2 COMP_L 0x1 0 COMP_L>, <2 COMP_R 0x2 0 COMP_R>,
+			<3 LO 0x1 0 LO>, <4 DSD_L 0x1 0 DSD_L>,
+			<4 DSD_R 0x2 0 DSD_R>;
+		qcom,tx_swr_ch_map = <0 ADC1 0x1 0 ADC1>,
+			<0 ADC2 0x2 0 ADC2>, <1 ADC3 0x1 0 ADC3>,
+			<1 ADC4 0x2 0 ADC4>, <2 DMIC0 0x1 0 DMIC0>,
+			<2 DMIC1 0x2 0 DMIC1>, <2 MBHC 0x4 0 DMIC2>,
+			<2 DMIC2 0x4 0 DMIC2>, <2 DMIC3 0x8 0 DMIC3>,
+			<3 DMIC4 0x1 0 DMIC4>, <3 DMIC5 0x2 0 DMIC5>,
+			<3 DMIC6 0x4 0 DMIC6>, <3 DMIC7 0x8 0 DMIC7>;
+
+		qcom,wcd-rst-gpio-node = <&wcd938x_rst_gpio>;
+		qcom,rx-slave = <&wcd938x_rx_slave_ar>;
+		qcom,tx-slave = <&wcd938x_tx_slave_ar>;
+
+		cdc-vdd-rxtx-supply = <&S4A>;
+		qcom,cdc-vdd-rxtx-voltage = <1800000 1800000>;
+		qcom,cdc-vdd-rxtx-current = <30000>;
+
+		cdc-vddio-supply = <&S4A>;
+		qcom,cdc-vddio-voltage = <1800000 1800000>;
+		qcom,cdc-vddio-current = <30000>;
+
+		cdc-vdd-buck-supply = <&S4A>;
+		qcom,cdc-vdd-buck-voltage = <1800000 1800000>;
+		qcom,cdc-vdd-buck-current = <650000>;
+
+		cdc-vdd-mic-bias-supply = <&BOB>;
+		qcom,cdc-vdd-mic-bias-voltage = <3296000 3296000>;
+		qcom,cdc-vdd-mic-bias-current = <30000>;
+
+		qcom,cdc-micbias1-mv = <1800>;
+		qcom,cdc-micbias2-mv = <1800>;
+		qcom,cdc-micbias3-mv = <1800>;
+		qcom,cdc-micbias4-mv = <1800>;
+
+		qcom,cdc-static-supplies = "cdc-vdd-rxtx",
+					   "cdc-vddio",
+					   "cdc-vdd-buck",
+					   "cdc-vdd-mic-bias";
+	};
+
+};
+
+&kona_snd_ar {
+	qcom,model = "kona-mtp-snd-card";
+	qcom,msm-mi2s-master = <1>, <1>, <1>, <1>, <1>, <1>;
+	qcom,wcn-bt = <1>;
+	qcom,ext-disp-audio-rx = <1>;
+	qcom,audio-routing =
+		"AMIC1", "MIC BIAS1",
+		"MIC BIAS1", "Analog Mic1",
+		"AMIC2", "MIC BIAS2",
+		"MIC BIAS2", "Analog Mic2",
+		"AMIC3", "MIC BIAS3",
+		"MIC BIAS3", "Analog Mic3",
+		"AMIC4", "MIC BIAS3",
+		"MIC BIAS3", "Analog Mic4",
+		"AMIC5", "MIC BIAS4",
+		"MIC BIAS4", "Analog Mic5",
+		"TX DMIC0", "MIC BIAS3",
+		"MIC BIAS3", "Digital Mic0",
+		"TX DMIC1", "MIC BIAS3",
+		"MIC BIAS3", "Digital Mic1",
+		"TX DMIC2", "MIC BIAS1",
+		"MIC BIAS1", "Digital Mic2",
+		"TX DMIC3", "MIC BIAS1",
+		"MIC BIAS1", "Digital Mic3",
+		"TX DMIC4", "MIC BIAS4",
+		"MIC BIAS4", "Digital Mic4",
+		"TX DMIC5", "MIC BIAS4",
+		"MIC BIAS4", "Digital Mic5",
+		"IN1_HPHL", "HPHL_OUT",
+		"IN2_HPHR", "HPHR_OUT",
+		"IN3_AUX", "AUX_OUT",
+		"TX SWR_ADC0", "ADC1_OUTPUT",
+		"TX SWR_ADC1", "ADC2_OUTPUT",
+		"TX SWR_ADC2", "ADC3_OUTPUT",
+		"TX SWR_ADC3", "ADC4_OUTPUT",
+		"TX SWR_DMIC0", "DMIC1_OUTPUT",
+		"TX SWR_DMIC1", "DMIC2_OUTPUT",
+		"TX SWR_DMIC2", "DMIC3_OUTPUT",
+		"TX SWR_DMIC3", "DMIC4_OUTPUT",
+		"TX SWR_DMIC4", "DMIC5_OUTPUT",
+		"TX SWR_DMIC5", "DMIC6_OUTPUT",
+		"TX SWR_DMIC6", "DMIC7_OUTPUT",
+		"TX SWR_DMIC7", "DMIC8_OUTPUT",
+		"WSA SRC0_INP", "SRC0",
+		"WSA_TX DEC0_INP", "TX DEC0 MUX",
+		"WSA_TX DEC1_INP", "TX DEC1 MUX",
+		"RX_TX DEC0_INP", "TX DEC0 MUX",
+		"RX_TX DEC1_INP", "TX DEC1 MUX",
+		"RX_TX DEC2_INP", "TX DEC2 MUX",
+		"RX_TX DEC3_INP", "TX DEC3 MUX",
+		"SpkrLeft IN", "WSA_SPK1 OUT",
+		"SpkrRight IN", "WSA_SPK2 OUT",
+		"VA_AIF1 CAP", "VA_SWR_CLK",
+		"VA_AIF2 CAP", "VA_SWR_CLK",
+		"VA_AIF3 CAP", "VA_SWR_CLK",
+		"VA MIC BIAS3", "Digital Mic0",
+		"VA MIC BIAS3", "Digital Mic1",
+		"VA MIC BIAS1", "Digital Mic2",
+		"VA MIC BIAS1", "Digital Mic3",
+		"VA MIC BIAS4", "Digital Mic4",
+		"VA MIC BIAS4", "Digital Mic5",
+		"VA DMIC0", "VA MIC BIAS3",
+		"VA DMIC1", "VA MIC BIAS3",
+		"VA DMIC2", "VA MIC BIAS1",
+		"VA DMIC3", "VA MIC BIAS1",
+		"VA DMIC4", "VA MIC BIAS4",
+		"VA DMIC5", "VA MIC BIAS4",
+		"VA SWR_ADC0", "VA_SWR_CLK",
+		"VA SWR_ADC1", "VA_SWR_CLK",
+		"VA SWR_ADC2", "VA_SWR_CLK",
+		"VA SWR_ADC3", "VA_SWR_CLK",
+		"VA SWR_MIC0", "VA_SWR_CLK",
+		"VA SWR_MIC1", "VA_SWR_CLK",
+		"VA SWR_MIC2", "VA_SWR_CLK",
+		"VA SWR_MIC3", "VA_SWR_CLK",
+		"VA SWR_MIC4", "VA_SWR_CLK",
+		"VA SWR_MIC5", "VA_SWR_CLK",
+		"VA SWR_MIC6", "VA_SWR_CLK",
+		"VA SWR_MIC7", "VA_SWR_CLK",
+		"VA SWR_ADC0", "ADC1_OUTPUT",
+		"VA SWR_ADC1", "ADC2_OUTPUT",
+		"VA SWR_ADC2", "ADC3_OUTPUT",
+		"VA SWR_ADC3", "ADC4_OUTPUT",
+		"VA SWR_MIC0", "DMIC1_OUTPUT",
+		"VA SWR_MIC1", "DMIC2_OUTPUT",
+		"VA SWR_MIC2", "DMIC3_OUTPUT",
+		"VA SWR_MIC3", "DMIC4_OUTPUT",
+		"VA SWR_MIC4", "DMIC5_OUTPUT",
+		"VA SWR_MIC5", "DMIC6_OUTPUT",
+		"VA SWR_MIC6", "DMIC7_OUTPUT",
+		"VA SWR_MIC7", "DMIC8_OUTPUT";
+	qcom,msm-mbhc-hphl-swh = <1>;
+	qcom,msm-mbhc-gnd-swh = <1>;
+	qcom,cdc-dmic01-gpios = <&cdc_dmic01_gpios_ar>;
+	qcom,cdc-dmic23-gpios = <&cdc_dmic23_gpios_ar>;
+	qcom,cdc-dmic45-gpios = <&cdc_dmic45_gpios_ar>;
+	asoc-codec  = <&stub_codec>, <&bolero_ar>, <&ext_disp_audio_codec>;
+	asoc-codec-names = "msm-stub-codec.1", "bolero_codec",
+			   "msm-ext-disp-audio-codec-rx";
+	qcom,wsa-max-devs = <2>;
+	qcom,wsa-devs = <&wsa881x_0211_ar>, <&wsa881x_0212_ar>,
+			<&wsa881x_0213_ar>, <&wsa881x_0214_ar>;
+	qcom,wsa-aux-dev-prefix = "SpkrLeft", "SpkrRight",
+				  "SpkrLeft", "SpkrRight";
+	qcom,codec-max-aux-devs = <1>;
+	qcom,codec-aux-devs = <&wcd938x_codec_ar>;
+	qcom,msm_audio_ssr_devs = <&audio_gpr>, <&lpi_tlmm_ar>,
+				  <&bolero_ar>;
+};
+
+&spf_core_platform {
+	cdc_dmic01_gpios_ar: cdc_dmic01_pinctrl_ar {
+		compatible = "qcom,msm-cdc-pinctrl";
+		pinctrl-names = "aud_active", "aud_sleep";
+		pinctrl-0 = <&cdc_dmic01_clk_active_ar &cdc_dmic01_data_active_ar>;
+		pinctrl-1 = <&cdc_dmic01_clk_sleep_ar &cdc_dmic01_data_sleep_ar>;
+		qcom,lpi-gpios;
+	};
+
+	cdc_dmic23_gpios_ar: cdc_dmic23_pinctrl_ar {
+		compatible = "qcom,msm-cdc-pinctrl";
+		pinctrl-names = "aud_active", "aud_sleep";
+		pinctrl-0 = <&cdc_dmic23_clk_active_ar &cdc_dmic23_data_active_ar>;
+		pinctrl-1 = <&cdc_dmic23_clk_sleep_ar &cdc_dmic23_data_sleep_ar>;
+		qcom,lpi-gpios;
+	};
+
+	cdc_dmic45_gpios_ar: cdc_dmic45_pinctrl_ar {
+		compatible = "qcom,msm-cdc-pinctrl";
+		pinctrl-names = "aud_active", "aud_sleep";
+		pinctrl-0 = <&cdc_dmic45_clk_active_ar &cdc_dmic45_data_active_ar>;
+		pinctrl-1 = <&cdc_dmic45_clk_sleep_ar &cdc_dmic45_data_sleep_ar>;
+		qcom,lpi-gpios;
+		qcom,tlmm-gpio = <158>;
+	};
+
+	wsa_swr_gpios_ar: wsa_swr_clk_data_pinctrl_ar {
+		compatible = "qcom,msm-cdc-pinctrl";
+		pinctrl-names = "aud_active", "aud_sleep";
+		pinctrl-0 = <&wsa_swr_clk_active_ar &wsa_swr_data_active_ar>;
+		pinctrl-1 = <&wsa_swr_clk_sleep_ar &wsa_swr_data_sleep_ar>;
+		qcom,lpi-gpios;
+	};
+
+	rx_swr_gpios_ar: rx_swr_clk_data_pinctrl_ar {
+		compatible = "qcom,msm-cdc-pinctrl";
+		pinctrl-names = "aud_active", "aud_sleep";
+		pinctrl-0 = <&rx_swr_clk_active_ar &rx_swr_data_active_ar
+				&rx_swr_data1_active_ar>;
+		pinctrl-1 = <&rx_swr_clk_sleep_ar &rx_swr_data_sleep_ar
+				&rx_swr_data1_sleep_ar>;
+		qcom,lpi-gpios;
+	};
+
+	tx_swr_gpios_ar: tx_swr_clk_data_pinctrl_ar {
+		compatible = "qcom,msm-cdc-pinctrl";
+		pinctrl-names = "aud_active", "aud_sleep";
+		pinctrl-0 = <&tx_swr_clk_active_ar &tx_swr_data1_active_ar
+			    &tx_swr_data2_active_ar>;
+		pinctrl-1 = <&tx_swr_clk_sleep_ar &tx_swr_data1_sleep_ar
+			    &tx_swr_data2_sleep_ar>;
+		qcom,lpi-gpios;
+		qcom,tlmm-gpio = <147>;
+	};
+};
diff --git a/qcom/kona-lpi-ar.dtsi b/qcom/kona-lpi-ar.dtsi
new file mode 100644
index 00000000..adb00ed4
--- /dev/null
+++ b/qcom/kona-lpi-ar.dtsi
@@ -0,0 +1,1679 @@
+&spf_core_platform {
+	lpi_tlmm_ar: lpi_pinctrl_ar {
+		compatible = "qcom,lpi-pinctrl";
+		reg = <0x33c0000 0x0>;
+		qcom,slew-reg = <0x355a000 0x0>;
+		qcom,num-gpios = <14>;
+		gpio-controller;
+		#gpio-cells = <2>;
+		qcom,lpi-offset-tbl = <0x00000000>, <0x00001000>,
+				      <0x00002000>, <0x00003000>,
+				      <0x00004000>, <0x00005000>,
+				      <0x00006000>, <0x00007000>,
+				      <0x00008000>, <0x00009000>,
+				      <0x0000A000>, <0x0000B000>,
+				      <0x0000C000>, <0x0000D000>;
+		qcom,lpi-slew-offset-tbl = <0x00000000>, <0x00000002>,
+					   <0x00000004>, <0x00000008>,
+					   <0x0000000A>, <0x0000000C>,
+					   <0x00000000>, <0x00000000>,
+					   <0x00000000>, <0x00000000>,
+					   <0x00000010>, <0x00000012>,
+					   <0x00000000>, <0x00000000>;
+
+		clock-names = "lpass_core_hw_vote",
+				"lpass_audio_hw_vote";
+		clocks = <&lpass_core_hw_vote_ar 0>,
+				<&lpass_audio_hw_vote_ar 0>;
+
+		quat_mi2s_sck_ar {
+			quat_mi2s_sck_sleep_ar: quat_mi2s_sck_sleep_ar {
+				mux {
+					pins = "gpio0";
+					function = "func2";
+				};
+
+				config {
+					pins = "gpio0";
+					drive-strength = <2>;   /* 2 mA */
+					bias-pull-down;         /* PULL DOWN */
+					input-enable;
+				};
+			};
+
+			quat_mi2s_sck_active_ar: quat_mi2s_sck_active_ar {
+				mux {
+					pins = "gpio0";
+					function = "func2";
+				};
+
+				config {
+					pins = "gpio0";
+					drive-strength = <8>;   /* 8 mA */
+					bias-disable;           /* NO PULL */
+					output-high;
+				};
+			};
+		};
+
+		quat_mi2s_ws_ar {
+			quat_mi2s_ws_sleep_ar: quat_mi2s_ws_sleep_ar {
+				mux {
+					pins = "gpio1";
+					function = "func2";
+				};
+
+				config {
+					pins = "gpio1";
+					drive-strength = <2>;   /* 2 mA */
+					bias-pull-down;         /* PULL DOWN */
+					input-enable;
+				};
+			};
+
+			quat_mi2s_ws_active_ar: quat_mi2s_ws_active_ar {
+				mux {
+					pins = "gpio1";
+					function = "func2";
+				};
+
+				config {
+					pins = "gpio1";
+					drive-strength = <8>;   /* 8 mA */
+					bias-disable;           /* NO PULL */
+					output-high;
+				};
+			};
+		};
+
+		quat_mi2s_sd0_ar {
+			quat_mi2s_sd0_sleep_ar: quat_mi2s_sd0_sleep_ar {
+				mux {
+					pins = "gpio2";
+					function = "func2";
+				};
+
+				config {
+					pins = "gpio2";
+					drive-strength = <2>;   /* 2 mA */
+					bias-pull-down;         /* PULL DOWN */
+					input-enable;
+				};
+			};
+
+			quat_mi2s_sd0_active_ar: quat_mi2s_sd0_active_ar {
+				mux {
+					pins = "gpio2";
+					function = "func2";
+				};
+
+				config {
+					pins = "gpio2";
+					drive-strength = <8>;   /* 8 mA */
+					bias-disable;           /* NO PULL */
+					output-high;
+				};
+			};
+		};
+
+		quat_mi2s_sd1_ar {
+			quat_mi2s_sd1_sleep_ar: quat_mi2s_sd1_sleep_ar {
+				mux {
+					pins = "gpio3";
+					function = "func2";
+				};
+
+				config {
+					pins = "gpio3";
+					drive-strength = <2>;   /* 2 mA */
+					bias-pull-down;         /* PULL DOWN */
+					input-enable;
+				};
+			};
+
+			quat_mi2s_sd1_active_ar: quat_mi2s_sd1_active_ar {
+				mux {
+					pins = "gpio3";
+					function = "func2";
+				};
+
+				config {
+					pins = "gpio3";
+					drive-strength = <8>;   /* 8 mA */
+					bias-disable;           /* NO PULL */
+					output-high;
+				};
+			};
+		};
+
+		quat_mi2s_sd2_ar {
+			quat_mi2s_sd2_sleep_ar: quat_mi2s_sd2_sleep_ar {
+				mux {
+					pins = "gpio4";
+					function = "func2";
+				};
+
+				config {
+					pins = "gpio4";
+					drive-strength = <2>;   /* 2 mA */
+					bias-pull-down;         /* PULL DOWN */
+					input-enable;
+				};
+			};
+
+			quat_mi2s_sd2_active_ar: quat_mi2s_sd2_active_ar {
+				mux {
+					pins = "gpio4";
+					function = "func2";
+				};
+
+				config {
+					pins = "gpio4";
+					drive-strength = <8>;   /* 8 mA */
+					bias-disable;           /* NO PULL */
+					output-high;
+				};
+			};
+		};
+
+		quat_mi2s_sd3_ar {
+			quat_mi2s_sd3_sleep_ar: quat_mi2s_sd3_sleep_ar {
+				mux {
+					pins = "gpio5";
+					function = "func4";
+				};
+
+				config {
+					pins = "gpio5";
+					drive-strength = <2>;   /* 2 mA */
+					bias-pull-down;         /* PULL DOWN */
+					input-enable;
+				};
+			};
+
+			quat_mi2s_sd3_active_ar: quat_mi2s_sd3_active_ar {
+				mux {
+					pins = "gpio5";
+					function = "func4";
+				};
+
+				config {
+					pins = "gpio5";
+					drive-strength = <8>;   /* 8 mA */
+					bias-disable;           /* NO PULL */
+					output-high;
+				};
+			};
+		};
+
+		lpi_i2s1_sck_ar {
+			lpi_i2s1_sck_sleep_ar: lpi_i2s1_sck_sleep_ar {
+				mux {
+					pins = "gpio6";
+					function = "func2";
+				};
+
+				config {
+					pins = "gpio6";
+					drive-strength = <2>;   /* 2 mA */
+					bias-pull-down;         /* PULL DOWN */
+					input-enable;
+				};
+			};
+
+			lpi_i2s1_sck_active_ar: lpi_i2s1_sck_active_ar {
+				mux {
+					pins = "gpio6";
+					function = "func2";
+				};
+
+				config {
+					pins = "gpio6";
+					drive-strength = <8>;   /* 8 mA */
+					bias-disable;           /* NO PULL */
+					output-high;
+				};
+			};
+		};
+
+		lpi_i2s1_ws_ar {
+			lpi_i2s1_ws_sleep_ar: lpi_i2s1_ws_sleep_ar {
+				mux {
+					pins = "gpio7";
+					function = "func2";
+				};
+
+				config {
+					pins = "gpio7";
+					drive-strength = <2>;   /* 2 mA */
+					bias-pull-down;         /* PULL DOWN */
+					input-enable;
+				};
+			};
+
+			lpi_i2s1_ws_active_ar: lpi_i2s1_ws_active_ar {
+				mux {
+					pins = "gpio7";
+					function = "func2";
+				};
+
+				config {
+					pins = "gpio7";
+					drive-strength = <8>;   /* 8 mA */
+					bias-disable;           /* NO PULL */
+					output-high;
+				};
+			};
+		};
+
+		lpi_i2s1_sd0_ar {
+			lpi_i2s1_sd0_sleep_ar: lpi_i2s1_sd0_sleep_ar {
+				mux {
+					pins = "gpio8";
+					function = "func2";
+				};
+
+				config {
+					pins = "gpio8";
+					drive-strength = <2>;   /* 2 mA */
+					bias-pull-down;         /* PULL DOWN */
+					input-enable;
+				};
+			};
+
+			lpi_i2s1_sd0_active_ar: lpi_i2s1_sd0_active_ar {
+				mux {
+					pins = "gpio8";
+					function = "func2";
+				};
+
+				config {
+					pins = "gpio8";
+					drive-strength = <8>;   /* 8 mA */
+					bias-disable;           /* NO PULL */
+					output-high;
+				};
+			};
+		};
+
+		lpi_i2s1_sd1_ar {
+			lpi_i2s1_sd1_sleep_ar: lpi_i2s1_sd1_sleep_ar {
+				mux {
+					pins = "gpio9";
+					function = "func2";
+				};
+
+				config {
+					pins = "gpio9";
+					drive-strength = <2>;   /* 2 mA */
+					bias-pull-down;         /* PULL DOWN */
+					input-enable;
+				};
+			};
+
+			lpi_i2s1_sd1_active_ar: lpi_i2s1_sd1_active_ar {
+				mux {
+					pins = "gpio9";
+					function = "func2";
+				};
+
+				config {
+					pins = "gpio9";
+					drive-strength = <8>;   /* 8 mA */
+					bias-disable;           /* NO PULL */
+					output-high;
+				};
+			};
+		};
+
+		lpi_i2s2_sck_ar {
+			lpi_i2s2_sck_sleep_ar: lpi_i2s2_sck_sleep_ar {
+				mux {
+					pins = "gpio10";
+					function = "func1";
+				};
+
+				config {
+					pins = "gpio10";
+					drive-strength = <2>;   /* 2 mA */
+					bias-pull-down;         /* PULL DOWN */
+					input-enable;
+				};
+			};
+
+			lpi_i2s2_sck_active_ar: lpi_i2s2_sck_active_ar {
+				mux {
+					pins = "gpio10";
+					function = "func1";
+				};
+
+				config {
+					pins = "gpio10";
+					drive-strength = <8>;   /* 8 mA */
+					bias-disable;           /* NO PULL */
+					output-high;
+				};
+			};
+		};
+
+		lpi_i2s2_ws_ar {
+			lpi_i2s2_ws_sleep_ar: lpi_i2s2_ws_sleep_ar {
+				mux {
+					pins = "gpio11";
+					function = "func1";
+				};
+
+				config {
+					pins = "gpio11";
+					drive-strength = <2>;   /* 2 mA */
+					bias-pull-down;         /* PULL DOWN */
+					input-enable;
+				};
+			};
+
+			lpi_i2s2_ws_active_ar: lpi_i2s2_ws_active_ar {
+				mux {
+					pins = "gpio11";
+					function = "func1";
+				};
+
+				config {
+					pins = "gpio11";
+					drive-strength = <8>;   /* 8 mA */
+					bias-disable;           /* NO PULL */
+					output-high;
+				};
+			};
+		};
+
+		lpi_i2s2_sd0_ar {
+			lpi_i2s2_sd0_sleep_ar: lpi_i2s2_sd0_sleep_ar {
+				mux {
+					pins = "gpio12";
+					function = "func2";
+				};
+
+				config {
+					pins = "gpio12";
+					drive-strength = <2>;   /* 2 mA */
+					bias-pull-down;         /* PULL DOWN */
+					input-enable;
+				};
+			};
+
+			lpi_i2s2_sd0_active_ar: lpi_i2s2_sd0_active_ar {
+				mux {
+					pins = "gpio12";
+					function = "func2";
+				};
+
+				config {
+					pins = "gpio12";
+					drive-strength = <8>;   /* 8 mA */
+					bias-disable;           /* NO PULL */
+					output-high;
+				};
+			};
+		};
+
+		lpi_i2s2_sd1_ar {
+			lpi_i2s2_sd1_sleep_ar: lpi_i2s2_sd1_sleep_ar {
+				mux {
+					pins = "gpio13";
+					function = "func2";
+				};
+
+				config {
+					pins = "gpio13";
+					drive-strength = <2>;   /* 2 mA */
+					bias-pull-down;         /* PULL DOWN */
+					input-enable;
+				};
+			};
+
+			lpi_i2s2_sd1_active_ar: lpi_i2s2_sd1_active_ar {
+				mux {
+					pins = "gpio13";
+					function = "func2";
+				};
+
+				config {
+					pins = "gpio13";
+					drive-strength = <8>;   /* 8 mA */
+					bias-disable;           /* NO PULL */
+					output-high;
+				};
+			};
+		};
+
+		quat_tdm_sck_ar {
+			quat_tdm_sck_sleep_ar: quat_tdm_sck_sleep_ar {
+				mux {
+					pins = "gpio0";
+					function = "func2";
+				};
+
+				config {
+					pins = "gpio0";
+					drive-strength = <2>;   /* 2 mA */
+					bias-pull-down;         /* PULL DOWN */
+					input-enable;
+				};
+			};
+
+			quat_tdm_sck_active_ar: quat_tdm_sck_active_ar {
+				mux {
+					pins = "gpio0";
+					function = "func2";
+				};
+
+				config {
+					pins = "gpio0";
+					drive-strength = <8>;   /* 8 mA */
+					bias-disable;           /* NO PULL */
+					output-high;
+				};
+			};
+		};
+
+		quat_tdm_ws_ar {
+			quat_tdm_ws_sleep_ar: quat_tdm_ws_sleep_ar {
+				mux {
+					pins = "gpio1";
+					function = "func2";
+				};
+
+				config {
+					pins = "gpio1";
+					drive-strength = <2>;   /* 2 mA */
+					bias-pull-down;         /* PULL DOWN */
+					input-enable;
+				};
+			};
+
+			quat_tdm_ws_active_ar: quat_tdm_ws_active_ar {
+				mux {
+					pins = "gpio1";
+					function = "func2";
+				};
+
+				config {
+					pins = "gpio1";
+					drive-strength = <8>;   /* 8 mA */
+					bias-disable;           /* NO PULL */
+					output-high;
+				};
+			};
+		};
+
+		quat_tdm_sd0_ar {
+			quat_tdm_sd0_sleep_ar: quat_tdm_sd0_sleep_ar {
+				mux {
+					pins = "gpio2";
+					function = "func2";
+				};
+
+				config {
+					pins = "gpio2";
+					drive-strength = <2>;   /* 2 mA */
+					bias-pull-down;         /* PULL DOWN */
+					input-enable;
+				};
+			};
+
+			quat_tdm_sd0_active_ar: quat_tdm_sd0_active_ar {
+				mux {
+					pins = "gpio2";
+					function = "func2";
+				};
+
+				config {
+					pins = "gpio2";
+					drive-strength = <8>;   /* 8 mA */
+					bias-disable;           /* NO PULL */
+					output-high;
+				};
+			};
+		};
+
+		quat_tdm_sd1_ar {
+			quat_tdm_sd1_sleep_ar: quat_tdm_sd1_sleep_ar {
+				mux {
+					pins = "gpio3";
+					function = "func2";
+				};
+
+				config {
+					pins = "gpio3";
+					drive-strength = <2>;   /* 2 mA */
+					bias-pull-down;         /* PULL DOWN */
+					input-enable;
+				};
+			};
+
+			quat_tdm_sd1_active_ar: quat_tdm_sd1_active_ar {
+				mux {
+					pins = "gpio3";
+					function = "func2";
+				};
+
+				config {
+					pins = "gpio3";
+					drive-strength = <8>;   /* 8 mA */
+					bias-disable;           /* NO PULL */
+					output-high;
+				};
+			};
+		};
+
+		quat_tdm_sd2_ar {
+			quat_tdm_sd2_sleep_ar: quat_tdm_sd2_sleep_ar {
+				mux {
+					pins = "gpio4";
+					function = "func2";
+				};
+
+				config {
+					pins = "gpio4";
+					drive-strength = <2>;   /* 2 mA */
+					bias-pull-down;         /* PULL DOWN */
+					input-enable;
+				};
+			};
+
+			quat_tdm_sd2_active_ar: quat_tdm_sd2_active_ar {
+				mux {
+					pins = "gpio4";
+					function = "func2";
+				};
+
+				config {
+					pins = "gpio4";
+					drive-strength = <8>;   /* 8 mA */
+					bias-disable;           /* NO PULL */
+					output-high;
+				};
+			};
+		};
+
+		quat_tdm_sd3_ar {
+			quat_tdm_sd3_sleep_ar: quat_tdm_sd3_sleep_ar {
+				mux {
+					pins = "gpio5";
+					function = "func4";
+				};
+
+				config {
+					pins = "gpio5";
+					drive-strength = <2>;   /* 2 mA */
+					bias-pull-down;         /* PULL DOWN */
+					input-enable;
+				};
+			};
+
+			quat_tdm_sd3_active_ar: quat_tdm_sd3_active_ar {
+				mux {
+					pins = "gpio5";
+					function = "func4";
+				};
+
+				config {
+					pins = "gpio5";
+					drive-strength = <8>;   /* 8 mA */
+					bias-disable;           /* NO PULL */
+					output-high;
+				};
+			};
+		};
+
+		lpi_tdm1_sck_ar {
+			lpi_tdm1_sck_sleep_ar: lpi_tdm1_sck_sleep_ar {
+				mux {
+					pins = "gpio6";
+					function = "func2";
+				};
+
+				config {
+					pins = "gpio6";
+					drive-strength = <2>;   /* 2 mA */
+					bias-pull-down;         /* PULL DOWN */
+					input-enable;
+				};
+			};
+
+			lpi_tdm1_sck_active_ar: lpi_tdm1_sck_active_ar {
+				mux {
+					pins = "gpio6";
+					function = "func2";
+				};
+
+				config {
+					pins = "gpio6";
+					drive-strength = <8>;   /* 8 mA */
+					bias-disable;           /* NO PULL */
+					output-high;
+				};
+			};
+		};
+
+		lpi_tdm1_ws_ar {
+			lpi_tdm1_ws_sleep_ar: lpi_tdm1_ws_sleep_ar {
+				mux {
+					pins = "gpio7";
+					function = "func2";
+				};
+
+				config {
+					pins = "gpio7";
+					drive-strength = <2>;   /* 2 mA */
+					bias-pull-down;         /* PULL DOWN */
+					input-enable;
+				};
+			};
+
+			lpi_tdm1_ws_active_ar: lpi_tdm1_ws_active_ar {
+				mux {
+					pins = "gpio7";
+					function = "func2";
+				};
+
+				config {
+					pins = "gpio7";
+					drive-strength = <8>;   /* 8 mA */
+					bias-disable;           /* NO PULL */
+					output-high;
+				};
+			};
+		};
+
+		lpi_tdm1_sd0_ar {
+			lpi_tdm1_sd0_sleep_ar: lpi_tdm1_sd0_sleep_ar {
+				mux {
+					pins = "gpio8";
+					function = "func2";
+				};
+
+				config {
+					pins = "gpio8";
+					drive-strength = <2>;   /* 2 mA */
+					bias-pull-down;         /* PULL DOWN */
+					input-enable;
+				};
+			};
+
+			lpi_tdm1_sd0_active_ar: lpi_tdm1_sd0_active_ar {
+				mux {
+					pins = "gpio8";
+					function = "func2";
+				};
+
+				config {
+					pins = "gpio8";
+					drive-strength = <8>;   /* 8 mA */
+					bias-disable;           /* NO PULL */
+					output-high;
+				};
+			};
+		};
+
+		lpi_tdm1_sd1_ar {
+			lpi_tdm1_sd1_sleep_ar: lpi_tdm1_sd1_sleep_ar {
+				mux {
+					pins = "gpio9";
+					function = "func2";
+				};
+
+				config {
+					pins = "gpio9";
+					drive-strength = <2>;   /* 2 mA */
+					bias-pull-down;         /* PULL DOWN */
+					input-enable;
+				};
+			};
+
+			lpi_tdm1_sd1_active_ar: lpi_tdm1_sd1_active_ar {
+				mux {
+					pins = "gpio9";
+					function = "func2";
+				};
+
+				config {
+					pins = "gpio9";
+					drive-strength = <8>;   /* 8 mA */
+					bias-disable;           /* NO PULL */
+					output-high;
+				};
+			};
+		};
+
+		lpi_tdm2_sck_ar {
+			lpi_tdm2_sck_sleep_ar: lpi_tdm2_sck_sleep_ar {
+				mux {
+					pins = "gpio10";
+					function = "func1";
+				};
+
+				config {
+					pins = "gpio10";
+					drive-strength = <2>;   /* 2 mA */
+					bias-pull-down;         /* PULL DOWN */
+					input-enable;
+				};
+			};
+
+			lpi_tdm2_sck_active_ar: lpi_tdm2_sck_active_ar {
+				mux {
+					pins = "gpio10";
+					function = "func1";
+				};
+
+				config {
+					pins = "gpio10";
+					drive-strength = <8>;   /* 8 mA */
+					bias-disable;           /* NO PULL */
+					output-high;
+				};
+			};
+		};
+
+		lpi_tdm2_ws_ar {
+			lpi_tdm2_ws_sleep_ar: lpi_tdm2_ws_sleep_ar {
+				mux {
+					pins = "gpio11";
+					function = "func1";
+				};
+
+				config {
+					pins = "gpio11";
+					drive-strength = <2>;   /* 2 mA */
+					bias-pull-down;         /* PULL DOWN */
+					input-enable;
+				};
+			};
+
+			lpi_tdm2_ws_active_ar: lpi_tdm2_ws_active_ar {
+				mux {
+					pins = "gpio11";
+					function = "func1";
+				};
+
+				config {
+					pins = "gpio11";
+					drive-strength = <8>;   /* 8 mA */
+					bias-disable;           /* NO PULL */
+					output-high;
+				};
+			};
+		};
+
+		lpi_tdm2_sd0_ar {
+			lpi_tdm2_sd0_sleep_ar: lpi_tdm2_sd0_sleep_ar {
+				mux {
+					pins = "gpio12";
+					function = "func2";
+				};
+
+				config {
+					pins = "gpio12";
+					drive-strength = <2>;   /* 2 mA */
+					bias-pull-down;         /* PULL DOWN */
+					input-enable;
+				};
+			};
+
+			lpi_tdm2_sd0_active_ar: lpi_tdm2_sd0_active_ar {
+				mux {
+					pins = "gpio12";
+					function = "func2";
+				};
+
+				config {
+					pins = "gpio12";
+					drive-strength = <8>;   /* 8 mA */
+					bias-disable;           /* NO PULL */
+					output-high;
+				};
+			};
+		};
+
+		lpi_tdm2_sd1_ar {
+			lpi_tdm2_sd1_sleep_ar: lpi_tdm2_sd1_sleep_ar {
+				mux {
+					pins = "gpio13";
+					function = "func2";
+				};
+
+				config {
+					pins = "gpio13";
+					drive-strength = <2>;   /* 2 mA */
+					bias-pull-down;         /* PULL DOWN */
+					input-enable;
+				};
+			};
+
+			lpi_tdm2_sd1_active_ar: lpi_tdm2_sd1_active_ar {
+				mux {
+					pins = "gpio13";
+					function = "func2";
+				};
+
+				config {
+					pins = "gpio13";
+					drive-strength = <8>;   /* 8 mA */
+					bias-disable;           /* NO PULL */
+					output-high;
+				};
+			};
+		};
+
+		quat_aux_sck_ar {
+			quat_aux_sck_sleep_ar: quat_aux_sck_sleep_ar {
+				mux {
+					pins = "gpio0";
+					function = "func2";
+				};
+
+				config {
+					pins = "gpio0";
+					drive-strength = <2>;   /* 2 mA */
+					bias-pull-down;         /* PULL DOWN */
+					input-enable;
+				};
+			};
+
+			quat_aux_sck_active_ar: quat_aux_sck_active_ar {
+				mux {
+					pins = "gpio0";
+					function = "func2";
+				};
+
+				config {
+					pins = "gpio0";
+					drive-strength = <8>;   /* 8 mA */
+					bias-disable;           /* NO PULL */
+					output-high;
+				};
+			};
+		};
+
+		quat_aux_ws_ar {
+			quat_aux_ws_sleep_ar: quat_aux_ws_sleep_ar {
+				mux {
+					pins = "gpio1";
+					function = "func2";
+				};
+
+				config {
+					pins = "gpio1";
+					drive-strength = <2>;   /* 2 mA */
+					bias-pull-down;         /* PULL DOWN */
+					input-enable;
+				};
+			};
+
+			quat_aux_ws_active_ar: quat_aux_ws_active_ar {
+				mux {
+					pins = "gpio1";
+					function = "func2";
+				};
+
+				config {
+					pins = "gpio1";
+					drive-strength = <8>;   /* 8 mA */
+					bias-disable;           /* NO PULL */
+					output-high;
+				};
+			};
+		};
+
+		quat_aux_sd0_ar {
+			quat_aux_sd0_sleep_ar: quat_aux_sd0_sleep_ar {
+				mux {
+					pins = "gpio2";
+					function = "func2";
+				};
+
+				config {
+					pins = "gpio2";
+					drive-strength = <2>;   /* 2 mA */
+					bias-pull-down;         /* PULL DOWN */
+					input-enable;
+				};
+			};
+
+			quat_aux_sd0_active_ar: quat_aux_sd0_active_ar {
+				mux {
+					pins = "gpio2";
+					function = "func2";
+				};
+
+				config {
+					pins = "gpio2";
+					drive-strength = <8>;   /* 8 mA */
+					bias-disable;           /* NO PULL */
+					output-high;
+				};
+			};
+		};
+
+		quat_aux_sd1_ar {
+			quat_aux_sd1_sleep_ar: quat_aux_sd1_sleep_ar {
+				mux {
+					pins = "gpio3";
+					function = "func2";
+				};
+
+				config {
+					pins = "gpio3";
+					drive-strength = <2>;   /* 2 mA */
+					bias-pull-down;         /* PULL DOWN */
+					input-enable;
+				};
+			};
+
+			quat_aux_sd1_active_ar: quat_aux_sd1_active_ar {
+				mux {
+					pins = "gpio3";
+					function = "func2";
+				};
+
+				config {
+					pins = "gpio3";
+					drive-strength = <8>;   /* 8 mA */
+					bias-disable;           /* NO PULL */
+					output-high;
+				};
+			};
+		};
+
+		quat_aux_sd2_ar {
+			quat_aux_sd2_sleep_ar: quat_aux_sd2_sleep_ar {
+				mux {
+					pins = "gpio4";
+					function = "func2";
+				};
+
+				config {
+					pins = "gpio4";
+					drive-strength = <2>;   /* 2 mA */
+					bias-pull-down;         /* PULL DOWN */
+					input-enable;
+				};
+			};
+
+			quat_aux_sd2_active_ar: quat_aux_sd2_active_ar {
+				mux {
+					pins = "gpio4";
+					function = "func2";
+				};
+
+				config {
+					pins = "gpio4";
+					drive-strength = <8>;   /* 8 mA */
+					bias-disable;           /* NO PULL */
+					output-high;
+				};
+			};
+		};
+
+		quat_aux_sd3_ar {
+			quat_aux_sd3_sleep_ar: quat_aux_sd3_sleep_ar {
+				mux {
+					pins = "gpio5";
+					function = "func4";
+				};
+
+				config {
+					pins = "gpio5";
+					drive-strength = <2>;   /* 2 mA */
+					bias-pull-down;         /* PULL DOWN */
+					input-enable;
+				};
+			};
+
+			quat_aux_sd3_active_ar: quat_aux_sd3_active_ar {
+				mux {
+					pins = "gpio5";
+					function = "func4";
+				};
+
+				config {
+					pins = "gpio5";
+					drive-strength = <8>;   /* 8 mA */
+					bias-disable;           /* NO PULL */
+					output-high;
+				};
+			};
+		};
+
+		lpi_aux1_sck_ar {
+			lpi_aux1_sck_sleep_ar: lpi_aux1_sck_sleep_ar {
+				mux {
+					pins = "gpio6";
+					function = "func2";
+				};
+
+				config {
+					pins = "gpio6";
+					drive-strength = <2>;   /* 2 mA */
+					bias-pull-down;         /* PULL DOWN */
+					input-enable;
+				};
+			};
+
+			lpi_aux1_sck_active_ar: lpi_aux1_sck_active_ar {
+				mux {
+					pins = "gpio6";
+					function = "func2";
+				};
+
+				config {
+					pins = "gpio6";
+					drive-strength = <8>;   /* 8 mA */
+					bias-disable;           /* NO PULL */
+					output-high;
+				};
+			};
+		};
+
+		lpi_aux1_ws_ar {
+			lpi_aux1_ws_sleep_ar: lpi_aux1_ws_sleep_ar {
+				mux {
+					pins = "gpio7";
+					function = "func2";
+				};
+
+				config {
+					pins = "gpio7";
+					drive-strength = <2>;   /* 2 mA */
+					bias-pull-down;         /* PULL DOWN */
+					input-enable;
+				};
+			};
+
+			lpi_aux1_ws_active_ar: lpi_aux1_ws_active_ar {
+				mux {
+					pins = "gpio7";
+					function = "func2";
+				};
+
+				config {
+					pins = "gpio7";
+					drive-strength = <8>;   /* 8 mA */
+					bias-disable;           /* NO PULL */
+					output-high;
+				};
+			};
+		};
+
+		lpi_aux1_sd0_ar {
+			lpi_aux1_sd0_sleep_ar: lpi_aux1_sd0_sleep_ar {
+				mux {
+					pins = "gpio8";
+					function = "func2";
+				};
+
+				config {
+					pins = "gpio8";
+					drive-strength = <2>;   /* 2 mA */
+					bias-pull-down;         /* PULL DOWN */
+					input-enable;
+				};
+			};
+
+			lpi_aux1_sd0_active_ar: lpi_aux1_sd0_active_ar {
+				mux {
+					pins = "gpio8";
+					function = "func2";
+				};
+
+				config {
+					pins = "gpio8";
+					drive-strength = <8>;   /* 8 mA */
+					bias-disable;           /* NO PULL */
+					output-high;
+				};
+			};
+		};
+
+		lpi_aux1_sd1_ar {
+			lpi_aux1_sd1_sleep_ar: lpi_aux1_sd1_sleep_ar {
+				mux {
+					pins = "gpio9";
+					function = "func2";
+				};
+
+				config {
+					pins = "gpio9";
+					drive-strength = <2>;   /* 2 mA */
+					bias-pull-down;         /* PULL DOWN */
+					input-enable;
+				};
+			};
+
+			lpi_aux1_sd1_active_ar: lpi_aux1_sd1_active_ar {
+				mux {
+					pins = "gpio9";
+					function = "func2";
+				};
+
+				config {
+					pins = "gpio9";
+					drive-strength = <8>;   /* 8 mA */
+					bias-disable;           /* NO PULL */
+					output-high;
+				};
+			};
+		};
+
+		lpi_aux2_sck_ar {
+			lpi_aux2_sck_sleep_ar: lpi_aux2_sck_sleep_ar {
+				mux {
+					pins = "gpio10";
+					function = "func1";
+				};
+
+				config {
+					pins = "gpio10";
+					drive-strength = <2>;   /* 2 mA */
+					bias-pull-down;         /* PULL DOWN */
+					input-enable;
+				};
+			};
+
+			lpi_aux2_sck_active_ar: lpi_aux2_sck_active_ar {
+				mux {
+					pins = "gpio10";
+					function = "func1";
+				};
+
+				config {
+					pins = "gpio10";
+					drive-strength = <8>;   /* 8 mA */
+					bias-disable;           /* NO PULL */
+					output-high;
+				};
+			};
+		};
+
+		lpi_aux2_ws_ar {
+			lpi_aux2_ws_sleep_ar: lpi_aux2_ws_sleep_ar {
+				mux {
+					pins = "gpio11";
+					function = "func1";
+				};
+
+				config {
+					pins = "gpio11";
+					drive-strength = <2>;   /* 2 mA */
+					bias-pull-down;         /* PULL DOWN */
+					input-enable;
+				};
+			};
+
+			lpi_aux2_ws_active_ar: lpi_aux2_ws_active_ar {
+				mux {
+					pins = "gpio11";
+					function = "func1";
+				};
+
+				config {
+					pins = "gpio11";
+					drive-strength = <8>;   /* 8 mA */
+					bias-disable;           /* NO PULL */
+					output-high;
+				};
+			};
+		};
+
+		lpi_aux2_sd0_ar {
+			lpi_aux2_sd0_sleep_ar: lpi_aux2_sd0_sleep_ar {
+				mux {
+					pins = "gpio12";
+					function = "func2";
+				};
+
+				config {
+					pins = "gpio12";
+					drive-strength = <2>;   /* 2 mA */
+					bias-pull-down;         /* PULL DOWN */
+					input-enable;
+				};
+			};
+
+			lpi_aux2_sd0_active_ar: lpi_aux2_sd0_active_ar {
+				mux {
+					pins = "gpio12";
+					function = "func2";
+				};
+
+				config {
+					pins = "gpio12";
+					drive-strength = <8>;   /* 8 mA */
+					bias-disable;           /* NO PULL */
+					output-high;
+				};
+			};
+		};
+
+		lpi_aux2_sd1_ar {
+			lpi_aux2_sd1_sleep_ar: lpi_aux2_sd1_sleep_ar {
+				mux {
+					pins = "gpio13";
+					function = "func2";
+				};
+
+				config {
+					pins = "gpio13";
+					drive-strength = <2>;   /* 2 mA */
+					bias-pull-down;         /* PULL DOWN */
+					input-enable;
+				};
+			};
+
+			lpi_aux2_sd1_active_ar: lpi_aux2_sd1_active_ar {
+				mux {
+					pins = "gpio13";
+					function = "func2";
+				};
+
+				config {
+					pins = "gpio13";
+					drive-strength = <8>;   /* 8 mA */
+					bias-disable;           /* NO PULL */
+					output-high;
+				};
+			};
+		};
+
+		wsa_swr_clk_pin_ar {
+			wsa_swr_clk_sleep_ar: wsa_swr_clk_sleep_ar {
+				mux {
+					pins = "gpio10";
+					function = "func2";
+				};
+
+				config {
+					pins = "gpio10";
+					drive-strength = <2>;
+					input-enable;
+					bias-pull-down;
+				};
+			};
+
+			wsa_swr_clk_active_ar: wsa_swr_clk_active_ar {
+				mux {
+					pins = "gpio10";
+					function = "func2";
+				};
+
+				config {
+					pins = "gpio10";
+					drive-strength = <2>;
+					slew-rate = <1>;
+					bias-disable;
+				};
+			};
+		};
+
+		wsa_swr_data_pin_ar {
+			wsa_swr_data_sleep_ar: wsa_swr_data_sleep_ar {
+				mux {
+					pins = "gpio11";
+					function = "func2";
+				};
+
+				config {
+					pins = "gpio11";
+					drive-strength = <2>;
+					input-enable;
+					bias-pull-down;
+				};
+			};
+
+			wsa_swr_data_active_ar: wsa_swr_data_active_ar {
+				mux {
+					pins = "gpio11";
+					function = "func2";
+				};
+
+				config {
+					pins = "gpio11";
+					drive-strength = <2>;
+					slew-rate = <1>;
+					bias-bus-hold;
+				};
+			};
+		};
+
+		tx_swr_clk_sleep_ar: tx_swr_clk_sleep_ar {
+			mux {
+				pins = "gpio0";
+				function = "func1";
+				input-enable;
+				bias-pull-down;
+			};
+
+			config {
+				pins = "gpio0";
+				drive-strength = <2>;
+			};
+		};
+
+		tx_swr_clk_active_ar: tx_swr_clk_active_ar {
+			mux {
+				pins = "gpio0";
+				function = "func1";
+			};
+
+			config {
+				pins = "gpio0";
+				drive-strength = <2>;
+				slew-rate = <1>;
+				bias-disable;
+			};
+		};
+
+		tx_swr_data1_sleep_ar: tx_swr_data1_sleep_ar {
+			mux {
+				pins = "gpio1";
+				function = "func1";
+			};
+
+			config {
+				pins = "gpio1";
+				drive-strength = <2>;
+				input-enable;
+				bias-bus-hold;
+			};
+		};
+
+		tx_swr_data1_active_ar: tx_swr_data1_active_ar {
+			mux {
+				pins = "gpio1";
+				function = "func1";
+			};
+
+			config {
+				pins = "gpio1";
+				drive-strength = <2>;
+				slew-rate = <1>;
+				bias-bus-hold;
+			};
+		};
+
+		tx_swr_data2_sleep_ar: tx_swr_data2_sleep_ar {
+			mux {
+				pins = "gpio2";
+				function = "func1";
+			};
+
+			config {
+				pins = "gpio2";
+				drive-strength = <2>;
+				input-enable;
+				bias-pull-down;
+			};
+		};
+
+		tx_swr_data2_active_ar: tx_swr_data2_active_ar {
+			mux {
+				pins = "gpio2";
+				function = "func1";
+			};
+
+			config {
+				pins = "gpio2";
+				drive-strength = <2>;
+				slew-rate = <1>;
+				bias-bus-hold;
+			};
+		};
+
+		rx_swr_clk_sleep_ar: rx_swr_clk_sleep_ar {
+			mux {
+				pins = "gpio3";
+				function = "func1";
+			};
+
+			config {
+				pins = "gpio3";
+				drive-strength = <2>;
+				input-enable;
+				bias-pull-down;
+			};
+		};
+
+		rx_swr_clk_active_ar: rx_swr_clk_active_ar {
+			mux {
+				pins = "gpio3";
+				function = "func1";
+			};
+
+			config {
+				pins = "gpio3";
+				drive-strength = <2>;
+				slew-rate = <1>;
+				bias-disable;
+			};
+		};
+
+		rx_swr_data_sleep_ar: rx_swr_data_sleep_ar {
+			mux {
+				pins = "gpio4";
+				function = "func1";
+			};
+
+			config {
+				pins = "gpio4";
+				drive-strength = <2>;
+				input-enable;
+				bias-pull-down;
+			};
+		};
+
+		rx_swr_data_active_ar: rx_swr_data_active_ar {
+			mux {
+				pins = "gpio4";
+				function = "func1";
+			};
+
+			config {
+				pins = "gpio4";
+				drive-strength = <2>;
+				slew-rate = <1>;
+				bias-bus-hold;
+			};
+		};
+
+		rx_swr_data1_sleep_ar: rx_swr_data1_sleep_ar {
+			mux {
+				pins = "gpio5";
+				function = "func2";
+			};
+
+			config {
+				pins = "gpio5";
+				drive-strength = <2>;
+				input-enable;
+				bias-pull-down;
+			};
+		};
+
+		rx_swr_data1_active_ar: rx_swr_data1_active_ar {
+			mux {
+				pins = "gpio5";
+				function = "func2";
+			};
+
+			config {
+				pins = "gpio5";
+				drive-strength = <2>;
+				slew-rate = <1>;
+				bias-bus-hold;
+			};
+		};
+
+		cdc_dmic01_clk_active_ar: dmic01_clk_active_ar {
+			mux {
+				pins = "gpio6";
+				function = "func1";
+			};
+
+			config {
+				pins = "gpio6";
+				drive-strength = <8>;
+				output-high;
+			};
+		};
+
+		cdc_dmic01_clk_sleep_ar: dmic01_clk_sleep_ar {
+			mux {
+				pins = "gpio6";
+				function = "func1";
+			};
+
+			config {
+				pins = "gpio6";
+				drive-strength = <2>;
+				bias-disable;
+				output-low;
+			};
+		};
+
+		cdc_dmic01_data_active_ar: dmic01_data_active_ar {
+			mux {
+				pins = "gpio7";
+				function = "func1";
+			};
+
+			config {
+				pins = "gpio7";
+				drive-strength = <8>;
+				input-enable;
+			};
+		};
+
+		cdc_dmic01_data_sleep_ar: dmic01_data_sleep_ar {
+			mux {
+				pins = "gpio7";
+				function = "func1";
+			};
+
+			config {
+				pins = "gpio7";
+				drive-strength = <2>;
+				pull-down;
+				input-enable;
+			};
+		};
+
+		cdc_dmic23_clk_active_ar: dmic23_clk_active_ar {
+			mux {
+				pins = "gpio8";
+				function = "func1";
+			};
+
+			config {
+				pins = "gpio8";
+				drive-strength = <8>;
+				output-high;
+			};
+		};
+
+		cdc_dmic23_clk_sleep_ar: dmic23_clk_sleep_ar {
+			mux {
+				pins = "gpio8";
+				function = "func1";
+			};
+
+			config {
+				pins = "gpio8";
+				drive-strength = <2>;
+				bias-disable;
+				output-low;
+			};
+		};
+
+		cdc_dmic23_data_active_ar: dmic23_data_active_ar {
+			mux {
+				pins = "gpio9";
+				function = "func1";
+			};
+
+			config {
+				pins = "gpio9";
+				drive-strength = <8>;
+				input-enable;
+			};
+		};
+
+		cdc_dmic23_data_sleep_ar: dmic23_data_sleep_ar {
+			mux {
+				pins = "gpio9";
+				function = "func1";
+			};
+
+			config {
+				pins = "gpio9";
+				drive-strength = <2>;
+				pull-down;
+				input-enable;
+			};
+		};
+
+		cdc_dmic45_clk_active_ar: dmic45_clk_active_ar {
+			mux {
+				pins = "gpio12";
+				function = "func1";
+			};
+
+			config {
+				pins = "gpio12";
+				drive-strength = <8>;
+				output-high;
+			};
+		};
+
+		cdc_dmic45_clk_sleep_ar: dmic45_clk_sleep_ar {
+			mux {
+				pins = "gpio12";
+				function = "func1";
+			};
+
+			config {
+				pins = "gpio12";
+				drive-strength = <2>;
+				bias-disable;
+				output-low;
+			};
+		};
+
+		cdc_dmic45_data_active_ar: dmic45_data_active_ar {
+			mux {
+				pins = "gpio13";
+				function = "func1";
+			};
+
+			config {
+				pins = "gpio13";
+				drive-strength = <8>;
+				input-enable;
+			};
+		};
+
+		cdc_dmic45_data_sleep_ar: dmic45_data_sleep_ar {
+			mux {
+				pins = "gpio13";
+				function = "func1";
+			};
+
+			config {
+				pins = "gpio13";
+				drive-strength = <2>;
+				pull-down;
+				input-enable;
+			};
+		};
+	};
+};
diff --git a/qcom/kona-mtp.dtsi b/qcom/kona-mtp.dtsi
index 6c64598e..476ccf0e 100644
--- a/qcom/kona-mtp.dtsi
+++ b/qcom/kona-mtp.dtsi
@@ -5,6 +5,7 @@
 #include "kona-sde-display.dtsi"
 #include "camera/kona-camera-sensor-mtp.dtsi"
 #include "kona-audio-overlay.dtsi"
+#include "kona-audio-overlay-ar.dtsi"
 #include "kona-thermal-overlay.dtsi"
 
 &qupv3_se12_2uart {
diff --git a/qcom/kona-va-bolero-ar.dtsi b/qcom/kona-va-bolero-ar.dtsi
new file mode 100644
index 00000000..b4622311
--- /dev/null
+++ b/qcom/kona-va-bolero-ar.dtsi
@@ -0,0 +1,15 @@
+&bolero_ar {
+	va_macro_ar: va-macro-ar@3370000 {
+		compatible = "qcom,va-macro";
+		reg = <0x3370000 0x0>;
+		clock-names = "lpass_audio_hw_vote";
+		clocks = <&lpass_audio_hw_vote_ar 0>;
+		va-vdd-micb-supply = <&S4A>;
+		qcom,va-vdd-micb-voltage = <1800000 1800000>;
+		qcom,va-vdd-micb-current = <11200>;
+		qcom,va-dmic-sample-rate = <600000>;
+		qcom,va-clk-mux-select = <1>;
+		qcom,va-island-mode-muxsel = <0x033A0000>;
+		qcom,default-clk-id = <TX_CORE_CLK>;
+	};
+};
diff --git a/qcom/kona-xrfusion-ult.dtsi b/qcom/kona-xrfusion-ult.dtsi
index 95437f54..d9c69782 100644
--- a/qcom/kona-xrfusion-ult.dtsi
+++ b/qcom/kona-xrfusion-ult.dtsi
@@ -2,6 +2,7 @@
 #include "kona-pmic-overlay.dtsi"
 #include "kona-sde-display.dtsi"
 #include "kona-audio-overlay.dtsi"
+#include "kona-audio-overlay-ar.dtsi"
 #include "kona-thermal-overlay.dtsi"
 #include "kona-xr-pinctrl-overlay.dtsi"
 #include "camera/kona-camera-sensor-xrfusion.dtsi"
@@ -340,6 +341,92 @@
 				<&bolero>;
 };
 
+&kona_snd_ar {
+	qcom,model = "kona-xrfusionult-snd-card";
+	qcom,mi2s-audio-intf = <0>;
+	qcom,audio-routing =
+		"AMIC1", "MIC BIAS1",
+		"MIC BIAS1", "Analog Mic1",
+		"AMIC2", "MIC BIAS2",
+		"MIC BIAS2", "Analog Mic2",
+		"AMIC3", "MIC BIAS3",
+		"MIC BIAS3", "Analog Mic3",
+		"AMIC4", "MIC BIAS4",
+		"MIC BIAS4", "Analog Mic4",
+		"AMIC5", "MIC BIAS4",
+		"MIC BIAS4", "Analog Mic5",
+		"DMIC1", "MIC BIAS1",
+		"MIC BIAS1", "Digital Mic0",
+		"DMIC2", "MIC BIAS1",
+		"MIC BIAS1", "Digital Mic1",
+		"DMIC3", "MIC BIAS1",
+		"MIC BIAS1", "Digital Mic2",
+		"DMIC4", "MIC BIAS1",
+		"MIC BIAS1", "Digital Mic3",
+		"DMIC5", "MIC BIAS3",
+		"MIC BIAS3", "Digital Mic4",
+		"DMIC6", "MIC BIAS3",
+		"MIC BIAS3", "Digital Mic5",
+		"DMIC7", "MIC BIAS4",
+		"MIC BIAS4", "Digital Mic6",
+		"DMIC8", "MIC BIAS4",
+		"MIC BIAS4", "Digital Mic7",
+		"IN1_HPHL", "HPHL_OUT",
+		"IN2_HPHR", "HPHR_OUT",
+		"IN3_AUX", "AUX_OUT",
+		"TX SWR_ADC0", "ADC1_OUTPUT",
+		"TX SWR_ADC1", "ADC2_OUTPUT",
+		"TX SWR_ADC2", "ADC3_OUTPUT",
+		"TX SWR_ADC3", "ADC4_OUTPUT",
+		"TX SWR_DMIC0", "DMIC1_OUTPUT",
+		"TX SWR_DMIC1", "DMIC2_OUTPUT",
+		"TX SWR_DMIC2", "DMIC3_OUTPUT",
+		"TX SWR_DMIC3", "DMIC4_OUTPUT",
+		"TX SWR_DMIC4", "DMIC5_OUTPUT",
+		"TX SWR_DMIC5", "DMIC6_OUTPUT",
+		"TX SWR_DMIC6", "DMIC7_OUTPUT",
+		"TX SWR_DMIC7", "DMIC8_OUTPUT",
+		"WSA SRC0_INP", "SRC0",
+		"WSA_TX DEC0_INP", "TX DEC0 MUX",
+		"WSA_TX DEC1_INP", "TX DEC1 MUX",
+		"RX_TX DEC0_INP", "TX DEC0 MUX",
+		"RX_TX DEC1_INP", "TX DEC1 MUX",
+		"RX_TX DEC2_INP", "TX DEC2 MUX",
+		"RX_TX DEC3_INP", "TX DEC3 MUX",
+		"SpkrRight IN", "WSA_SPK2 OUT",
+		"VA_AIF1 CAP", "VA_SWR_CLK",
+		"VA_AIF2 CAP", "VA_SWR_CLK",
+		"VA_AIF3 CAP", "VA_SWR_CLK",
+		"VA MIC BIAS3", "Digital Mic0",
+		"VA MIC BIAS3", "Digital Mic1",
+		"VA MIC BIAS1", "Digital Mic2",
+		"VA MIC BIAS1", "Digital Mic3",
+		"VA MIC BIAS4", "Digital Mic5",
+		"VA DMIC0", "VA MIC BIAS3",
+		"VA DMIC1", "VA MIC BIAS3",
+		"VA DMIC2", "VA MIC BIAS1",
+		"VA DMIC3", "VA MIC BIAS1",
+		"VA DMIC5", "VA MIC BIAS4",
+		"VA SWR_ADC1", "VA_SWR_CLK",
+		"VA SWR_MIC0", "VA_SWR_CLK",
+		"VA SWR_MIC1", "VA_SWR_CLK",
+		"VA SWR_MIC2", "VA_SWR_CLK",
+		"VA SWR_MIC3", "VA_SWR_CLK",
+		"VA SWR_MIC4", "VA_SWR_CLK",
+		"VA SWR_MIC5", "VA_SWR_CLK",
+		"VA SWR_MIC6", "VA_SWR_CLK",
+		"VA SWR_MIC7", "VA_SWR_CLK",
+		"VA SWR_MIC0", "DMIC1_OUTPUT",
+		"VA SWR_MIC1", "DMIC2_OUTPUT",
+		"VA SWR_MIC2", "DMIC3_OUTPUT",
+		"VA SWR_MIC3", "DMIC4_OUTPUT",
+		"VA SWR_MIC4", "DMIC5_OUTPUT",
+		"VA SWR_MIC5", "DMIC6_OUTPUT",
+		"VA SWR_MIC6", "DMIC7_OUTPUT",
+		"VA SWR_MIC7", "DMIC8_OUTPUT",
+		"VA SWR_ADC1", "ADC2_OUTPUT";
+};
+
 &pm8150_l10 {
 	regulator-max-microvolt = <3304000>;
 	qcom,init-voltage = <3304000>;
diff --git a/qcom/kona-xrfusion.dtsi b/qcom/kona-xrfusion.dtsi
index 2992e347..5d27eb9c 100644
--- a/qcom/kona-xrfusion.dtsi
+++ b/qcom/kona-xrfusion.dtsi
@@ -2,6 +2,7 @@
 #include "kona-pmic-overlay.dtsi"
 #include "kona-sde-display.dtsi"
 #include "kona-audio-overlay.dtsi"
+#include "kona-audio-overlay-ar.dtsi"
 #include "kona-thermal-overlay.dtsi"
 #include "kona-xr-pinctrl-overlay.dtsi"
 #include "camera/kona-camera-sensor-xrfusion.dtsi"
@@ -298,6 +299,78 @@
 				<&bolero>;
 };
 
+&kona_snd_ar {
+	qcom,model = "kona-xrfusion-snd-card";
+	qcom,mi2s-audio-intf = <0>;
+	qcom,audio-routing =
+		"AMIC2", "MIC BIAS2",
+		"MIC BIAS2", "Analog Mic2",
+		"TX DMIC0", "MIC BIAS1",
+		"MIC BIAS1", "Digital Mic0",
+		"TX DMIC1", "MIC BIAS1",
+		"MIC BIAS1", "Digital Mic1",
+		"TX DMIC2", "MIC BIAS4",
+		"MIC BIAS4", "Digital Mic2",
+		"TX DMIC3", "MIC BIAS4",
+		"MIC BIAS4", "Digital Mic3",
+		"TX DMIC5", "MIC BIAS3",
+		"MIC BIAS3", "Digital Mic5",
+		"IN1_HPHL", "HPHL_OUT",
+		"IN2_HPHR", "HPHR_OUT",
+		"IN3_AUX", "AUX_OUT",
+		"TX SWR_ADC0", "ADC1_OUTPUT",
+		"TX SWR_ADC1", "ADC2_OUTPUT",
+		"TX SWR_ADC2", "ADC3_OUTPUT",
+		"TX SWR_ADC3", "ADC4_OUTPUT",
+		"TX SWR_DMIC0", "DMIC1_OUTPUT",
+		"TX SWR_DMIC1", "DMIC2_OUTPUT",
+		"TX SWR_DMIC2", "DMIC3_OUTPUT",
+		"TX SWR_DMIC3", "DMIC4_OUTPUT",
+		"TX SWR_DMIC4", "DMIC5_OUTPUT",
+		"TX SWR_DMIC5", "DMIC6_OUTPUT",
+		"TX SWR_DMIC6", "DMIC7_OUTPUT",
+		"TX SWR_DMIC7", "DMIC8_OUTPUT",
+		"WSA SRC0_INP", "SRC0",
+		"WSA_TX DEC0_INP", "TX DEC0 MUX",
+		"WSA_TX DEC1_INP", "TX DEC1 MUX",
+		"RX_TX DEC0_INP", "TX DEC0 MUX",
+		"RX_TX DEC1_INP", "TX DEC1 MUX",
+		"RX_TX DEC2_INP", "TX DEC2 MUX",
+		"RX_TX DEC3_INP", "TX DEC3 MUX",
+		"SpkrRight IN", "WSA_SPK2 OUT",
+		"VA_AIF1 CAP", "VA_SWR_CLK",
+		"VA_AIF2 CAP", "VA_SWR_CLK",
+		"VA_AIF3 CAP", "VA_SWR_CLK",
+		"VA MIC BIAS3", "Digital Mic0",
+		"VA MIC BIAS3", "Digital Mic1",
+		"VA MIC BIAS1", "Digital Mic2",
+		"VA MIC BIAS1", "Digital Mic3",
+		"VA MIC BIAS4", "Digital Mic5",
+		"VA DMIC0", "VA MIC BIAS3",
+		"VA DMIC1", "VA MIC BIAS3",
+		"VA DMIC2", "VA MIC BIAS1",
+		"VA DMIC3", "VA MIC BIAS1",
+		"VA DMIC5", "VA MIC BIAS4",
+		"VA SWR_ADC1", "VA_SWR_CLK",
+		"VA SWR_MIC0", "VA_SWR_CLK",
+		"VA SWR_MIC1", "VA_SWR_CLK",
+		"VA SWR_MIC2", "VA_SWR_CLK",
+		"VA SWR_MIC3", "VA_SWR_CLK",
+		"VA SWR_MIC4", "VA_SWR_CLK",
+		"VA SWR_MIC5", "VA_SWR_CLK",
+		"VA SWR_MIC6", "VA_SWR_CLK",
+		"VA SWR_MIC7", "VA_SWR_CLK",
+		"VA SWR_MIC0", "DMIC1_OUTPUT",
+		"VA SWR_MIC1", "DMIC2_OUTPUT",
+		"VA SWR_MIC2", "DMIC3_OUTPUT",
+		"VA SWR_MIC3", "DMIC4_OUTPUT",
+		"VA SWR_MIC4", "DMIC5_OUTPUT",
+		"VA SWR_MIC5", "DMIC6_OUTPUT",
+		"VA SWR_MIC6", "DMIC7_OUTPUT",
+		"VA SWR_MIC7", "DMIC8_OUTPUT",
+		"VA SWR_ADC1", "ADC2_OUTPUT";
+};
+
 &pm8150_l10 {
 	regulator-max-microvolt = <3304000>;
 	qcom,init-voltage = <3304000>;
diff --git a/qcom/kona.dtsi b/qcom/kona.dtsi
index 65c1dd61..86300eda 100644
--- a/qcom/kona.dtsi
+++ b/qcom/kona.dtsi
@@ -55,6 +55,9 @@
 		swr0 = &swr0;
 		swr1 = &swr1;
 		swr2 = &swr2;
+		swr_ar0 = &swr_ar0;
+		swr_ar1 = &swr_ar1;
+		swr_ar2 = &swr_ar2;
 		mhi-netdev0 = &mhi_netdev_0;
 	};
 
@@ -5050,6 +5053,7 @@
 #include "camera/kona-camera.dtsi"
 #include "kona-qupv3.dtsi"
 #include "kona-audio.dtsi"
+#include "kona-audio-ar.dtsi"
 #include "kona-thermal.dtsi"
 #include "kona-vidc.dtsi"
 #include "kona-cvp.dtsi"