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| author | Amandeep Virk <avirk@qti.qualcomm.com> | 2019-05-29 12:38:16 -0700 |
|---|---|---|
| committer | Gerrit - the friendly Code Review server <code-review@localhost> | 2019-06-05 01:06:58 -0700 |
| commit | a90c4d4fd32efd192eb3fd756f53871ff76d0b46 (patch) | |
| tree | 2d3f4889f5e05a2ea46bd5a403418eb5a13136e3 /bindings/arm | |
| parent | 099aa2a00a30b316678391f38d5a26d4947e69f4 (diff) | |
| download | devicetree-a90c4d4fd32efd192eb3fd756f53871ff76d0b46.tar.gz | |
ARM: dts: qcom: Add spcom scsr in kona device tree
Add spcom scsr register address and bitmask in kona device tree
that is written to by spcom kernel to indicate to Secure
Processor that it is being restarted as part of subsystem
restart. This is needed to support an FR for supporting
loading of Secure Processor in UEFI stage.
Change-Id: I5ff1469a7be519855e34b9d5168a641669edc0d8
Diffstat (limited to 'bindings/arm')
| -rw-r--r-- | bindings/arm/msm/spcom.txt | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/bindings/arm/msm/spcom.txt b/bindings/arm/msm/spcom.txt index 36a07ec6..dca2a47d 100644 --- a/bindings/arm/msm/spcom.txt +++ b/bindings/arm/msm/spcom.txt @@ -3,9 +3,24 @@ Qualcomm Technologies, Inc. Secure Proccessor Communication (spcom) Required properties: -compatible : should be "qcom,spcom" -qcom,spcom-ch-names: predefined channels name string +-qcom,spcom-sp2soc-rmb-reg-addr: Secure Processor to SOC shared + register physical address +-qcom,spcom-sp2soc-rmb-initdone-bit: bit indicating Secure + Processor init-done +-qcom,spcom-sp2soc-rmb-pbldone-bit: bit indicating Secure + Processor bootloader-done +-qcom,spcom-soc2sp-rmb-reg-addr: SOC to Secure Processor shared + register physical address +-qcom,spcom-soc2sp-rmb-sp-ssr-bit: bit indicating Secure + Processor subsystem reset Example: qcom,spcom { compatible = "qcom,spcom"; qcom,spcom-ch-names = "sp_kernel" , "sp_ssr"; + qcom,spcom-sp2soc-rmb-reg-addr = <0x01881020>; + qcom,spcom-sp2soc-rmb-initdone-bit = <24>; + qcom,spcom-sp2soc-rmb-pbldone-bit = <25>; + qcom,spcom-soc2sp-rmb-reg-addr = <0x01881030>; + qcom,spcom-soc2sp-rmb-sp-ssr-bit = <0>; }; |