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authorSwetha Chikkaboraiah <c_schikk@qti.qualcomm.com>2020-03-09 13:27:03 +0530
committerChetan C R <cchinnad@qti.qualcomm.com>2020-05-12 16:18:29 +0530
commitb159d5da02b71e45797febcf083e36f1d3a11cee (patch)
tree1f91ab20005d93c8a6178ce0b95d8f6fcdbb64d7 /bindings/i2c
parentf2af7a74ca2a058746daf5cb655a9b33476a75bd (diff)
downloaddevicetree-b159d5da02b71e45797febcf083e36f1d3a11cee.tar.gz
dt-bindings: Add documentation for SDM660
Add documentation for SDM660 related nodes Change-Id: I93a2ac59ec0325857aa5d210867b7f7c7271020d
Diffstat (limited to 'bindings/i2c')
-rw-r--r--bindings/i2c/i2c-msm-v2.txt59
1 files changed, 59 insertions, 0 deletions
diff --git a/bindings/i2c/i2c-msm-v2.txt b/bindings/i2c/i2c-msm-v2.txt
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+Qualcomm Technologies, Inc. I2C controller
+
+Required properties:
+ - reg : Offset and length of the register region for the device named in
+ reg-names and has the same index.
+ - reg-names : Register region name(s) referenced in reg above
+ "qup_phys_addr" : Physical address of QUP register space.
+ - compatible : should be "qcom,i2c-msm-v2"
+ - interrupts : Interrupt number which correspond to the entry with the same
+ index in interrupt-names.
+ - interrupt-names: QUP core interrupt name(s) referenced in interrupts above
+ "qup_irq" : QUP interrupt used by the controller.
+ - dmas : DMA engine API's parameters for blsp.
+ <[phandle of the dma controller] [pipe index] [number of descriptors]
+ [sps_connect flags] [sps_register_event flags]>;
+ - dma-names : dma channel names.
+ - qcom,clk-freq-out : Desired I2C bus clock frequency in Hz
+ - qcom,clk-freq-in : Supplied core clock frequency in Hz.
+ - qcom,i2c-dat : specifies GPIO which corresponds to the I2C data line.
+ - qcom,i2c-clk : specifies GPIO which corresponds to the I2C clock line.
+
+Required alias:
+ - The desired bus-number is specified by an alias with the following format:
+ 'i2c{n}' where n is the bus number.
+
+Optional property:
+ - qcom,noise-rjct-scl : number of low samples on clock line to consider it low.
+ When missing default to 0.
+ - qcom,noise-rjct-sda : number of low samples on data line to consider it low.
+ When missing default to 0.
+ - qcom,disable-dma : disables DMA transfer mode.
+ - qcom,master-id : Master-port value used on voting for the clock path.
+ - qcom,high-time-clk-div : high time divider value to configure clk-ctl
+ register. When missing, default to the value given in driver.
+ - qcom,fs-clk-div: fs divider value to configure clk-ctl register. When
+ missing, default to the value given in driver.
+
+Example:
+ aliases {
+ i2c10 = &i2c_10;
+ };
+
+ i2c_10: i2c@f9966000 {
+ compatible = "qcom,i2c-msm-v2";
+ reg-names = "qup_phys_addr", "dma_phys_addr";
+ reg = <0xf9966000 0x1000>;
+ interrupt-names = "qup_irq";
+ interrupts = <0 104 0>;
+ dmas = <&dma_blsp1 14 32 0x20000020 0x20>,
+ <&dma_blsp1 15 64 0x20000020 0x20>;
+ dma-names = "tx", "rx";
+ qcom,clk-freq-out = <100000>;
+ qcom,clk-freq-in = <24000000>;
+ qcom,noise-rjct-scl = <0>;
+ qcom,noise-rjct-sda = <0>;
+ qcom,i2c-dat = <&tlmm 67 0x00>;
+ qcom,i2c-clk = <&tlmm 68 0x00>;
+
+ };