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authorVenkata Narendra Kumar Gutta <vgutta@quicinc.com>2019-04-24 12:36:05 -0700
committerVenkata Narendra Kumar Gutta <vgutta@quicinc.com>2019-05-02 16:41:24 -0700
commited241f132720397b8abac31ca170a274ea6e54e5 (patch)
tree892aeadc1cc2fc0a47d982a533f8112d96866d37 /bindings/media/video
parent1f62b25b429becfcc7d8608f389705b3e6ef0e20 (diff)
downloaddevicetree-ed241f132720397b8abac31ca170a274ea6e54e5.tar.gz
dt-bindings: Add devicetree bindings to devicetree project
Add devicetree bindings snapshot to the devicetree project. This snapshot is taken as of 'commit f3dd4aaeb34438c877ccd42f5a48ccd554dd765a (Merge "platform: qpnp-revid: Add REVID support for PM7250B")' of the kernel project. Change-Id: I5e0ec0eae63ff9c071b2924bd84c5b20d3f6554d
Diffstat (limited to 'bindings/media/video')
-rw-r--r--bindings/media/video/msm-cam-cci.txt817
-rw-r--r--bindings/media/video/msm-cam-cdm.txt155
-rw-r--r--bindings/media/video/msm-cam-cpas.txt331
-rw-r--r--bindings/media/video/msm-cam-csiphy.txt117
-rw-r--r--bindings/media/video/msm-cam-eeprom.txt503
-rw-r--r--bindings/media/video/msm-cam-fd.txt154
-rw-r--r--bindings/media/video/msm-cam-icp.txt287
-rw-r--r--bindings/media/video/msm-cam-ife-csid.txt121
-rw-r--r--bindings/media/video/msm-cam-isp.txt36
-rw-r--r--bindings/media/video/msm-cam-jpeg.txt186
-rw-r--r--bindings/media/video/msm-cam-lrme.txt148
-rw-r--r--bindings/media/video/msm-cam-smmu.txt142
-rw-r--r--bindings/media/video/msm-cam-vfe.txt146
-rw-r--r--bindings/media/video/msm-camera-flash.txt132
-rw-r--r--bindings/media/video/msm-camera.txt13
-rw-r--r--bindings/media/video/msm-cvp.txt152
-rw-r--r--bindings/media/video/msm-sde-rotator.txt233
-rw-r--r--bindings/media/video/msm-vidc-bus.txt49
-rw-r--r--bindings/media/video/msm-vidc.txt188
19 files changed, 3910 insertions, 0 deletions
diff --git a/bindings/media/video/msm-cam-cci.txt b/bindings/media/video/msm-cam-cci.txt
new file mode 100644
index 00000000..59651a35
--- /dev/null
+++ b/bindings/media/video/msm-cam-cci.txt
@@ -0,0 +1,817 @@
+* Qualcomm Technologies, Inc. MSM CCI
+
+CCI (Camera Control Interface) is module that is use for camera sensor module
+I2C communication.
+
+=======================
+Required Node Structure
+=======================
+The camera CCI node must be described in two levels of device nodes. The
+first level describe the overall CCI node structure. Second level nodes
+describe camera sensor submodule nodes which is using CCI for
+i2c communication.
+
+======================================
+First Level Node - CCI device
+======================================
+
+- compatible
+ Usage: required
+ Value type: <string>
+ Definition: Should be "qcom,cci".
+
+- cell-index: cci hardware core index
+ Usage: required
+ Value type: <u32>
+ Definition: Should specify the Hardware index id.
+
+- reg
+ Usage: required
+ Value type: <u32>
+ Definition: offset and length of the register set
+ for the device for the cci operating in
+ compatible mode.
+
+- reg-names
+ Usage: required
+ Value type: <string>
+ Definition: Should specify relevant names to each
+ reg property defined.
+
+- interrupts
+ Usage: required
+ Value type: <u32>
+ Definition: Interrupt associated with CCI HW.
+
+- interrupt-names
+ Usage: required
+ Value type: <string>
+ Definition: Name of the interrupt.
+
+- gpios
+ Usage: required
+ Value type: <phandle>
+ Definition: should specify the gpios to be used for the CCI.
+
+- gpio-req-tbl-num
+ Usage: required
+ Value type: <u32>
+ Definition: should specify the gpio table index.
+
+- gpio-req-tbl-flags
+ Usage: required
+ Value type: <u32>
+ Definition: should specify the gpio functions.
+
+- gpio-req-tbl-label
+ Usage: required
+ Value type: <string>
+ Definition: should specify the gpio labels in
+ gpio-req-tbl-num property (in the same order)
+
+- clock-names
+ Usage: required
+ Value type: <string>
+ Definition: List of clock names required for CCI HW.
+
+- clock-rates
+ Usage: required
+ Value type: <u32>
+ Definition: List of clock rates in Hz for CCI HW.
+
+- clock-cntl-level
+ Usage: required
+ Value type: <string>
+ Definition: All different clock level node can support.
+
+- clocks
+ Usage: required
+ Value type: <phandle>
+ Definition: all clock phandle and source clocks.
+
+- src-clock-name
+ Usage: required
+ Value type: <string>
+ Definition: name for the source clock.
+
+- regulator-names
+ Usage: required
+ Value type: <string>
+ Definition: name of the voltage regulators required for the device.
+
+- gdscr-supply
+ Usage: required
+ Value type: <phandle>
+ Definition: should contain gdsr regulator used for cci clocks.
+
+- mmagic-supply
+ Usage: optional
+ Value type: <phandle>
+ Definition: should contain mmagic regulator used for mmagic clocks.
+
+=========================
+CCI clock settings
+=========================
+- I2c speed settings (*)
+ Usage: required
+ Definition: List of i2c rates for CCI HW.
+ - i2c_freq_100Khz
+ Definition: qcom,i2c_standard_mode - node should contain clock settings for
+ 100Khz
+ - i2c_freq_400Khz
+ Definition: qcom,i2c_fast_mode - node should contain clock settings for
+ 400Khz
+ - i2c_freq_custom
+ Definition: qcom,i2c_custom_mode - node can contain clock settings for
+ frequencies other than 100Khz and 400Khz which is specific to usecase.
+ Currently it has settings for 375Khz.
+ - i2c_freq_1Mhz
+ Definition: qcom,i2c_fast_plus_mode - node should contain clock
+ settings for 1Mhz
+* if speed settings is not defined the low level driver can use "i2c_freq_custom"
+like default
+
+ - hw-thigh
+ Definition: should contain high period of the SCL clock in terms of CCI clock cycle
+ - hw-tlow
+ Definition: should contain high period of the SCL clock in terms of CCI clock cycle
+ - hw-tsu-sto
+ Definition: should contain setup time for STOP condition
+ - hw-tsu-sta
+ Definition: should contain setup time for Repeated START condition
+ - hw-thd-dat
+ Definition: should contain hold time for the data
+ - hw-thd-sta
+ Definition: should contain hold time for START condition
+ - hw-tbuf
+ Definition: should contain free time between a STOP and a START condition
+ - hw-scl-stretch-en
+ Definition: should contain enable or disable clock stretching
+ - hw-trdhld
+ Definition: should contain internal hold time for SDA
+ - hw-tsp
+ Definition: should contain filtering of glitches
+
+Example:
+
+ qcom,cci@0xfda0c000 {
+ cell-index = <0>;
+ compatible = "qcom,cci";
+ reg = <0xfda0c000 0x300>;
+ reg-names = "cci";
+ interrupts = <0 50 0>;
+ interrupt-names = "cci";
+ clock-names = "camnoc_axi_clk", "soc_ahb_clk",
+ "slow_ahb_src_clk", "cpas_ahb_clk",
+ "cci_clk", "cci_clk_src";
+ clock-rates = <0 0 80000000 0 0 37500000>;
+ clock-cntl-level = "turbo";
+ gpios = <&tlmm 17 0>,
+ <&tlmm 18 0>,
+ <&tlmm 19 0>,
+ <&tlmm 20 0>;
+ gpio-tbl-num = <0 1 2 3>;
+ gpio-tbl-flags = <1 1 1 1>;
+ gpio-tbl-label = "CCI_I2C_DATA0",
+ "CCI_I2C_CLK0",
+ "CCI_I2C_DATA1",
+ "CCI_I2C_CLK1";
+ i2c_freq_100Khz: qcom,i2c_standard_mode {
+ hw-thigh = <78>;
+ hw-tlow = <114>;
+ hw-tsu-sto = <28>;
+ hw-tsu-sta = <28>;
+ hw-thd-dat = <10>;
+ hw-thd-sta = <77>;
+ hw-tbuf = <118>;
+ hw-scl-stretch-en = <0>;
+ hw-trdhld = <6>;
+ hw-tsp = <1>;
+ status = "ok";
+ };
+ i2c_freq_400Khz: qcom,i2c_fast_mode {
+ hw-thigh = <20>;
+ hw-tlow = <28>;
+ hw-tsu-sto = <21>;
+ hw-tsu-sta = <21>;
+ hw-thd-dat = <13>;
+ hw-thd-sta = <18>;
+ hw-tbuf = <25>;
+ hw-scl-stretch-en = <0>;
+ hw-trdhld = <6>;
+ hw-tsp = <3>;
+ status = "ok";
+ };
+ i2c_freq_custom: qcom,i2c_custom_mode {
+ hw-thigh = <15>;
+ hw-tlow = <28>;
+ hw-tsu-sto = <21>;
+ hw-tsu-sta = <21>;
+ hw-thd-dat = <13>;
+ hw-thd-sta = <18>;
+ hw-tbuf = <25>;
+ hw-scl-stretch-en = <1>;
+ hw-trdhld = <6>;
+ hw-tsp = <3>;
+ status = "ok";
+ };
+ i2c_freq_1Mhz: qcom,i2c_fast_plus_mode {
+ hw-thigh = <16>;
+ hw-tlow = <22>;
+ hw-tsu-sto = <17>;
+ hw-tsu-sta = <18>;
+ hw-thd-dat = <16>;
+ hw-thd-sta = <15>;
+ hw-tbuf = <19>;
+ hw-scl-stretch-en = <1>;
+ hw-trdhld = <3>;
+ hw-tsp = <3>;
+ cci-clk-src = <37500000>;
+ status = "ok";
+ };
+ };
+
+=======================================
+Second Level Node - CAM SENSOR MODULES
+=======================================
+
+=======================================
+CAM SENSOR RESOURCE MANAGER
+=======================================
+Camera Sensor Resource manager node contains properties of shared camera
+sensor resource.
+
+- compatible
+ Usage: required
+ Value type: <string>
+ Definition: Should be "qcom,cam-res-mgr".
+
+- shared-gpios
+ Usage: optional
+ Value type: <u32>
+ Definition: should contain the gpios which are used by two or more
+ cameras, and these cameras may be opened together.
+
+- pinctrl-names
+ Usage: optional
+ Value type: <string>
+ Definition: List of names to assign the shared pin state defined in pinctrl device node
+
+- pinctrl-<0..n>
+ Usage: optional
+ Value type: <phandle>
+ Definition: Lists phandles each pointing to the pin configuration node within a pin
+ controller. These pin configurations are installed in the pinctrl device node.
+
+
+=============================
+CAMERA IMAGE SENSOR MODULE
+=============================
+Image sensor node contains properties of camera image sensor
+
+- compatible
+ Usage: required
+ Value type: <string>
+ Definition: Should be "qcom,cam-sensor".
+
+- cell-index: cci hardware core index
+ Usage: required
+ Value type: <u32>
+ Definition: Should specify the Hardware index id.
+
+- reg
+ Usage: required
+ Value type: <u32>
+ Definition: offset and length of the register set
+ for the device for the cci operating in
+ compatible mode.
+
+- cci-device
+ Usage: required
+ Value type: <u32>
+ Definition: should contain i2c device id to be used for this camera
+ sensor
+
+- cci-master
+ Usage: required
+ Value type: <u32>
+ Definition: should contain i2c master id to be used for this camera
+ sensor
+ - 0 -> MASTER 0
+ - 1 -> MASTER 1
+
+- csiphy-sd-index
+ Usage: required
+ Value type: <u32>
+ Definition: should contain csiphy instance that will used to
+ receive sensor data (0, 1, 2, 3).
+
+- cam_vdig-supply
+ Usage: required
+ Value type: <phandle>
+ Definition: should contain regulator from which digital voltage is
+ supplied
+
+- cam_vana-supply
+ Usage: required
+ Value type: <phandle>
+ Definition: should contain regulator from which analog voltage is
+ supplied
+
+- cam_vio-supply
+ Usage: required
+ Value type: <phandle>
+ Definition: should contain regulator from which IO voltage is supplied
+
+- cam_bob-supply
+ Usage: optional
+ Value type: <phandle>
+ Definition: should contain regulator from which BoB voltage is supplied
+
+- regulator-names
+ Usage: required
+ Value type: <string>
+ Definition: should contain names of all regulators needed by this
+ sensor
+
+- rgltr-cntrl-support
+ Usage: required
+ Value type: <boolean>
+ Definition: This property is required if the sw control regulator parameters
+ e.g. rgltr-min-voltage
+
+- rgltr-min-voltage
+ Usage: required
+ Value type: <u32>
+ Definition: should contain minimum voltage level for regulators mentioned
+ in regulator-names property (in the same order)
+
+- rgltr-max-voltage
+ Usage: required
+ Value type: <u32>
+ Definition: should contain maximum voltage level for regulators mentioned
+ in regulator-names property (in the same order)
+
+- rgltr-load-current
+ Usage: required
+ Value type: <u32>
+ Definition: should contain optimum voltage level for regulators mentioned
+ in regulator-names property (in the same order)
+
+- sensor-position-roll
+ Usage: required
+ Value type: <u32>
+ Definition: should contain sensor rotational angle with respect to axis of
+ reference. i.e. 0, 90, 180, 360
+
+- sensor-position-pitch
+ Usage: required
+ Value type: <u32>
+ Definition: should contain sensor rotational angle with respect to axis of
+ reference. i.e. 0, 90, 180, 360
+
+- sensor-position-yaw
+ Usage: required
+ Value type: <u32>
+ Definition: should contain sensor rotational angle with respect to axis of
+ reference. i.e. 0, 90, 180, 360
+
+- qcom,secure
+ Usage: optional
+ Value type: <u32>
+ Definition: should be enabled to operate the camera in secure mode
+
+- gpio-no-mux
+ Usage: optional
+ Value type: <u32>
+ Definition: should contain field to indicate whether gpio mux table is
+ available. i.e. 1 if gpio mux is not available, 0 otherwise
+
+- cam_vaf-supply
+ Usage: optional
+ Value type: <u32>
+ Definition: should contain regulator from which AF voltage is supplied
+
+- pwm-switch
+ Usage: optional
+ Value type: <boolean>
+ Definition: This property is required for regulator to switch into PWM mode.
+
+- gpios
+ Usage: required
+ Value type: <phandle>
+ Definition: should contain phandle to gpio controller node and array of
+ #gpio-cells specifying specific gpio (controller specific)
+
+- gpio-reset
+ Usage: required
+ Value type: <u32>
+ Definition: should contain index to gpio used by sensors reset_n
+
+- gpio-standby
+ Usage: optional
+ Value type: <u32>
+ Definition: should contain index to gpio used by sensors standby_n
+
+- gpio-vio
+ Usage: optional
+ Value type: <u32>
+ Definition: should contain index to gpio used by sensors io vreg enable
+
+- gpio-vana
+ Usage: optional
+ Value type: <u32>
+ Definition: should contain index to gpio used by sensors analog vreg enable
+
+- gpio-vdig
+ Usage: optional
+ Value type: <u32>
+ Definition: should contain index to gpio used by sensors digital vreg enable
+
+- gpio-vaf
+ Usage: optional
+ Value type: <u32>
+ Definition: should contain index to gpio used by sensors af vreg enable
+
+- gpio-af-pwdm
+ Usage: optional
+ Value type: <u32>
+ Definition: should contain index to gpio used by sensors af pwdm_n
+
+- gpio-req-tbl-num
+ Usage: optional
+ Value type: <u32>
+ Definition: should contain index to gpios specific to this sensor
+
+- gpio-req-tbl-flags
+ Usage: optional
+ Value type: <u32>
+ Definition: should contain direction of gpios present in
+ gpio-req-tbl-num property (in the same order)
+
+- gpio-req-tbl-label
+ Usage: optional
+ Value type: <u32>
+ Definition: should contain name of gpios present in
+ gpio-req-tbl-num property (in the same order)
+
+- gpio-set-tbl-num
+ Usage: optional
+ Value type: <u32>
+ Definition: should contain index of gpios that need to be
+ configured by msm
+
+- gpio-set-tbl-flags
+ Usage: optional
+ Value type: <u32>
+ Definition: should contain value to be configured for the gpios
+ present in gpio-set-tbl-num property (in the same order)
+
+- gpio-set-tbl-delay
+ Usage: optional
+ Value type: <u32>
+ Definition: should contain amount of delay after configuring
+ gpios as specified in gpio_set_tbl_flags property (in the same order)
+
+- actuator-src
+ Usage: optional
+ Value type: <phandle>
+ Definition: if auto focus is supported by this sensor, this
+ property should contain phandle of respective actuator node
+
+- led-flash-src
+ Usage: optional
+ Value type: <phandle>
+ Definition: if LED flash is supported by this sensor, this
+ property should contain phandle of respective LED flash node
+
+- qcom,vdd-cx-supply
+ Usage: optional
+ Value type: <phandle>
+ Definition: should contain regulator from which cx voltage is supplied
+
+- qcom,vdd-cx-name
+ Usage: optional
+ Value type: <string>
+ Definition: should contain names of cx regulator
+
+- eeprom-src
+ Usage: optional
+ Value type: <phandle>
+ Definition: if eeprom memory is supported by this sensor, this
+ property should contain phandle of respective eeprom nodes
+
+- ois-src
+ Usage: optional
+ Value type: <phandle>
+ Definition: if optical image stabilization is supported by this sensor,
+ this property should contain phandle of respective ois node
+
+- ir-led-src
+ Usage: optional
+ Value type: <phandle>
+ Definition: if ir led is supported by this sensor, this property
+ should contain phandle of respective ir-led node
+
+- qcom,ir-cut-src
+ Usage: optional
+ Value type: <phandle>
+ Definition: if ir cut is supported by this sensor, this property
+ should contain phandle of respective ir-cut node
+
+- qcom,special-support-sensors
+ Usage: required
+ Value type: <string>
+ Definition: if only some special sensors are supported
+ on this board, add sensor name in this property.
+
+- use-shared-clk
+ Usage: optional
+ Value type: <boolean>
+ Definition: It is booloean property. This property is required
+ if the clk is shared clk between different sensor and ois, if this
+ device need to be opened together.
+
+- clock-rates
+ Usage: required
+ Value type: <u32>
+ Definition: clock rate in Hz.
+
+- clock-cntl-level
+ Usage: required
+ Value type: <string>
+ Definition: All different clock level node can support.
+
+- clock-cntl-support
+ Usage: optional
+ Value type: <boolean>
+ Definition: Says whether clock control support is present or not
+
+- clocks
+ Usage: required
+ Value type: <phandle>
+ Definition: all clock phandle and source clocks.
+
+- clock-control
+ Usage: optional
+ Value type: <string>
+ Definition: The valid fields are "NO_SET_RATE", "INIT_RATE" and
+ "SET_RATE". "NO_SET_RATE" the corresponding clock is enabled without setting
+ the rate assuming some other driver has already set it to appropriate rate.
+ "INIT_RATE" clock rate is not queried assuming some other driver has set
+ the clock rate and ispif will set the the clock to this rate.
+ "SET_RATE" clock is enabled and the rate is set to the value specified
+ in the property clock-rates.
+
+=============================
+ACTUATOR MODULE
+=============================
+
+- compatible
+ Usage: required
+ Value type: <string>
+ Definition: Should be "qcom,actuator".
+
+- cell-index: cci hardware core index
+ Usage: required
+ Value type: <u32>
+ Definition: Should specify the Hardware index id.
+
+- reg
+ Usage: required
+ Value type: <u32>
+ Definition: offset and length of the register set
+ for the device for the cci operating in
+ compatible mode.
+
+- cci-device
+ Usage: required
+ Value type: <u32>
+ Definition: should contain i2c device id to be used for this camera
+ sensor
+
+- cci-master
+ Usage: required
+ Value type: <u32>
+ Definition: should contain i2c master id to be used for this camera
+ sensor
+ - 0 -> MASTER 0
+ - 1 -> MASTER 1
+
+- cam_vaf-supply
+ Usage: required
+ Value type: <phandle>
+ Definition: should contain regulator from which AF voltage is supplied
+
+- regulator-names
+ Usage: required
+ Value type: <string>
+ Definition: should contain names of all regulators needed by this
+ actuator. i.e. "cam_vaf"
+
+- rgltr-cntrl-support
+ Usage: optional
+ Value type: <boolean>
+ Definition: It is booloean property. This property is required
+ if the code and regulator control parameters e.g. rgltr-min-voltage
+
+- rgltr-min-voltage
+ Usage: optional
+ Value type: <u32>
+ Definition: should contain minimum voltage level in mcrovolts
+ for regulators mentioned in regulator-names property (in the same order)
+
+- rgltr-max-voltage
+ Usage: optional
+ Value type: <u32>
+ Definition: should contain maximum voltage level in mcrovolts
+ for regulators mentioned in regulator-names property (in the same order)
+
+- rgltr-load-current
+ Usage: optional
+ Value type: <u32>
+ Definition: should contain the maximum current in microamps
+ required from the regulators mentioned in the regulator-names property
+ (in the same order).
+
+=============================
+OIS MODULE
+=============================
+
+- compatible
+ Usage: required
+ Value type: <string>
+ Definition: Should be "qcom,ois".
+
+- cell-index: cci hardware core index
+ Usage: required
+ Value type: <u32>
+ Definition: Should specify the Hardware index id.
+
+- reg
+ Usage: required
+ Value type: <u32>
+ Definition: offset and length of the register set
+ for the device for the cci operating in
+ compatible mode.
+
+- cci-device
+ Usage: required
+ Value type: <u32>
+ Definition: should contain i2c device id to be used for this camera
+ sensor
+
+- cci-master
+ Usage: required
+ Value type: <u32>
+ Definition: should contain i2c master id to be used for this camera
+ sensor
+ - 0 -> MASTER 0
+ - 1 -> MASTER 1
+
+- cam_vaf-supply
+ Usage: required
+ Value type: <phandle>
+ Definition: should contain regulator from which AF voltage is supplied
+
+- regulator-names
+ Usage: required
+ Value type: <string>
+ Definition: should contain names of all regulators needed by this
+ actuator. i.e. "cam_vaf"
+
+- rgltr-cntrl-support
+ Usage: optional
+ Value type: <boolean>
+ Definition: It is booloean property. This property is required
+ if the code and regulator control parameters e.g. rgltr-min-voltage
+
+- rgltr-min-voltage
+ Usage: optional
+ Value type: <u32>
+ Definition: should contain minimum voltage level in mcrovolts
+ for regulators mentioned in regulator-names property (in the same order)
+
+- rgltr-max-voltage
+ Usage: optional
+ Value type: <u32>
+ Definition: should contain maximum voltage level in mcrovolts
+ for regulators mentioned in regulator-names property (in the same order)
+
+- rgltr-load-current
+ Usage: optional
+ Value type: <u32>
+ Definition: should contain the maximum current in microamps
+ required from the regulators mentioned in the regulator-names property
+ (in the same order).
+
+- use-shared-clk
+ Usage: optional
+ Value type: <boolean>
+ Definition: This property is required if the clk is shared clk between different
+ sensor and ois, if this device need to be opened together.
+
+Example:
+&soc {
+ led_flash0: qcom,camera-flash@0 {
+ cell-index = <0>;
+ compatible = "qcom,camera-flash";
+ flash-source = <&pmi8994_flash0 &pmi8994_flash1>;
+ torch-source = <&pmi8998_torch0 &pmi8998_torch1>;
+ switch-source = <&pmi8998_switch>;
+ status = "ok";
+ };
+};
+
+&cam_cci0 {
+ actuator0: qcom,actuator@0 {
+ cell-index = <0>;
+ reg = <0x0>;
+ compatible = "qcom,actuator";
+ cci-device = <0>;
+ cci-master = <0>;
+ cam_vaf-supply = <&pmi8998_bob>;
+ regulator-names = "cam_vaf";
+ rgltr-cntrl-support;
+ rgltr-min-voltage = <2800000>;
+ rgltr-max-voltage = <2800000>;
+ rgltr-load-current = <100000>;
+ };
+
+ ois0: qcom,ois@0 {
+ cell-index = <0>;
+ reg = <0x0>;
+ compatible = "qcom,ois";
+ cci-device = <0>;
+ cci-master = <0>;
+ cam_vaf-supply = <&pmi8998_bob>;
+ regulator-names = "cam_vaf";
+ rgltr-cntrl-support;
+ rgltr-min-voltage = <2800000>;
+ rgltr-max-voltage = <2800000>;
+ rgltr-load-current = <100000>;
+ };
+
+ qcom,cam-res-mgr {
+ compatible = "qcom,cam-res-mgr";
+ status = "ok";
+ shared-gpios = <18 19>;
+ pinctrl-names = "cam_res_mgr_default", "cam_res_mgr_suspend";
+ pinctrl-0 = <&cam_shared_clk_active &cam_res_mgr_active>;
+ pinctrl-1 = <&cam_shared_clk_suspend &cam_res_mgr_suspend>;
+ };
+
+ qcom,cam-sensor@0 {
+ cell-index = <0>;
+ compatible = "qcom,camera";
+ reg = <0x0>;
+ csiphy-sd-index = <0>;
+ sensor-position-roll = <90>;
+ sensor-position-pitch = <0>;
+ sensor-position-yaw = <180>;
+ secure = <1>;
+ led-flash-src = <&led_flash0>;
+ actuator-src = <&actuator0>;
+ ois-src = <&ois0>;
+ eeprom-src = <&eeprom0>;
+ cam_vdig-supply = <&pm8009_l2>;
+ cam_vio-supply = <&pm8009l_l1>;
+ cam_vana-supply = <&pm8009l_l5>;
+ cam_bob-supply = <&pm8150l_bob>;
+ cam_clk-supply = <&tital_top_gdsc>;
+ regulator-names = "cam_vio", "cam_vana", "cam_vdig",
+ "cam_clk", "cam_bob";
+ rgltr-cntrl-support;
+ pwm-switch;
+ rgltr-min-voltage = <0 2800000 1200000 0 3008000>;
+ rgltr-max-voltage = <0 2800000 1200000 0 4000000>;
+ rgltr-load-current = <0 80000 1200000 0 2000000>;
+ gpio-no-mux = <0>;
+ pinctrl-names = "cam_default", "cam_suspend";
+ pinctrl-0 = <&cam_sensor_mclk0_active
+ &cam_sensor_rear_active>;
+ pinctrl-1 = <&cam_sensor_mclk0_suspend
+ &cam_sensor_rear_suspend>;
+ gpios = <&tlmm 13 0>,
+ <&tlmm 80 0>,
+ <&tlmm 79 0>;
+ gpio-reset = <1>;
+ gpio-standby = <2>;
+ gpio-req-tbl-num = <0 1 2>;
+ gpio-req-tbl-flags = <1 0 0>;
+ gpio-req-tbl-label = "CAMIF_MCLK0",
+ "CAM_RESET0",
+ "CAM_VANA";
+ sensor-position = <0>;
+ sensor-mode = <0>;
+ cci-device = <0>;
+ cci-master = <0>;
+ status = "ok";
+ use-shared-clk;
+ clocks = <&clock_mmss clk_mclk0_clk_src>,
+ <&clock_mmss clk_camss_mclk0_clk>;
+ clock-names = "cam_src_clk", "cam_clk";
+ clock-cntl-leveli = "turbo";
+ clock-rates = <24000000>;
+ };
+};
diff --git a/bindings/media/video/msm-cam-cdm.txt b/bindings/media/video/msm-cam-cdm.txt
new file mode 100644
index 00000000..b376cad4
--- /dev/null
+++ b/bindings/media/video/msm-cam-cdm.txt
@@ -0,0 +1,155 @@
+* Qualcomm Technologies, Inc. MSM Camera CDM
+
+CDM (Camera Data Mover) is module intended to provide means for fast programming
+camera registers and lookup tables.
+
+=======================
+Required Node Structure
+=======================
+CDM Interface node takes care of the handling has HW nodes and provide interface
+for camera clients.
+
+- compatible
+ Usage: required
+ Value type: <string>
+ Definition: Should be "qcom,cam-cdm-intf".
+
+- label
+ Usage: required
+ Value type: <string>
+ Definition: Should be "cam-cdm-intf".
+
+- num-hw-cdm
+ Usage: required
+ Value type: <u32>
+ Definition: Number of supported HW blocks.
+
+- cdm-client-names
+ Usage: required
+ Value type: <string>
+ Definition: List of Clients supported by CDM interface.
+
+Example:
+ qcom,cam-cdm-intf {
+ compatible = "qcom,cam-cdm-intf";
+ label = "cam-cdm-intf";
+ num-hw-cdm = <1>;
+ cdm-client-names = "vfe",
+ "jpeg-dma",
+ "jpeg",
+ "fd";
+ };
+
+=======================
+Required Node Structure
+=======================
+CDM HW node provides interface for camera clients through
+to CDM interface node.
+
+- cell-index
+ Usage: required
+ Value type: <u32>
+ Definition: Node instance number.
+
+- compatible
+ Usage: required
+ Value type: <string>
+ Definition: Should be "qcom,cam480-cpas-cdm0", "qcom,cam480-cpas-cdm1"
+ "qcom,cam170-cpas-cdm0" or "qcom,cam480-cpas-cdm2".
+
+- label
+ Usage: required
+ Value type: <string>
+ Definition: Should be "cpas-cdm".
+
+- reg-names
+ Usage: required
+ Value type: <string>
+ Definition: Name of the register resources.
+
+- reg
+ Usage: required
+ Value type: <u32>
+ Definition: Register values.
+
+- reg-cam-base
+ Usage: required
+ Value type: <u32>
+ Definition: Offset of the register space compared to
+ to Camera base register space.
+
+- interrupt-names
+ Usage: optional
+ Value type: <string>
+ Definition: Name of the interrupt.
+
+- interrupts
+ Usage: optional
+ Value type: <u32>
+ Definition: Interrupt associated with CDM HW.
+
+- regulator-names
+ Usage: required
+ Value type: <string>
+ Definition: Name of the regulator resources for CDM HW.
+
+- camss-supply
+ Usage: required
+ Value type: <phandle>
+ Definition: Regulator reference corresponding to the names listed
+ in "regulator-names".
+
+- clock-names
+ Usage: required
+ Value type: <string>
+ Definition: List of clock names required for CDM HW.
+
+- clocks
+ Usage: required
+ Value type: <phandle>
+ Definition: List of clocks used for CDM HW.
+
+- clock-rates
+ Usage: required
+ Value type: <u32>
+ Definition: List of clocks rates.
+
+- cdm-client-names
+ Usage: required
+ Value type: <string>
+ Definition: List of Clients supported by CDM HW node.
+
+- clock-cntl-level
+ Usage: required
+ Value type: <string>
+ Definition: List of strings corresponds clock-rates levels.
+ Supported strings: minsvs, lowsvs, svs, svs_l1, nominal, turbo.
+
+Example:
+ qcom,cpas-cdm0@ac48000 {
+ cell-index = <0>;
+ compatible = "qcom,cam480-cpas-cdm0";
+ label = "cpas-cdm0";
+ reg = <0xac48000 0x1000>;
+ reg-names = "cpas-cdm";
+ interrupts = <0 461 0>;
+ interrupt-names = "cpas-cdm";
+ regulator-names = "camss";
+ camss-supply = <&titan_top_gdsc>;
+ clock-names = "soc_ahb_clk",
+ "titan_top_ahb_clk",
+ "cam_axi_clk",
+ "camcc_slow_ahb_clk_src",
+ "cpas_top_ahb_clk",
+ "camnoc_axi_clk";
+ clocks = <&clock_camcc CAM_CC_SOC_AHB_CLK>,
+ <&clock_gcc GCC_CAMERA_AHB_CLK>,
+ <&clock_gcc GCC_CAMERA_AXI_CLK>,
+ <&clock_camcc CAM_CC_SLOW_AHB_CLK_SRC>,
+ <&clock_camcc CAM_CC_CPAS_AHB_CLK>,
+ <&clock_camcc CAM_CC_CAMNOC_AXI_CLK>;
+ qcom,clock-rates = <0 80000000 80000000 80000000 80000000 80000000>;
+ cdm-client-names = "ife";
+ clock-cntl-level = "turbo";
+ status = "ok";
+ };
diff --git a/bindings/media/video/msm-cam-cpas.txt b/bindings/media/video/msm-cam-cpas.txt
new file mode 100644
index 00000000..0815873b
--- /dev/null
+++ b/bindings/media/video/msm-cam-cpas.txt
@@ -0,0 +1,331 @@
+* Qualcomm Technologies, Inc. MSM Camera CPAS
+
+The MSM camera CPAS device provides dependency definitions for
+enabling Camera CPAS HW and provides the Client definitions
+for all HW blocks that use CPAS driver for BW voting. These
+definitions consist of various properties that define the list
+of clients supported, AHB, AXI master-slave IDs used for BW
+voting.
+
+=======================
+Required Node Structure
+=======================
+The camera CPAS device must be described in four levels of device nodes. The
+first level describes the overall CPAS device. Within it, second level nodes
+describe the list of AXI ports that map different clients for AXI BW voting.
+Third level nodes describe the details of each AXI port having name, mnoc,
+camnoc AXI Bus information. Fourth level nodes describe the details of Bus
+master-slave IDs, ab, ib values for mnoc, camnoc bus interface.
+
+==================================
+First Level Node - CAM CPAS device
+==================================
+- cell-index
+ Usage: required
+ Value type: <u32>
+ Definition: Node instance number.
+
+- compatible
+ Usage: required
+ Value type: <string>
+ Definition: Should be "qcom,cam-cpas".
+
+- label
+ Usage: required
+ Value type: <string>
+ Definition: Should be "cpas".
+
+- arch-compat
+ Usage: required
+ Value type: <string>
+ Definition: Should be "cpas_top" or "camss_top".
+
+- reg-names
+ Usage: required
+ Value type: <string>
+ Definition: Name of the register resources.
+
+- reg
+ Usage: required
+ Value type: <u32>
+ Definition: Register values.
+
+- reg-cam-base
+ Usage: required
+ Value type: <u32>
+ Definition: Offset of the register space compared to
+ to Camera base register space.
+
+- interrupt-names
+ Usage: optional
+ Value type: <string>
+ Definition: Name of the interrupt.
+
+- interrupts
+ Usage: optional
+ Value type: <u32>
+ Definition: Interrupt associated with CAMNOC HW.
+
+- qcom,cpas-hw-ver
+ Usage: required
+ Value type: <u32>
+ Definition: CAM HW Version information.
+
+- camnoc-axi-min-ib-bw
+ Usage: optional
+ Value type: <u64>
+ Definition: Min camnoc axi bw for the given target.
+
+- regulator-names
+ Usage: required
+ Value type: <string>
+ Definition: Name of the regulator resources for CPAS HW.
+
+- camss-vdd-supply
+ Usage: required
+ Value type: <phandle>
+ Definition: Regulator reference corresponding to the names listed
+ in "regulator-names".
+
+- clock-names
+ Usage: required
+ Value type: <string>
+ Definition: List of clock names required for CPAS HW.
+
+- clocks
+ Usage: required
+ Value type: <phandle>
+ Definition: List of clocks used for CPAS HW.
+
+- src-clock-name
+ Usage: required
+ Value type: <string>
+ Definition: Source clock name.
+
+- clock-rates
+ Usage: required
+ Value type: <u32>
+ Definition: List of clocks rates.
+
+- clock-cntl-level
+ Usage: required
+ Value type: <string>
+ Definition: List of strings corresponds clock-rates levels.
+ Supported strings: minsvs, lowsvs, svs, svs_l1, nominal, turbo.
+
+- control-camnoc-axi-clk
+ Usage: optional
+ Value type: <empty>
+ Definition: Bool property specifying whether to control camnoc axi
+ clock from cpas driver.
+
+- camnoc-bus-width
+ Usage: required if control-camnoc-axi-clk is enabled
+ Value type: <u32>
+ Definition: camnoc bus width.
+
+- camnoc-axi-clk-bw-margin-perc
+ Usage: optional
+ Value type: <u32>
+ Definition: Percentage value to be added to camnoc bw while calculating
+ camnoc axi clock frequency.
+
+- qcom,msm-bus,name
+- qcom,msm-bus,num-cases
+- qcom,msm-bus,num-paths
+- qcom,msm-bus,vectors-KBps
+ Please refer Documentation/devicetree/bindings/arm/msm/msm_bus.txt
+ for the properties above.
+
+- vdd-corners
+ Usage: required
+ Value type: <u32>
+ Definition: List of vdd corners to map for ahb level.
+
+- vdd-corner-ahb-mapping
+ Usage: required
+ Value type: <string>
+ Definition: List of ahb level strings corresponds to vdd-corners.
+ Supported strings: suspend, svs, nominal, turbo
+
+- client-id-based
+ Usage: required
+ Value type: <empty>
+ Definition: Bool property specifying whether CPAS clients are ID based.
+
+- client-names
+ Usage: required
+ Value type: <string>
+ Definition: List of Clients supported by CPAS.
+
+- client-axi-port-names
+ Usage: required
+ Value type: <string>
+ Definition: AXI Port name for each client.
+
+- client-bus-camnoc-based
+ Usage: required
+ Value type: <empty>
+ Definition: Bool property specifying whether Clients are connected
+ through CAMNOC for AXI access.
+
+===================================================================
+Third Level Node - CAM AXI Port properties
+===================================================================
+- qcom,axi-port-name
+ Usage: required
+ Value type: <string>
+ Definition: Name of the AXI Port.
+
+===================================================================
+Fourth Level Node - CAM AXI Bus properties
+===================================================================
+
+- qcom,msm-bus,name
+- qcom,msm-bus,num-cases
+- qcom,msm-bus,num-paths
+- qcom,msm-bus,vectors-KBps
+ Please refer Documentation/devicetree/bindings/arm/msm/msm_bus.txt
+ for the properties above.
+
+- qcom,msm-bus-vector-dyn-vote
+ Usage: optional
+ Value type: <empty>
+ Definition: Bool property specifying whether this bus client
+ is dynamic vote based.
+
+Example:
+
+ qcom,cam-cpas@ac40000 {
+ cell-index = <0>;
+ compatible = "qcom,cam-cpas";
+ label = "cpas";
+ arch-compat = "cpas_top";
+ status = "ok";
+ reg-names = "cam_cpas_top", "cam_camnoc";
+ reg = <0xac40000 0x1000>,
+ <0xac42000 0x5000>;
+ reg-cam-base = <0x40000 0x42000>;
+ interrupt-names = "cpas_camnoc";
+ interrupts = <0 459 0>;
+ qcom,cpas-hw-ver = <0x170100>; /* Titan v170 v1.0.0 */
+ regulator-names = "camss-vdd";
+ camss-vdd-supply = <&titan_top_gdsc>;
+ clock-names = "gcc_ahb_clk",
+ "gcc_axi_clk",
+ "soc_ahb_clk",
+ "cpas_ahb_clk",
+ "slow_ahb_clk_src",
+ "camnoc_axi_clk";
+ clocks = <&clock_gcc GCC_CAMERA_AHB_CLK>,
+ <&clock_gcc GCC_CAMERA_AXI_CLK>,
+ <&clock_camcc CAM_CC_SOC_AHB_CLK>,
+ <&clock_camcc CAM_CC_CPAS_AHB_CLK>,
+ <&clock_camcc CAM_CC_SLOW_AHB_CLK_SRC>,
+ <&clock_camcc CAM_CC_CAMNOC_AXI_CLK>;
+ src-clock-name = "slow_ahb_clk_src";
+ clock-rates = <0 0 0 0 80000000 0>;
+ clock-cntl-level = "turbo";
+ control-camnoc-axi-clk;
+ camnoc-bus-width = <32>;
+ camnoc-axi-clk-bw-margin-perc = <10>;
+ qcom,msm-bus,name = "cam_ahb";
+ qcom,msm-bus,num-cases = <4>;
+ qcom,msm-bus,num-paths = <1>;
+ qcom,msm-bus,vectors-KBps =
+ <MSM_BUS_MASTER_AMPSS_M0
+ MSM_BUS_SLAVE_CAMERA_CFG 0 0>,
+ <MSM_BUS_MASTER_AMPSS_M0
+ MSM_BUS_SLAVE_CAMERA_CFG 0 300000>,
+ <MSM_BUS_MASTER_AMPSS_M0
+ MSM_BUS_SLAVE_CAMERA_CFG 0 640000>,
+ <MSM_BUS_MASTER_AMPSS_M0
+ MSM_BUS_SLAVE_CAMERA_CFG 0 640000>;
+ client-id-based;
+ client-names =
+ "ife0", "ife1", "ife2", "ipe0",
+ "ipe1", "cam-cdm-intf0", "cpas-cdm0", "bps0",
+ "icp0", "jpeg-dma0", "jpeg0", "fd0";
+ client-axi-port-names =
+ "cam_hf_1", "cam_hf_2", "cam_hf_2", "cam_sf_1",
+ "cam_sf_1", "cam_sf_1", "cam_sf_1", "cam_sf_1",
+ "cam_sf_1", "cam_sf_1", "cam_sf_1", "cam_sf_1";
+ client-bus-camnoc-based;
+ qcom,axi-port-list {
+ qcom,axi-port1 {
+ qcom,axi-port-name = "cam_hf_1";
+ qcom,axi-port-mnoc {
+ qcom,msm-bus,name = "cam_hf_1_mnoc";
+ qcom,msm-bus-vector-dyn-vote;
+ qcom,msm-bus,num-cases = <2>;
+ qcom,msm-bus,num-paths = <1>;
+ qcom,msm-bus,vectors-KBps =
+ <MSM_BUS_MASTER_CAMNOC_HF
+ MSM_BUS_SLAVE_EBI_CH0 0 0>,
+ <MSM_BUS_MASTER_CAMNOC_HF
+ MSM_BUS_SLAVE_EBI_CH0 0 0>;
+ };
+ qcom,axi-port-camnoc {
+ qcom,msm-bus,name = "cam_hf_1_camnoc";
+ qcom,msm-bus-vector-dyn-vote;
+ qcom,msm-bus,num-cases = <2>;
+ qcom,msm-bus,num-paths = <1>;
+ qcom,msm-bus,vectors-KBps =
+ <MSM_BUS_MASTER_CAMNOC_HF
+ MSM_BUS_SLAVE_EBI_CH0 0 0>,
+ <MSM_BUS_MASTER_CAMNOC_HF
+ MSM_BUS_SLAVE_EBI_CH0 0 0>;
+ };
+ };
+ qcom,axi-port2 {
+ qcom,axi-port-name = "cam_hf_2";
+ qcom,axi-port-mnoc {
+ qcom,msm-bus,name = "cam_hf_2_mnoc";
+ qcom,msm-bus-vector-dyn-vote;
+ qcom,msm-bus,num-cases = <2>;
+ qcom,msm-bus,num-paths = <1>;
+ qcom,msm-bus,vectors-KBps =
+ <MSM_BUS_MASTER_CAMNOC_HF
+ MSM_BUS_SLAVE_EBI_CH0 0 0>,
+ <MSM_BUS_MASTER_CAMNOC_HF
+ MSM_BUS_SLAVE_EBI_CH0 0 0>;
+ };
+ qcom,axi-port-camnoc {
+ qcom,msm-bus,name = "cam_hf_1_camnoc";
+ qcom,msm-bus-vector-dyn-vote;
+ qcom,msm-bus,num-cases = <2>;
+ qcom,msm-bus,num-paths = <1>;
+ qcom,msm-bus,vectors-KBps =
+ <MSM_BUS_MASTER_CAMNOC_HF
+ MSM_BUS_SLAVE_EBI_CH0 0 0>,
+ <MSM_BUS_MASTER_CAMNOC_HF
+ MSM_BUS_SLAVE_EBI_CH0 0 0>;
+ };
+ };
+ qcom,axi-port3 {
+ qcom,axi-port-name = "cam_sf_1";
+ qcom,axi-port-mnoc {
+ qcom,msm-bus,name = "cam_sf_1_mnoc";
+ qcom,msm-bus-vector-dyn-vote;
+ qcom,msm-bus,num-cases = <2>;
+ qcom,msm-bus,num-paths = <1>;
+ qcom,msm-bus,vectors-KBps =
+ <MSM_BUS_MASTER_CAMNOC_SF
+ MSM_BUS_SLAVE_EBI_CH0 0 0>,
+ <MSM_BUS_MASTER_CAMNOC_SF
+ MSM_BUS_SLAVE_EBI_CH0 0 0>;
+ };
+ qcom,axi-port-camnoc {
+ qcom,msm-bus,name = "cam_sf_1_camnoc";
+ qcom,msm-bus-vector-dyn-vote;
+ qcom,msm-bus,num-cases = <2>;
+ qcom,msm-bus,num-paths = <1>;
+ qcom,msm-bus,vectors-KBps =
+ <MSM_BUS_MASTER_CAMNOC_SF
+ MSM_BUS_SLAVE_EBI_CH0 0 0>,
+ <MSM_BUS_MASTER_CAMNOC_SF
+ MSM_BUS_SLAVE_EBI_CH0 0 0>;
+ };
+ };
+ };
+ };
diff --git a/bindings/media/video/msm-cam-csiphy.txt b/bindings/media/video/msm-cam-csiphy.txt
new file mode 100644
index 00000000..92172837
--- /dev/null
+++ b/bindings/media/video/msm-cam-csiphy.txt
@@ -0,0 +1,117 @@
+* Qualcomm Technologies, Inc. MSM CSI Phy
+
+=======================
+Required Node Structure
+=======================
+The camera CSIPHY node must be described in First level of device nodes. The
+first level describe the overall CSIPHY node structure.
+
+======================================
+First Level Node - CSIPHY device
+======================================
+
+- compatible
+ Usage: required
+ Value type: <string>
+ Definition: Should be "qcom,csiphy-v1.0",
+ "qcom,csiphy-v1.1", "qcom,csiphy-v1.2",
+ "qcom,csiphy-v1.2.1", "qcom,csiphy-v2.0", "qcom,csiphy".
+
+- cell-index: csiphy hardware core index
+ Usage: required
+ Value type: <u32>
+ Definition: Should specify the Hardware index id.
+
+- reg
+ Usage: required
+ Value type: <u32>
+ Definition: offset and length of the register set
+ for the device for the csiphy operating in
+ compatible mode.
+
+- reg-names
+ Usage: required
+ Value type: <string>
+ Definition: Should specify relevant names to each
+ reg property defined.
+
+- reg-cam-base
+ Usage: required
+ Value type: <string>
+ Definition: offset of CSIPHY in camera hw block
+
+- interrupts
+ Usage: required
+ Value type: <u32>
+ Definition: Interrupt associated with CCI HW.
+
+- interrupt-names
+ Usage: required
+ Value type: <string>
+ Definition: Name of the interrupt.
+
+- clock-names
+ Usage: required
+ Value type: <string>
+ Definition: List of clock names required for CSIPHY HW.
+
+- clock-rates
+ Usage: required
+ Value type: <u32>
+ Definition: List of clock rates in Hz for CSIPHY HW.
+
+- clock-cntl-level
+ Usage: required
+ Value type: <string>
+ Definition: All different clock level node can support.
+
+- clocks
+ Usage: required
+ Value type: <phandle>
+ Definition: all clock phandle and source clocks.
+
+- regulator-names
+ Usage: required
+ Value type: <string>
+ Definition: name of the voltage regulators required for the device.
+
+- gdscr-supply
+ Usage: required
+ Value type: <phandle>
+ Definition: should contain gdsr regulator used for CSIPHY clocks.
+
+- mipi-csi-vdd-supply
+ Usage: required
+ Value type: <phandle>
+ Definition: should contain phandle for mipi-csi-vdd regulator used for
+ CSIPHY device.
+
+- csi-vdd-voltage
+ Usage: required
+ Value type: <u32>
+ Definition: should contain required voltage for csi-vdd supply for CSIPHY.
+
+Example:
+
+qcom,csiphy@ac65000 {
+ cell-index = <0>;
+ compatible = "qcom,csiphy-v1.0", "qcom,csiphy";
+ reg = <0xac65000 0x200>;
+ reg-cam-base = <0x65000>;
+ reg-names = "csiphy";
+ interrupts = <0 477 0>;
+ interrupt-names = "csiphy";
+ regulator-names = "gdscr", "refgen";
+ mipi-csi-vdd-supply = <&pm8998_l1>;
+ csi-vdd-voltage = <1200000>;
+ gdscr-supply = <&titan_top_gdsc>;
+ clocks = <&clock_camcc CAM_CC_CPHY_RX_CLK_SRC>,
+ <&clock_camcc CAM_CC_CSIPHY0_CLK>,
+ <&clock_camcc CAM_CC_CSI0PHYTIMER_CLK_SRC>,
+ <&clock_camcc CAM_CC_CSI0PHYTIMER_CLK>;
+ clock-names = "cphy_rx_clk_src", "csiphy0_clk",
+ "csi0phytimer_clk_src", "csi0phytimer_clk";
+ clock-rates = <400000000 0 300000000 0>;
+ clock-cntl-level = "turbo";
+ status = "ok";
+};
diff --git a/bindings/media/video/msm-cam-eeprom.txt b/bindings/media/video/msm-cam-eeprom.txt
new file mode 100644
index 00000000..d77f337a
--- /dev/null
+++ b/bindings/media/video/msm-cam-eeprom.txt
@@ -0,0 +1,503 @@
+* Qualcomm Technologies, Inc. MSM EEPROM
+
+EEPROM is a one time programmed(OTP) device that stores the calibration data
+use for camera sensor. It may either be integrated in the sensor module or in
+the sensor itself. As a result, the power, clock and GPIOs may be the same as
+the camera sensor. The following describes the page block map, power supply,
+clock, GPIO and power on sequence properties of the EEPROM device.
+
+=======================================================
+Required Node Structure if probe happens from userspace
+=======================================================
+The EEPROM device is described in one level of the device node.
+
+======================================
+First Level Node - CAM EEPROM device
+======================================
+- compatible
+ Usage: required
+ Value type: <string>
+ Definition: Should be "qcom,eeprom".
+
+- cell-index
+ Usage: required
+ Value type: <u32>
+ Definition: Should specify the hardware index id.
+
+- reg
+ Usage: required
+ Value type: <u32>
+ Definition: Register values.
+
+- regulator-names
+ Usage: required
+ Value type: <string>
+ Definition: Name of the regulator resources for EEPROM HW.
+
+- xxxx-supply
+ Usage: required
+ Value type: <phandle>
+ Definition: Regulator reference corresponding to the names listed in
+ "regulator-names".
+
+- rgltr-cntrl-support
+ Usage: required
+ Value type: <bool>
+ Definition: This property specifies if the regulator control is supported
+ e.g. rgltr-min-voltage.
+
+- rgltr-min-voltage
+ Usage: required
+ Value type: <u32>
+ Definition: should contain minimum voltage level for regulators
+ mentioned in regulator-names property.
+
+- rgltr-max-voltage
+ Usage: required
+ Value type: <u32>
+ Definition: should contain maximum voltage level for regulators
+ mentioned in regulator-names property.
+
+- rgltr-load-current
+ Usage: required
+ Value type: <u32>
+ Definition: should contain the maximum current in microamps required for
+ the regulators mentioned in regulator-names property.
+
+- gpio-no-mux
+ Usage: required
+ Value type: <u32>
+ Definition: should specify the gpio mux type.
+
+- gpios
+ Usage: required
+ Value type: <phandle>
+ Definition: should specify the gpios to be used for the eeprom.
+
+- gpio-reset
+ Usage: required
+ Value type: <u32>
+ Definition: should specify the reset gpio index.
+
+- gpio-standby
+ Usage: required
+ Value type: <u32>
+ Definition: should specify the standby gpio index.
+
+- gpio-req-tbl-num
+ Usage: required
+ Value type: <u32>
+ Definition: should specify the gpio table index.
+
+- gpio-req-tbl-flags
+ Usage: required
+ Value type: <u32>
+ Definition: should specify the gpio functions.
+
+- gpio-req-tbl-label
+ Usage: required
+ Value type: <string>
+ Definition: should specify the gpio labels.
+
+- sensor-position
+ Usage: required
+ Value type: <u32>
+ Definition: should contain the mount angle of the camera sensor.
+
+- cci-device
+ Usage: required
+ Value type: <u32>
+ Definition: should contain i2c device id to be used for this camera
+ sensor
+
+- cci-master
+ Usage: required
+ Value type: <u32>
+ Definition: should contain i2c master id to be used for this camera
+ sensor.
+
+- sensor-mode
+ Usage: required
+ Value type: <u32>
+ Definition: should contain sensor mode supported.
+
+- clock-names
+ Usage: required
+ Value type: <string>
+ Definition: List of clock names required for EEPROM HW.
+
+- clocks
+ Usage: required
+ Value type: <phandle>
+ Definition: List of clocks used for EEPROM HW.
+
+- clock-cntl-level
+ Usage: required
+ Value type: <string>
+ Definition: says what all different clock levels eeprom node has.
+
+- clock-rates
+ Usage: required
+ Value type: <u32>
+ Definition: List of clocks rates.
+
+Example:
+
+ eeprom0: qcom,eeprom@0 {
+ cell-index = <0>;
+ reg = <0x0>;
+ compatible = "qcom,eeprom";
+ cam_vdig-supply = <&pm8998_l5>;
+ cam_vio-supply = <&pm8998_lvs1>;
+ regulator-names = "cam_vdig", "cam_vio";
+ rgltr-cntrl-support;
+ rgltr-min-voltage = <1200000 0>;
+ rgltr-max-voltage = <1200000 0>;
+ rgltr-load-current = <0 80000 105000 0>;
+ gpio-no-mux = <0>;
+ gpios = <&msmgpio 26 0>,
+ <&msmgpio 37 0>,
+ <&msmgpio 36 0>;
+ gpio-reset = <1>;
+ gpio-standby = <2>;
+ gpio-req-tbl-num = <0 1 2>;
+ gpio-req-tbl-flags = <1 0 0>;
+ gpio-req-tbl-label = "CAMIF_MCLK",
+ "CAM_RESET1",
+ "CAM_STANDBY";
+ sensor-position = <0>;
+ sensor-mode = <0>;
+ cci-device = <0>;
+ cci-master = <0>;
+ status = "ok";
+ clocks = <&clock_camcc CAM_CC_MCLK0_CLK>;
+ clock-names = "cam_clk";
+ clock-cntl-level = "turbo";
+ clock-rates = <24000000>;
+ };
+
+=======================================================
+Required Node Structure if probe happens from kernel
+=======================================================
+The EEPROM device is described in one level of the device node.
+
+======================================
+First Level Node - CAM EEPROM device
+======================================
+- compatible
+ Usage: required
+ Value type: <string>
+ Definition: Should be "qcom,eeprom".
+
+- cell-index
+ Usage: required
+ Value type: <u32>
+ Definition: Should specify the hardware index id.
+
+- reg
+ Usage: required
+ Value type: <u32>
+ Definition: Register values.
+
+- qcom,eeprom-name
+ Usage: required
+ Value type: <string>
+ Definition: Name of the EEPROM HW.
+
+- qcom,slave-addr
+ Usage: required
+ Value type: <u32>
+ Definition: Slave address of the EEPROM HW.
+
+- qcom,num-blocks
+ Usage: required
+ Value type: <u32>
+ Definition: Total block number that eeprom contains.
+
+- qcom,pageX
+ Usage: required
+ Value type: <u32>
+ Definition: List of values specifying page size, start address,
+ address type, data, data type, delay in ms.
+ size 0 stand for non-paged.
+
+- qcom,pollX
+ Usage: required
+ Value type: <u32>
+ Definition: List of values specifying poll size, poll reg address,
+ address type, data, data type, delay in ms.
+ size 0 stand for not used.
+
+- qcom,memX
+ Usage: required
+ Value type: <u32>
+ Definition: List of values specifying memory size, start address,
+ address type, data, data type, delay in ms.
+ size 0 stand for not used.
+
+- qcom,saddrX
+ Usage: required
+ Value type: <u32>
+ Definition: property should specify the slave address for block (%d).
+
+- regulator-names
+ Usage: required
+ Value type: <string>
+ Definition: Name of the regulator resources for EEPROM HW.
+
+- qcom,cmm-data-support
+ Usage: required
+ Value type: <u32>
+ Definition: Camera MultiModule data capability flag..
+
+- qcom,cmm-data-compressed
+ Usage: required
+ Value type: <u32>
+ Definition: Camera MultiModule data compression flag.
+
+- qcom,cmm-data-offset
+ Usage: required
+ Value type: <u32>
+ Definition: Camera MultiModule data start offset.
+
+- qcom,cmm-data-size
+ Usage: required
+ Value type: <u32>
+ Definition: Camera MultiModule data size.
+
+- qcom,cam-power-seq-type
+ Usage: required
+ Value type: <string>
+ Definition: should specify the power on sequence types.
+
+- qcom,cam-power-seq-val
+ Usage: required
+ Value type: <string>
+ Definition: should specify the power on sequence values.
+
+- qcom,cam-power-seq-cfg-val
+ Usage: required
+ Value type: <u32>
+ Definition: should specify the power on sequence config values.
+
+- qcom,cam-power-seq-delay
+ Usage: required
+ Value type: <u32>
+ Definition: should specify the power on sequence delay time in ms.
+
+- spiop-read
+ Usage: required
+ Value type: <u32>
+ Definition: this array provides SPI read operation related data.
+
+- spiop-readseq
+ Usage: required
+ Value type: <u32>
+ Definition: this array provides SPI read sequence operation realted data.
+
+- spiop-queryid
+ Usage: required
+ Value type: <u32>
+ Definition: this array provides SPI query eeprom id operation related data.
+
+- spiop-pprog:
+ Usage: required
+ Value type: <u32>
+ Definition: this array provides SPI page program operation related data.
+
+- spiop-wenable
+ Usage: required
+ Value type: <u32>
+ Definition: this array provides SPI write enable operation related data.
+
+- spiop-readst
+ Usage: required
+ Value type: <u32>
+ Definition: this array provides SPI read destination operation related data.
+
+- spiop-erase
+ Usage: required
+ Value type: <u32>
+ Definition: this array provides SPI erase operation related data.
+
+- eeprom-idx
+ Usage: required
+ Value type: <u32>
+ Definition: this array provides eeprom id realted data.
+
+- xxxx-supply
+ Usage: required
+ Value type: <phandle>
+ Definition: Regulator reference corresponding to the names listed in
+ "regulator-names".
+
+- rgltr-cntrl-support
+ Usage: required
+ Value type: <bool>
+ Definition: This property specifies if the regulator control is supported
+ e.g. rgltr-min-voltage.
+
+- rgltr-min-voltage
+ Usage: required
+ Value type: <u32>
+ Definition: should contain minimum voltage level for regulators
+ mentioned in regulator-names property.
+
+- rgltr-max-voltage
+ Usage: required
+ Value type: <u32>
+ Definition: should contain maximum voltage level for regulators
+ mentioned in regulator-names property.
+
+- rgltr-load-current
+ Usage: required
+ Value type: <u32>
+ Definition: should contain the maximum current in microamps required for
+ the regulators mentioned in regulator-names property.
+
+- gpio-no-mux
+ Usage: required
+ Value type: <u32>
+ Definition: should specify the gpio mux type.
+
+- gpios
+ Usage: required
+ Value type: <phandle>
+ Definition: should specify the gpios to be used for the eeprom.
+
+- gpio-reset
+ Usage: required
+ Value type: <u32>
+ Definition: should specify the reset gpio index.
+
+- gpio-standby
+ Usage: required
+ Value type: <u32>
+ Definition: should specify the standby gpio index.
+
+- gpio-req-tbl-num
+ Usage: required
+ Value type: <u32>
+ Definition: should specify the gpio table index.
+
+- gpio-req-tbl-flags
+ Usage: required
+ Value type: <u32>
+ Definition: should specify the gpio functions.
+
+- gpio-req-tbl-label
+ Usage: required
+ Value type: <string>
+ Definition: should specify the gpio labels.
+
+- sensor-position
+ Usage: required
+ Value type: <u32>
+ Definition: should contain the mount angle of the camera sensor.
+
+- cci-device
+ Usage: required
+ Value type: <u32>
+ Definition: should contain i2c device id to be used for this camera
+ sensor
+
+- cci-master
+ Usage: required
+ Value type: <u32>
+ Definition: should contain i2c master id to be used for this camera
+ sensor.
+
+- sensor-mode
+ Usage: required
+ Value type: <u32>
+ Definition: should contain sensor mode supported.
+
+- clock-cntl-level
+ Usage: required
+ Value type: <string>
+ Definition: says what all different clock levels eeprom node has.
+
+- clock-names
+ Usage: required
+ Value type: <string>
+ Definition: List of clock names required for EEPROM HW.
+
+- clocks
+ Usage: required
+ Value type: <phandle>
+ Definition: List of clocks used for EEPROM HW.
+
+- clock-rates
+ Usage: required
+ Value type: <u32>
+ Definition: List of clocks rates.
+
+Example:
+
+ eeprom0: qcom,eeprom@0 {
+ cell-index = <0>;
+ reg = <0x0>;
+ qcom,eeprom-name = "msm_eeprom";
+ eeprom-id0 = <0xF8 0x15>;
+ eeprom-id1 = <0xEF 0x15>;
+ eeprom-id2 = <0xC2 0x36>;
+ eeprom-id3 = <0xC8 0x15>;
+ compatible = "qcom,eeprom";
+ qcom,slave-addr = <0x60>;
+ qcom,num-blocks = <2>;
+ qcom,page0 = <1 0x100 2 0x01 1 1>;
+ qcom,poll0 = <0 0x0 2 0 1 1>;
+ qcom,mem0 = <0 0x0 2 0 1 0>;
+ qcom,page1 = <1 0x0200 2 0x8 1 1>;
+ qcom,pageen1 = <1 0x0202 2 0x01 1 10>;
+ qcom,poll1 = <0 0x0 2 0 1 1>;
+ qcom,mem1 = <32 0x3000 2 0 1 0>;
+ qcom,saddr1 = <0x62>;
+ qcom,cmm-data-support;
+ qcom,cmm-data-compressed;
+ qcom,cmm-data-offset = <0>;
+ qcom,cmm-data-size = <0>;
+ spiop-read = <0x03 3 0 0 0>;
+ spiop-readseq = <0x03 3 0 0 0>;
+ spiop-queryid = <0x90 3 0 0 0>;
+ spiop-pprog = <0x02 3 0 3 100>;
+ spiop-wenable = <0x06 0 0 0 0>;
+ spiop-readst = <0x05 0 0 0 0>;
+ spiop-erase = <0x20 3 0 10 100>;
+ qcom,cam-power-seq-type = "sensor_vreg",
+ "sensor_vreg", "sensor_clk",
+ "sensor_gpio", "sensor_gpio";
+ qcom,cam-power-seq-val = "cam_vdig",
+ "cam_vio", "sensor_cam_mclk",
+ "sensor_gpio_reset",
+ "sensor_gpio_standby";
+ qcom,cam-power-seq-cfg-val = <1 1 24000000 1 1>;
+ qcom,cam-power-seq-delay = <1 1 5 5 10>;
+ cam_vdig-supply = <&pm8998_l5>;
+ cam_vio-supply = <&pm8998_lvs1>;
+ regulator-names = "cam_vdig", "cam_vio";
+ rgltr-cntrl-support;
+ rgltr-min-voltage = <1200000 0>;
+ rgltr-max-voltage = <1200000 0>;
+ rgltr-load-current = <0 80000 105000 0>;
+ qcom,gpio-no-mux = <0>;
+ gpios = <&msmgpio 26 0>,
+ <&msmgpio 37 0>,
+ <&msmgpio 36 0>;
+ gpio-reset = <1>;
+ gpio-standby = <2>;
+ gpio-req-tbl-num = <0 1 2>;
+ gpio-req-tbl-flags = <1 0 0>;
+ gpio-req-tbl-label = "CAMIF_MCLK",
+ "CAM_RESET1",
+ "CAM_STANDBY";
+ sensor-position = <0>;
+ sensor-mode = <0>;
+ cci-device = <0>;
+ cci-master = <0>;
+ status = "ok";
+ clocks = <&clock_camcc CAM_CC_MCLK0_CLK>;
+ clock-cntl-level = "turbo";
+ clock-names = "cam_clk";
+ clock-rates = <24000000>;
+ };
diff --git a/bindings/media/video/msm-cam-fd.txt b/bindings/media/video/msm-cam-fd.txt
new file mode 100644
index 00000000..51b0baba
--- /dev/null
+++ b/bindings/media/video/msm-cam-fd.txt
@@ -0,0 +1,154 @@
+* Qualcomm Technologies, Inc. MSM Camera FD
+
+The MSM camera Face Detection device provides dependency definitions
+for enabling Camera FD HW. MSM camera FD is implemented in multiple
+device nodes. The root FD device node has properties defined to hint
+the driver about the FD HW nodes available during the probe sequence.
+Each node has multiple properties defined for interrupts, clocks and
+regulators.
+
+=======================
+Required Node Structure
+=======================
+FD root interface node takes care of the handling Face Detection high level
+driver handling and controls underlying FD hardware present.
+
+- compatible
+ Usage: required
+ Value type: <string>
+ Definition: Should be "qcom,cam-fd".
+
+- compat-hw-name
+ Usage: required
+ Value type: <string>
+ Definition: Should be "qcom,fd".
+
+- num-fd
+ Usage: required
+ Value type: <u32>
+ Definition: Number of supported FD HW blocks.
+
+Example:
+ qcom,cam-fd {
+ compatible = "qcom,cam-fd";
+ compat-hw-name = "qcom,fd";
+ num-fd = <1>;
+ };
+
+=======================
+Required Node Structure
+=======================
+FD Node provides interface for Face Detection hardware driver
+about the device register map, interrupt map, clocks, regulators.
+
+- cell-index
+ Usage: required
+ Value type: <u32>
+ Definition: Node instance number.
+
+- compatible
+ Usage: required
+ Value type: <string>
+ Definition: Should be one of "qcom,fd41", "qcom,fd501",
+ "qcom,fd600".
+
+- reg-names
+ Usage: optional
+ Value type: <string>
+ Definition: Name of the register resources.
+
+- reg
+ Usage: optional
+ Value type: <u32>
+ Definition: Register values.
+
+- reg-cam-base
+ Usage: optional
+ Value type: <u32>
+ Definition: Offset of the register space compared to
+ to Camera base register space.
+
+- interrupt-names
+ Usage: optional
+ Value type: <string>
+ Definition: Name of the interrupt.
+
+- interrupts
+ Usage: optional
+ Value type: <u32>
+ Definition: Interrupt line associated with FD HW.
+
+- regulator-names
+ Usage: required
+ Value type: <string>
+ Definition: Name of the regulator resources for FD HW.
+
+- camss-vdd-supply
+ Usage: required
+ Value type: <phandle>
+ Definition: Regulator reference corresponding to the names listed
+ in "regulator-names".
+
+- clock-names
+ Usage: required
+ Value type: <string>
+ Definition: List of clock names required for FD HW.
+
+- clocks
+ Usage: required
+ Value type: <phandle>
+ Definition: List of clocks required for FD HW.
+
+- clock-rates
+ Usage: required
+ Value type: <u32>
+ Definition: List of clocks rates.
+
+- src-clock-name
+ Usage: required
+ Value type: <string>
+ Definition: Source clock name.
+
+- clock-control-debugfs
+ Usage: optional
+ Value type: <string>
+ Definition: Enable/Disable clk rate control.
+
+- clock-cntl-level
+ Usage: required
+ Value type: <string>
+ Definition: List of strings corresponds clock-rates levels.
+ Supported strings: minsvs, lowsvs, svs, svs_l1, nominal, turbo.
+
+Examples:
+ cam_fd: qcom,fd@ac5a000 {
+ cell-index = <0>;
+ compatible = "qcom,fd600";
+ reg-names = "fd_core", "fd_wrapper";
+ reg = <0xac5a000 0x1000>,
+ <0xac5b000 0x400>;
+ reg-cam-base = <0x5a000 0x5b000>;
+ interrupt-names = "fd";
+ interrupts = <0 462 0>;
+ regulator-names = "camss-vdd";
+ camss-vdd-supply = <&titan_top_gdsc>;
+ clock-names = "gcc_ahb_clk",
+ "gcc_axi_clk",
+ "soc_ahb_clk",
+ "cpas_ahb_clk",
+ "camnoc_axi_clk",
+ "fd_core_clk_src",
+ "fd_core_clk",
+ "fd_core_uar_clk";
+ clocks = <&clock_gcc GCC_CAMERA_AHB_CLK>,
+ <&clock_gcc GCC_CAMERA_AXI_CLK>,
+ <&clock_camcc CAM_CC_SOC_AHB_CLK>,
+ <&clock_camcc CAM_CC_CPAS_AHB_CLK>,
+ <&clock_camcc CAM_CC_CAMNOC_AXI_CLK>,
+ <&clock_camcc CAM_CC_FD_CORE_CLK_SRC>,
+ <&clock_camcc CAM_CC_FD_CORE_CLK>,
+ <&clock_camcc CAM_CC_FD_CORE_UAR_CLK>;
+ src-clock-name = "fd_core_clk_src";
+ clock-cntl-level = "svs";
+ clock-rates = <0 0 0 0 0 400000000 0 0>;
+ };
diff --git a/bindings/media/video/msm-cam-icp.txt b/bindings/media/video/msm-cam-icp.txt
new file mode 100644
index 00000000..e22e1f99
--- /dev/null
+++ b/bindings/media/video/msm-cam-icp.txt
@@ -0,0 +1,287 @@
+* Qualcomm Technologies, Inc. MSM Camera ICP
+
+The MSM camera ICP devices are implemented multiple device nodes.
+The root icp device node has properties defined to hint the driver
+about the number of A5,IPE and BPS nodes available during the
+probe sequence. Each node has multiple properties defined
+for interrupts, clocks and regulators.
+
+=======================
+Required Node Structure
+=======================
+ICP root interface node takes care of the handling account for number
+of A5, IPE and BPS devices present on the hardware.
+
+- compatible
+ Usage: required
+ Value type: <string>
+ Definition: Should be "qcom,cam-icp".
+
+- compat-hw-name
+ Usage: required
+ Value type: <string>
+ Definition: Should be "qcom,a5" or "qcom,ipe0" or "qcom,ipe1" or "qcom,bps".
+
+- num-a5
+ Usage: required
+ Value type: <u32>
+ Definition: Number of supported A5 processors.
+
+- num-ipe
+ Usage: required
+ Value type: <u32>
+ Definition: Number of supported IPE HW blocks.
+
+- num-bps
+ Usage: required
+ Value type: <u32>
+ Definition: Number of supported BPS HW blocks.
+
+Example:
+ qcom,cam-icp {
+ compatible = "qcom,cam-icp";
+ compat-hw-name = "qcom,a5", "qcom,ipe0", "qcom,ipe1", "qcom,bps";
+ num-a5 = <1>;
+ num-ipe = <2>;
+ num-bps = <1>;
+ status = "ok";
+ };
+
+=======================
+Required Node Structure
+=======================
+A5/IPE/BPS Node's provides interface for Image Control Processor driver
+about the A5 register map, interrupt map, clocks, regulators
+and name of firmware image.
+
+- cell-index
+ Usage: required
+ Value type: <u32>
+ Definition: Node instance number.
+
+- compatible
+ Usage: required
+ Value type: <string>
+ Definition: Should be "qcom,cam-a5" or "qcom,cam-ipe" or "qcom,cam-bps".
+
+- reg-names
+ Usage: optional
+ Value type: <string>
+ Definition: Name of the register resources.
+
+- reg
+ Usage: optional
+ Value type: <u32>
+ Definition: Register values.
+
+- reg-cam-base
+ Usage: optional
+ Value type: <u32>
+ Definition: Register values.
+
+- interrupt-names
+ Usage: optional
+ Value type: <string>
+ Definition: Name of the interrupt.
+
+- interrupts
+ Usage: optional
+ Value type: <u32>
+ Definition: Interrupt associated with CDM HW.
+
+- regulator-names
+ Usage: required
+ Value type: <string>
+ Definition: Name of the regulator resources for CDM HW.
+
+- camss-supply
+ Usage: required
+ Value type: <phandle>
+ Definition: Regulator reference corresponding to the names listed
+ in "regulator-names".
+
+- clock-names
+ Usage: required
+ Value type: <string>
+ Definition: List of clock names required for CDM HW.
+
+- src-clock-name
+ Usage: required
+ Value type: <string>
+ Definition: Source clock name.
+
+- clock-control-debugfs
+ Usage: optional
+ Value type: <string>
+ Definition: Enable/Disable clk rate control.
+
+- clocks
+ Usage: required
+ Value type: <phandle>
+ Definition: List of clocks used for CDM HW.
+
+- clock-cntl-level
+ Usage: required
+ Value type: <string>
+ Definition: List of strings corresponds clock-rates levels.
+ Supported strings: lowsvs, svs, svs_l1, nominal, turbo.
+
+- clock-rates
+ Usage: required
+ Value type: <u32>
+ Definition: List of clocks rates.
+
+- fw_name
+ Usage: optional
+ Value type: <string>
+ Definition: Name of firmware image.
+
+- ubwc-ipe-fetch-cfg
+ Usage: required
+ Value type: <u32>
+ Definition: UBWC IPE fetch configuration based on DDR device type.
+
+- ubwc-ipe-write-cfg
+ Usage: required
+ Value type: <u32>
+ Definition: UBWC IPE write configuration based on DDR device type.
+
+- ubwc-bps-fetch-cfg
+ Usage: required
+ Value type: <u32>
+ Definition: UBWC BPS fetch configuration based on DDR device type.
+
+- ubwc-bps-write-cfg
+ Usage: required
+ Value type: <u32>
+ Definition: UBWC BPS write configuration based on DDR device type.
+
+- ubwc-cfg
+ Usage: optional
+ Value type: <u32>
+ Definition: UBWC configuration, this is mandatory if above
+ ipe/bps ubwc properties are not used.
+
+Examples:
+a5: qcom,a5@ac00000 {
+ cell-index = <0>;
+ compatible = "qcom,cam-a5";
+ reg = <0xac00000 0x6000>,
+ <0xac10000 0x8000>,
+ <0xac18000 0x3000>;
+ reg-names = "a5_qgic", "a5_sierra", "a5_csr";
+ interrupts = <0 463 0>;
+ interrupt-names = "a5";
+ regulator-names = "camss-vdd";
+ camss-vdd-supply = <&titan_top_gdsc>;
+ clock-names = "gcc_cam_ahb_clk",
+ "gcc_cam_axi_clk",
+ "soc_ahb_clk",
+ "cpas_ahb_clk",
+ "camnoc_axi_clk",
+ "icp_apb_clk",
+ "icp_atb_clk",
+ "icp_clk",
+ "icp_clk_src",
+ "icp_cti_clk",
+ "icp_ts_clk";
+ clocks = <&clock_gcc GCC_CAMERA_AHB_CLK>,
+ <&clock_gcc GCC_CAMERA_AXI_CLK>,
+ <&clock_camcc CAM_CC_SOC_AHB_CLK>,
+ <&clock_camcc CAM_CC_CPAS_AHB_CLK>,
+ <&clock_camcc CAM_CC_CAMNOC_AXI_CLK>,
+ <&clock_camcc CAM_CC_ICP_APB_CLK>,
+ <&clock_camcc CAM_CC_ICP_ATB_CLK>,
+ <&clock_camcc CAM_CC_ICP_CLK>,
+ <&clock_camcc CAM_CC_ICP_CLK_SRC>,
+ <&clock_camcc CAM_CC_ICP_CTI_CLK>,
+ <&clock_camcc CAM_CC_ICP_TS_CLK>;
+
+ clock-rates = <0 0 0 80000000 0 0 0 0 600000000 0 0>;
+ clock-cntl-level = "turbo";
+ fw_name = "CAMERA_ICP.elf";
+ /* "ubwc-cfg" is not used, even if defined the new property
+ tags will be priortized. If the new properties are not used
+ please specify "ubwc-cfg" in that case */
+ ubwc-ipe-fetch-cfg = <0x707b 0x7083>;
+ ubwc-ipe-write-cfg = <0x161ef 0x1620f>;
+ ubwc-bps-fetch-cfg = <0x707b 0x7083>
+ ubwc-bps-write-cfg = <0x161ef 0x1620f>;
+
+qcom,ipe0 {
+ cell-index = <0>;
+ compatible = "qcom,cam-ipe";
+ regulator-names = "ipe0-vdd";
+ ipe0-vdd-supply = <&ipe_0_gdsc>;
+ clock-names = "ipe_0_ahb_clk",
+ "ipe_0_areg_clk",
+ "ipe_0_axi_clk",
+ "ipe_0_clk",
+ "ipe_0_clk_src";
+ src-clock-name = "ipe_0_clk_src";
+ clocks = <&clock_camcc CAM_CC_IPE_0_AHB_CLK>,
+ <&clock_camcc CAM_CC_IPE_0_AREG_CLK>,
+ <&clock_camcc CAM_CC_IPE_0_AXI_CLK>,
+ <&clock_camcc CAM_CC_IPE_0_CLK>,
+ <&clock_camcc CAM_CC_IPE_0_CLK_SRC>;
+
+ clock-rates = <0 0 0 0 240000000>,
+ <0 0 0 0 404000000>,
+ <0 0 0 0 480000000>,
+ <0 0 0 0 538000000>,
+ <0 0 0 0 600000000>;
+ clock-cntl-level = "lowsvs", "svs",
+ "svs_l1", "nominal", "turbo";
+};
+
+qcom,ipe1 {
+ cell-index = <1>;
+ compatible = "qcom,cam-ipe";
+ regulator-names = "ipe1-vdd";
+ ipe1-vdd-supply = <&ipe_1_gdsc>;
+ clock-names = "ipe_1_ahb_clk",
+ "ipe_1_areg_clk",
+ "ipe_1_axi_clk",
+ "ipe_1_clk",
+ "ipe_1_clk_src";
+ src-clock-name = "ipe_1_clk_src";
+ clocks = <&clock_camcc CAM_CC_IPE_1_AHB_CLK>,
+ <&clock_camcc CAM_CC_IPE_1_AREG_CLK>,
+ <&clock_camcc CAM_CC_IPE_1_AXI_CLK>,
+ <&clock_camcc CAM_CC_IPE_1_CLK>,
+ <&clock_camcc CAM_CC_IPE_1_CLK_SRC>;
+
+ clock-rates = <0 0 0 0 240000000>,
+ <0 0 0 0 404000000>,
+ <0 0 0 0 480000000>,
+ <0 0 0 0 538000000>,
+ <0 0 0 0 600000000>;
+ clock-cntl-level = "lowsvs", "svs",
+ "svs_l1", "nominal", "turbo";
+};
+
+bps: qcom,bps {
+ cell-index = <0>;
+ compatible = "qcom,cam-bps";
+ regulator-names = "bps-vdd";
+ bps-vdd-supply = <&bps_gdsc>;
+ clock-names = "bps_ahb_clk",
+ "bps_areg_clk",
+ "bps_axi_clk",
+ "bps_clk",
+ "bps_clk_src";
+ src-clock-name = "bps_clk_src";
+ clocks = <&clock_camcc CAM_CC_BPS_AHB_CLK>,
+ <&clock_camcc CAM_CC_BPS_AREG_CLK>,
+ <&clock_camcc CAM_CC_BPS_AXI_CLK>,
+ <&clock_camcc CAM_CC_BPS_CLK>,
+ <&clock_camcc CAM_CC_BPS_CLK_SRC>;
+
+ clock-rates = <0 0 0 0 200000000>,
+ <0 0 0 0 404000000>,
+ <0 0 0 0 480000000>,
+ <0 0 0 0 600000000>,
+ <0 0 0 0 600000000>;
+ clock-cntl-level = "lowsvs", "svs",
+ "svs_l1", "nominal", "turbo";
+};
diff --git a/bindings/media/video/msm-cam-ife-csid.txt b/bindings/media/video/msm-cam-ife-csid.txt
new file mode 100644
index 00000000..9d1af952
--- /dev/null
+++ b/bindings/media/video/msm-cam-ife-csid.txt
@@ -0,0 +1,121 @@
+* Qualcomm Technologies, Inc. MSM Camera IFE CSID
+
+Camera IFE CSID device provides the definitions for enabling
+the IFE CSID hardware. It also provides the functions for the client
+to control the IFE CSID hardware.
+
+=======================
+Required Node Structure
+=======================
+The IFE CSID device is described in one level of the device node.
+
+======================================
+First Level Node - CAM IFE CSID device
+======================================
+- compatible
+ Usage: required
+ Value type: <string>
+ Definition: Should be "qcom,csid170", "qcom,csid175", "qcom,csid175_200",
+ "qcom,csid480", "qcom,csid-lite170", "qcom,csid-lite175"
+ or "qcom,csid-lite480".
+
+- cell-index
+ Usage: required
+ Value type: <u32>
+ Definition: Should specify the hardware index id.
+
+- reg-names
+ Usage: required
+ Value type: <string>
+ Definition: Should be "csid".
+
+- reg
+ Usage: required
+ Value type: <u32>
+ Definition: Register values.
+
+- interrupt-names
+ Usage: Required
+ Value type: <string>
+ Definition: Name of the interrupt.
+
+- interrupts
+ Usage: Required
+ Value type: <u32>
+ Definition: Interrupt associated with IFE CSID HW.
+
+- regulator-names
+ Usage: required
+ Value type: <string>
+ Definition: Name of the regulator resources for IFE CSID HW.
+
+- xxxx-supply
+ Usage: required
+ Value type: <phandle>
+ Definition: Regulator reference corresponding to the names listed in
+ "regulator-names".
+
+- clock-names
+ Usage: required
+ Value type: <string>
+ Definition: List of clock names required for IFE CSID HW.
+
+- clocks
+ Usage: required
+ Value type: <phandle>
+ Definition: List of clocks used for IFE CSID HW.
+
+- clock-rates
+ Usage: required
+ Value type: <u32>
+ Definition: List of clocks rates.
+
+- clock-cntl-level
+ Usage: required
+ Value type: <string>
+ Definition: All different clock level node can support.
+
+- src-clock-name
+ Usage: required
+ Value type: <string>
+ Definition: Source clock name.
+
+- clock-control-debugfs
+ Usage: optional
+ Value type: <string>
+ Definition: Enable/Disable clk rate control.
+
+Example:
+
+ qcom,csid0@acb3000 {
+ cell-index = <0>;
+ compatible = "qcom,csid480";
+ reg = <0xacb3000 0x1000>;
+ reg-names = "csid";
+ interrupts = <0 464 0>;
+ interrupt-names = "csid";
+ vdd-names = "camss", "ife0";
+ camss-supply = <&titan_top_gdsc>;
+ ife0-supply = <&ife_0_gdsc>;
+ clock-names = "soc_ahb_clk",
+ "cpas_ahb_clk",
+ "slow_ahb_clk_src",
+ "ife_clk",
+ "ife_clk_src",
+ "ife_csid_clk",
+ "ife_csid_clk_src",
+ "ife_cphy_rx_clk",
+ "cphy_rx_clk_src";
+ clocks = <&clock_camcc CAM_CC_SOC_AHB_CLK>,
+ <&clock_camcc CAM_CC_CPAS_AHB_CLK>,
+ <&clock_camcc CAM_CC_SLOW_AHB_CLK_SRC>,
+ <&clock_camcc CAM_CC_IFE_0_CLK>,
+ <&clock_camcc CAM_CC_IFE_0_CLK_SRC>,
+ <&clock_camcc CAM_CC_IFE_0_CSID_CLK>,
+ <&clock_camcc CAM_CC_IFE_0_CSID_CLK_SRC>,
+ <&clock_camcc CAM_CC_IFE_0_CPHY_RX_CLK>,
+ <&clock_camcc CAM_CC_CPHY_RX_CLK_SRC>;
+ clock-rates = <0 0 80000000 0 320000000 0 384000000 0 384000000>;
+ src-clock-name = "ife_csid_clk_src";
+ status = "ok";
+ };
diff --git a/bindings/media/video/msm-cam-isp.txt b/bindings/media/video/msm-cam-isp.txt
new file mode 100644
index 00000000..896eb9f4
--- /dev/null
+++ b/bindings/media/video/msm-cam-isp.txt
@@ -0,0 +1,36 @@
+* Qualcomm Technologies, Inc. MSM Camera ISP
+
+The MSM camera ISP driver provides the definitions for enabling
+the Camera ISP hadware. It provides the functions for the Client to
+control the ISP hardware.
+
+=======================
+Required Node Structure
+=======================
+The camera ISP device is described in one level of device node.
+
+==================================
+First Level Node - CAM ISP device
+==================================
+- compatible
+ Usage: required
+ Value type: <string>
+ Definition: Should be "qcom,cam-isp".
+
+- arch-compat
+ Usage: required
+ Value type: <string>
+ Definition: Should be "vfe" or "ife".
+
+- ubwc-static-cfg
+ Usage: optional
+ Value type: <u32>
+ Definition: IFE UBWC static configuration based on DDR device type.
+
+Example:
+
+ qcom,cam-isp {
+ compatible = "qcom,cam-isp";
+ arch-compat = "ife";
+ status = "ok";
+ };
diff --git a/bindings/media/video/msm-cam-jpeg.txt b/bindings/media/video/msm-cam-jpeg.txt
new file mode 100644
index 00000000..73e99b25
--- /dev/null
+++ b/bindings/media/video/msm-cam-jpeg.txt
@@ -0,0 +1,186 @@
+* Qualcomm Technologies, Inc. MSM Camera JPEG
+
+The MSM camera JPEG devices are implemented multiple device nodes.
+The root JPEG device node has properties defined to hint the driver
+about the number of Encoder and DMA nodes available during the
+probe sequence. Each node has multiple properties defined
+for interrupts, clocks and regulators.
+
+=======================
+Required Node Structure
+=======================
+JPEG root interface node takes care of the handling account for number
+of Encoder and DMA devices present on the hardware.
+
+- compatible
+ Usage: required
+ Value type: <string>
+ Definition: Should be "qcom,cam-jpeg".
+
+- compat-hw-name
+ Usage: required
+ Value type: <string>
+ Definition: Should be "qcom,jpegenc" or "qcom,jpegdma".
+
+- num-jpeg-enc
+ Usage: required
+ Value type: <u32>
+ Definition: Number of supported Encoder HW blocks.
+
+- num-jpeg-dma
+ Usage: required
+ Value type: <u32>
+ Definition: Number of supported DMA HW blocks.
+
+Example:
+ qcom,cam-jpeg {
+ compatible = "qcom,cam-jpeg";
+ compat-hw-name = "qcom,jpegenc",
+ "qcom,jpegdma";
+ num-jpeg-enc = <1>;
+ num-jpeg-dma = <1>;
+ status = "ok";
+ };
+
+
+=======================
+Required Node Structure
+=======================
+Encoder/DMA Nodes provide interface for JPEG driver about
+the device register map, interrupt map, clocks and regulators.
+
+- cell-index
+ Usage: required
+ Value type: <u32>
+ Definition: Node instance number.
+
+- compatible
+ Usage: required
+ Value type: <string>
+ Definition: Should be "qcom,cam_jpeg_enc".
+
+- reg-names
+ Usage: optional
+ Value type: <string>
+ Definition: Name of the register resources.
+
+- reg
+ Usage: optional
+ Value type: <u32>
+ Definition: Register values.
+
+- reg-cam-base
+ Usage: optional
+ Value type: <u32>
+ Definition: Offset of the register space compared to
+ to Camera base register space.
+
+- interrupt-names
+ Usage: optional
+ Value type: <string>
+ Definition: Name of the interrupt.
+
+- interrupts
+ Usage: optional
+ Value type: <u32>
+ Definition: Interrupt associated with JPEG HW.
+
+- regulator-names
+ Usage: required
+ Value type: <string>
+ Definition: Name of the regulator resources for JPEG HW.
+
+- camss-vdd-supply
+ Usage: required
+ Value type: <phandle>
+ Definition: Regulator reference corresponding to the names listed
+ in "regulator-names".
+
+- clock-names
+ Usage: required
+ Value type: <string>
+ Definition: List of clock names required for JPEG HW.
+
+- clocks
+ Usage: required
+ Value type: <phandle>
+ Definition: List of clocks used for JPEG HW.
+
+- clock-rates
+ Usage: required
+ Value type: <u32>
+ Definition: List of clocks rates.
+
+- src-clock-name
+ Usage: required
+ Value type: <string>
+ Definition: Source clock name.
+
+- clock-cntl-level
+ Usage: required
+ Value type: <string>
+ Definition: List of strings corresponds clock-rates levels.
+ Supported strings: minsvs, lowsvs, svs, svs_l1, nominal, turbo.
+
+Examples:
+ cam_jpeg_enc: qcom,jpegenc@ac4e000 {
+ cell-index = <0>;
+ compatible = "qcom,cam_jpeg_enc";
+ reg-names = "jpege_hw";
+ reg = <0xac4e000 0x4000>;
+ reg-cam-base = <0x4e000>;
+ interrupt-names = "jpeg";
+ interrupts = <0 474 0>;
+ regulator-names = "camss-vdd";
+ camss-vdd-supply = <&titan_top_gdsc>;
+ clock-names = "camera_ahb",
+ "camera_axi",
+ "soc_ahb_clk",
+ "cpas_ahb_clk",
+ "camnoc_axi_clk",
+ "jpegenc_clk_src",
+ "jpegenc_clk";
+ clocks = <&clock_gcc GCC_CAMERA_AHB_CLK>,
+ <&clock_gcc GCC_CAMERA_AXI_CLK>,
+ <&clock_camcc CAM_CC_SOC_AHB_CLK>,
+ <&clock_camcc CAM_CC_CPAS_AHB_CLK>,
+ <&clock_camcc CAM_CC_CAMNOC_AXI_CLK>,
+ <&clock_camcc CAM_CC_JPEG_CLK_SRC>,
+ <&clock_camcc CAM_CC_JPEG_CLK>;
+
+ clock-rates = <0 0 0 0 0 600000000 0>;
+ src-clock-name = "jpegenc_clk_src";
+ clock-cntl-level = "nominal";
+ status = "ok";
+ };
+
+ cam_jpeg_dma: qcom,jpegdma@0xac52000{
+ cell-index = <0>;
+ compatible = "qcom,cam_jpeg_dma";
+ reg-names = "jpegdma_hw";
+ reg = <0xac52000 0x4000>;
+ reg-cam-base = <0x52000>;
+ interrupt-names = "jpegdma";
+ interrupts = <0 475 0>;
+ regulator-names = "camss-vdd";
+ camss-vdd-supply = <&titan_top_gdsc>;
+ clock-names = "camera_ahb",
+ "camera_axi",
+ "soc_ahb_clk",
+ "cpas_ahb_clk",
+ "camnoc_axi_clk",
+ "jpegdma_clk_src",
+ "jpegdma_clk";
+ clocks = <&clock_gcc GCC_CAMERA_AHB_CLK>,
+ <&clock_gcc GCC_CAMERA_AXI_CLK>,
+ <&clock_camcc CAM_CC_SOC_AHB_CLK>,
+ <&clock_camcc CAM_CC_CPAS_AHB_CLK>,
+ <&clock_camcc CAM_CC_CAMNOC_AXI_CLK>,
+ <&clock_camcc CAM_CC_JPEG_CLK_SRC>,
+ <&clock_camcc CAM_CC_JPEG_CLK>;
+
+ clock-rates = <0 0 0 0 0 600000000 0>;
+ src-clock-name = "jpegdma_clk_src";
+ clock-cntl-level = "nominal";
+ status = "ok";
+ };
diff --git a/bindings/media/video/msm-cam-lrme.txt b/bindings/media/video/msm-cam-lrme.txt
new file mode 100644
index 00000000..409be3f0
--- /dev/null
+++ b/bindings/media/video/msm-cam-lrme.txt
@@ -0,0 +1,148 @@
+* Qualcomm Technologies, Inc. MSM Camera LRME
+
+The MSM camera Low Resolution Motion Estimation device provides dependency
+definitions for enabling Camera LRME HW. MSM camera LRME is implemented in
+multiple device nodes. The root LRME device node has properties defined to
+hint the driver about the LRME HW nodes available during the probe sequence.
+Each node has multiple properties defined for interrupts, clocks and
+regulators.
+
+=======================
+Required Node Structure
+=======================
+LRME root interface node takes care of the handling LRME high level
+driver handling and controls underlying LRME hardware present.
+
+- compatible
+ Usage: required
+ Value type: <string>
+ Definition: Should be "qcom,cam-lrme"
+
+- compat-hw-name
+ Usage: required
+ Value type: <string>
+ Definition: Should be "qcom,lrme"
+
+- num-lrme
+ Usage: required
+ Value type: <u32>
+ Definition: Number of supported LRME HW blocks
+
+Example:
+ qcom,cam-lrme {
+ compatible = "qcom,cam-lrme";
+ compat-hw-name = "qcom,lrme";
+ num-lrme = <1>;
+ };
+
+=======================
+Required Node Structure
+=======================
+LRME Node provides interface for Low Resolution Motion Estimation hardware
+driver about the device register map, interrupt map, clocks, regulators.
+
+- cell-index
+ Usage: required
+ Value type: <u32>
+ Definition: Node instance number
+
+- compatible
+ Usage: required
+ Value type: <string>
+ Definition: Should be "qcom,lrme"
+
+- reg-names
+ Usage: optional
+ Value type: <string>
+ Definition: Name of the register resources
+
+- reg
+ Usage: optional
+ Value type: <u32>
+ Definition: Register values
+
+- reg-cam-base
+ Usage: optional
+ Value type: <u32>
+ Definition: Offset of the register space compared to
+ to Camera base register space
+
+- interrupt-names
+ Usage: optional
+ Value type: <string>
+ Definition: Name of the interrupt
+
+- interrupts
+ Usage: optional
+ Value type: <u32>
+ Definition: Interrupt line associated with LRME HW
+
+- regulator-names
+ Usage: required
+ Value type: <string>
+ Definition: Name of the regulator resources for LRME HW
+
+- camss-supply
+ Usage: required
+ Value type: <phandle>
+ Definition: Regulator reference corresponding to the names listed
+ in "regulator-names"
+
+- clock-names
+ Usage: required
+ Value type: <string>
+ Definition: List of clock names required for LRME HW
+
+- clocks
+ Usage: required
+ Value type: <phandle>
+ Definition: List of clocks required for LRME HW
+
+- clock-rates
+ Usage: required
+ Value type: <u32>
+ Definition: List of clocks rates
+
+- clock-cntl-level
+ Usage: required
+ Value type: <string>
+ Definition: List of strings corresponds clock-rates levels
+ Supported strings: minsvs, lowsvs, svs, svs_l1, nominal, turbo
+
+- src-clock-name
+ Usage: required
+ Value type: <string>
+ Definition: Source clock name
+
+Examples:
+ cam_lrme: qcom,lrme@ac6b000 {
+ cell-index = <0>;
+ compatible = "qcom,lrme";
+ reg-names = "lrme";
+ reg = <0xac6b000 0xa00>;
+ reg-cam-base = <0x6b000>;
+ interrupt-names = "lrme";
+ interrupts = <0 476 0>;
+ regulator-names = "camss";
+ camss-supply = <&titan_top_gdsc>;
+ clock-names = "camera_ahb",
+ "camera_axi",
+ "soc_ahb_clk",
+ "cpas_ahb_clk",
+ "camnoc_axi_clk",
+ "lrme_clk_src",
+ "lrme_clk";
+ clocks = <&clock_gcc GCC_CAMERA_AHB_CLK>,
+ <&clock_gcc GCC_CAMERA_AXI_CLK>,
+ <&clock_camcc CAM_CC_SOC_AHB_CLK>,
+ <&clock_camcc CAM_CC_CPAS_AHB_CLK>,
+ <&clock_camcc CAM_CC_CAMNOC_AXI_CLK>,
+ <&clock_camcc CAM_CC_LRME_CLK_SRC>,
+ <&clock_camcc CAM_CC_LRME_CLK>;
+ clock-rates = <0 0 0 0 0 0 0>,
+ <0 0 0 0 0 19200000 19200000>,
+ <0 0 0 0 0 19200000 19200000>,
+ <0 0 0 0 0 19200000 19200000>;
+ clock-cntl-level = "lowsvs", "svs", "svs_l1", "turbo";
+ src-clock-name = "lrme_core_clk_src";
+ };
diff --git a/bindings/media/video/msm-cam-smmu.txt b/bindings/media/video/msm-cam-smmu.txt
new file mode 100644
index 00000000..eca2bd82
--- /dev/null
+++ b/bindings/media/video/msm-cam-smmu.txt
@@ -0,0 +1,142 @@
+* Qualcomm Technologies, Inc. MSM Camera SMMU
+
+The MSM camera SMMU device provides SMMU context bank definitions
+for all HW blocks that need to map IOVA to physical memory. These
+definitions consist of various properties that define how the
+IOVA address space is laid out for each HW block in the camera
+subsystem.
+
+=======================
+Required Node Structure
+=======================
+The camera SMMU device must be described in three levels of device nodes. The
+first level describes the overall SMMU device. Within it, second level nodes
+describe individual context banks that map different stream ids. There can
+also be second level nodes describing firmware device nodes. Each HW block
+such as IFE, ICP maps into these second level device nodes. All context bank
+specific properties that define how the IOVA is laid out is contained within
+third level device nodes within the second level device nodes.
+
+During the kernel initialization all the devices are probed recursively and
+a device pointer is created for each context bank keeping track of the IOVA
+mapping information.
+
+Duplicate regions of the same type are not allowed within the same
+context bank. All context banks must contain an IO region at the very least.
+
+==================================
+First Level Node - CAM SMMU device
+==================================
+- compatible
+ Usage: required
+ Value type: <string>
+ Definition: Should be "qcom,msm-cam-smmu".
+
+===================================================================
+Second Level Node - CAM SMMU context bank device or firmware device
+===================================================================
+- compatible
+ Usage: required
+ Value type: <string>
+ Definition: Should be "qcom,msm-cam-smmu-cb" or "qcom,msm-cam-smmu-fw-dev".
+
+- memory-region
+ Usage: optional
+ Value type: <phandle>
+ Definition: Should specify the phandle of the memory region for firmware.
+ allocation
+
+- iommus
+ Usage: required
+ Value type: <phandle u32 u32>
+ Definition: first cell is phandle of the iommu, second cell is stream id
+ and third cell is SMR mask.
+
+- label
+ Usage: required
+ Value type: <string>
+ Definition: Should specify a string label to identify the context bank.
+
+- qcom,secure-cb
+ Usage: optional
+ Value type: boolean
+ Definition: Specifies if the context bank is a secure context bank.
+
+=============================================
+Third Level Node - CAM SMMU memory map device
+=============================================
+- iova-region-name
+ Usage: required
+ Value type: <string>
+ Definition: Should specify a string label to identify the IOVA region.
+
+- iova-region-start
+ Usage: required
+ Value type: <u32>
+ Definition: Should specify start IOVA for region.
+
+- iova-region-len
+ Usage: required
+ Value type: <u32>
+ Definition: Should specify length for IOVA region.
+
+- iova-region-id
+ Usage: required
+ Value type: <u32>
+ Definition: Should specify the numerical identifier for IOVA region.
+ Allowed values are: 0x00 to 0x03
+ - Firmware region: 0x00
+ - Shared region: 0x01
+ - Scratch region: 0x02
+ - IO region: 0x03
+
+- iova-granularity
+ Usage: optional
+ Value type: <u32>
+ Definition: Should specify IOVA granularity for shared memory region.
+
+Example:
+ qcom,cam_smmu@0 {
+ compatible = "qcom,msm-cam-smmu";
+
+ msm_cam_smmu_icp {
+ compatible = "qcom,msm-cam-smmu-cb";
+ iommus = <&apps_smmu 0x1078>,
+ <&apps_smmu 0x1020>,
+ <&apps_smmu 0x1028>,
+ <&apps_smmu 0x1040>,
+ <&apps_smmu 0x1048>,
+ <&apps_smmu 0x1030>,
+ <&apps_smmu 0x1050>;
+ label = "icp";
+ icp_iova_mem_map: iova-mem-map {
+ iova-mem-region-firmware {
+ /* Firmware region is 5MB */
+ iova-region-name = "firmware";
+ iova-region-start = <0x0>;
+ iova-region-len = <0x500000>;
+ iova-region-id = <0x0>;
+ status = "ok";
+ };
+
+ iova-mem-region-shared {
+ /* Shared region is 100MB long */
+ iova-region-name = "shared";
+ iova-region-start = <0x7400000>;
+ iova-region-len = <0x6400000>;
+ iova-region-id = <0x1>;
+ iova-granularity = <0x15>;
+ status = "ok";
+ };
+
+ iova-mem-region-io {
+ /* IO region is approximately 3.5 GB */
+ iova-region-name = "io";
+ iova-region-start = <0xd800000>;
+ iova-region-len = <0xd2800000>;
+ iova-region-id = <0x3>;
+ status = "ok";
+ };
+ };
+ };
+ };
diff --git a/bindings/media/video/msm-cam-vfe.txt b/bindings/media/video/msm-cam-vfe.txt
new file mode 100644
index 00000000..576cce54
--- /dev/null
+++ b/bindings/media/video/msm-cam-vfe.txt
@@ -0,0 +1,146 @@
+* Qualcomm Technologies, Inc. MSM Camera VFE
+
+Camera VFE device provides the definitions for enabling
+the VFE hardware. It also provides the functions for the client
+to control the VFE hardware.
+
+=======================
+Required Node Structure
+=======================
+The VFE device is described in one level of the device node.
+
+======================================
+First Level Node - CAM VFE device
+======================================
+Required properties:
+- compatible
+ Usage: required
+ Value type: <string>
+ Definition: Should specify the compatibility string for matching the
+ driver. e.g. "qcom,vfe480", "qcom,vfe175", "qcom,vfe170", "qcom,vfe175_130",
+ "qcom,vfe-lite480", "qcom,vfe-lite175", "qcom,vfe-lite175_130", "qcom,vfe-lite170".
+
+- cell-index
+ Usage: required
+ Value type: <u32>
+ Definition: Should specify the hardware index id.
+
+- reg-names
+ Usage: required
+ Value type: <string>
+ Definition: Should specify the name of the register block.
+
+- reg
+ Usage: required
+ Value type: <u32>
+ Definition: Register values.
+
+- interrupt-names
+ Usage: Required
+ Value type: <string>
+ Definition: Name of the interrupt.
+
+- interrupts
+ Usage: Required
+ Value type: <u32>
+ Definition: Interrupt associated with VFE HW.
+
+- regulator-names
+ Usage: required
+ Value type: <string>
+ Definition: Name of the regulator resources for VFE HW.
+
+- xxxx-supply
+ Usage: required
+ Value type: <phandle>
+ Definition: Regulator reference corresponding to the names listed in
+ "regulator-names".
+
+- clock-names
+ Usage: required
+ Value type: <string>
+ Definition: List of clock names required for VFE HW.
+
+- clocks
+ Usage: required
+ Value type: <phandle>
+ Definition: List of clocks used for VFE HW.
+
+- clock-rates
+ Usage: required
+ Value type: <u32>
+ Definition: List of clocks rates.
+
+- src-clock-name
+ Usage: required
+ Value type: <string>
+ Definition: Source clock name.
+
+Optional properties:
+- clock-names-option
+ Usage: optional
+ Value type: <string>
+ Definition: Optional clock names.
+
+- clocks-option
+ Usage: required if clock-names-option defined
+ Value type: <phandle>
+ Definition: List of optinal clocks used for VFE HW.
+
+- clock-rates-option
+ Usage: required if clock-names-option defined
+ Value type: <u32>
+ Definition: List of clocks rates for optional clocks.
+
+- clock-control-debugfs
+ Usage: optional
+ Value type: <string>
+ Definition: Enable/Disable clk rate control.
+
+- qcom,cam-cx-ipeak:
+ Usage: optional
+ Value type: <phandle bit>
+ phandle - phandle of CX Ipeak device node
+ bit - Every bit corresponds to a client of CX Ipeak
+ Definition: CX Ipeak is a mitigation scheme which throttles camera frequency
+ if all the clients are running at their respective threshold
+ frequencies to limit CX peak current.
+ driver in the relevant register.
+
+Example:
+ qcom,vfe0@acaf000 {
+ cell-index = <0>;
+ compatible = "qcom,vfe480";
+ reg-names = "ife";
+ reg = <0xacaf000 0x4000>;
+ interrupts = <0 465 0>;
+ interrupt-names = "ife";
+ vdd-names = "camss-vdd", "ife0-vdd";
+ camss-vdd-supply = <&titan_top_gdsc>;
+ ife0-vdd-supply = <&ife_0_gdsc>;
+ clock-names = "soc_ahb_clk",
+ "cpas_ahb_clk",
+ "slow_ahb_clk_src",
+ "ife_clk",
+ "ife_clk_src",
+ "ife_csid_clk",
+ "ife_csid_clk_src",
+ "camnoc_axi_clk",
+ "ife_axi_clk",
+ clocks = <&clock_camcc CAM_CC_SOC_AHB_CLK>,
+ <&clock_camcc CAM_CC_CPAS_AHB_CLK>,
+ <&clock_camcc CAM_CC_SLOW_AHB_CLK_SRC>,
+ <&clock_camcc CAM_CC_IFE_0_CLK>,
+ <&clock_camcc CAM_CC_IFE_0_CLK_SRC>,
+ <&clock_camcc CAM_CC_IFE_0_CSID_CLK>,
+ <&clock_camcc CAM_CC_IFE_0_CSID_CLK_SRC>,
+ <&clock_camcc CAM_CC_CAMNOC_AXI_CLK>,
+ <&clock_camcc CAM_CC_IFE_0_AXI_CLK>,
+ clock-rates = <0 0 80000000 0 320000000 0 384000000 0 0 0>;
+ src-clock-name = "ife_clk_src";
+ clock-names-option = "ife_dsp_clk";
+ clocks-option = <&clock_camcc CAM_CC_IFE_0_DSP_CLK>;
+ clock-rates-option = <600000000>;
+ qcom,cam-cx-ipeak = <&cx_ipeak_lm 2>;
+ status = "ok";
+ };
diff --git a/bindings/media/video/msm-camera-flash.txt b/bindings/media/video/msm-camera-flash.txt
new file mode 100644
index 00000000..ab81329d
--- /dev/null
+++ b/bindings/media/video/msm-camera-flash.txt
@@ -0,0 +1,132 @@
+* Qualcomm Technologies, Inc. MSM FLASH
+
+The MSM camera Flash driver provides the definitions for
+enabling and disabling LED Torch/Flash by requesting it to
+PMIC/I2C/GPIO based hardware. It provides the functions for
+the Client to control the Flash hardware.
+
+=======================================================
+Required Node Structure
+=======================================================
+The Flash device is described in one level of the device node.
+
+======================================
+First Level Node - CAM FLASH device
+======================================
+- compatible
+ Usage: required
+ Value type: <string>
+ Definition: Should be "qcom,camera-flash".
+
+- cell-index
+ Usage: required
+ Value type: <u32>
+ Definition: Should specify the hardware index id.
+
+- reg
+ Usage: required
+ Value type: <u32>
+ Definition: Register values.
+
+- flash-source
+ Usage: required
+ Value type: <phandle>
+ Definition: Should contain array of phandles to Flash source nodes.
+
+- torch-source
+ Usage: required
+ Value type: <phandle>
+ Definition: Should contain array of phandles to torch source nodes.
+
+- switch-source
+ Usage: Optional
+ Value type: <phandle>
+ Definition: Should contain phandle to switch source nodes.
+
+- slave-id
+ Usage: optional
+ Value type: <u32>
+ Definition: should contain i2c slave address, device id address
+ and expected id read value.
+
+- cci-master
+ Usage: optional
+ Value type: <u32>
+ Definition: should contain i2c master id to be used for this camera
+ flash.
+
+- max-current
+ Usage: optional
+ Value type: <u32>
+ Definition: Max current in mA supported by flash
+
+- max-duration
+ Usage: optional
+ Value type: <u32>
+ Definition: Max duration in ms flash can glow.
+
+- wled-flash-support
+ Usage: optional
+ Value type: <boolean>
+ Definition: To identity wled flash hardware support.
+
+- gpios
+ Usage: optional
+ Value type: <u32>
+ Definition: should specify the gpios to be used for the flash.
+
+- gpio-req-tbl-num
+ Usage: optional
+ Value type: <u32>
+ Definition: should specify the gpio table index.
+
+- gpio-req-tbl-flags
+ Usage: optional
+ Value type: <u32>
+ Definition: should specify the gpio functions.
+
+- gpio-req-tbl-label
+ Usage: optional
+ Value type: <u32>
+ Definition: should specify the gpio labels.
+
+- gpio-flash-reset
+ Usage: optional
+ Value type: <u32>
+ Definition: should contain index to gpio used by flash's "flash reset" pin.
+
+- gpio-flash-en
+ Usage: optional
+ Value type: <u32>
+ Definition: should contain index to gpio used by flash's "flash enable" pin.
+
+- gpio-flash-now
+ Usage: optional
+ Value type: <u32>
+ Definition: should contain index to gpio used by flash's "flash now" pin.
+
+Example:
+
+led_flash_rear: qcom,camera-flash@0 {
+ reg = <0x00 0x00>;
+ cell-index = <0>;
+ compatible = "qcom,camera-flash";
+ flash-source = <&pmi8998_flash0 &pmi8998_flash1>;
+ torch-source = <&pmi8998_torch0 &pmi8998_torch1>;
+ switch-source = <&pmi8998_switch0>;
+ wled-flash-support;
+ qcom,slave-id = <0x00 0x00 0x0011>;
+ qcom,cci-master = <0>;
+ gpios = <&msmgpio 23 0>,
+ <&msmgpio 24 0>;
+ <&msmgpio 25 0>;
+ qcom,gpio-flash-reset = <0>;
+ qcom,gpio-flash-en = <0>;
+ qcom,gpio-flash-now = <1>;
+ qcom,gpio-req-tbl-num = <0 1>;
+ qcom,gpio-req-tbl-flags = <0 0>;
+ qcom,gpio-req-tbl-label = "FLASH_EN",
+ "FLASH_NOW";
+ qcom,max-current = <1500>;
+ qcom,max-duration = <1200>;
+ };
diff --git a/bindings/media/video/msm-camera.txt b/bindings/media/video/msm-camera.txt
new file mode 100644
index 00000000..04548caa
--- /dev/null
+++ b/bindings/media/video/msm-camera.txt
@@ -0,0 +1,13 @@
+* Qualcomm Technologies, Inc. MSM Camera
+
+Required properties:
+- compatible :
+ - "qcom,cam-req-mgr"
+- qcom,sensor-manual-probe : specify if sensor probes at kernel boot time or user driven
+
+Example:
+
+ qcom,cam-req-mgr {
+ compatible = "qcom,cam-req-mgr";
+ qcom,sensor-manual-probe;
+ };
diff --git a/bindings/media/video/msm-cvp.txt b/bindings/media/video/msm-cvp.txt
new file mode 100644
index 00000000..3cf63676
--- /dev/null
+++ b/bindings/media/video/msm-cvp.txt
@@ -0,0 +1,152 @@
+* Qualcomm Technologies, Inc. MSM CVP
+
+[Root level node]
+cvp
+=====
+Required properties:
+- compatible : one of:
+ - "qcom,msm-cvp"
+ - "qcom,kona-cvp" : Invokes driver specific data for Kona.
+
+Optional properties:
+- reg : offset and length of the CSR register set for the device.
+- interrupts : should contain the cvp interrupt.
+- qcom,reg-presets : list of offset-value pairs for registers to be written.
+ The offsets are from the base offset specified in 'reg'. This is mainly
+ used for QoS, VBIF, etc. presets for video.
+- qcom,qdss-presets : list of physical address and memory allocation size pairs.
+ when fw_debug_mode is set as HFI_DEBUG_MODE_QDSS, all firmware messages will be
+ written to QDSS memory.
+- *-supply: A phandle pointing to the appropriate regulator. Number of
+ regulators vary across targets.
+- clock-names: an array of clocks that the driver is supposed to be
+ manipulating. The clocks names here correspond to the clock names used in
+ clk_get(<name>).
+- qcom,clock-configs = an array of bitmaps of clocks' configurations. The index
+ of the bitmap corresponds to the clock at the same index in qcom,clock-names.
+ The bitmaps describes the actions that the device needs to take regarding the
+ clock (i.e. scale it based on load).
+
+ The bitmap is defined as:
+ scalable = 0x1 (if the driver should vary the clock's frequency based on load)
+- qcom,allowed-clock-rates = an array of supported clock rates by the chipset.
+- qcom,use-non-secure-pil = A bool indicating which type of pil to use to load
+ the fw.
+- qcom,fw-bias = The address at which cvp fw is loaded (manually).
+
+[Second level nodes]
+Context Banks
+=============
+Required properties:
+- compatible : one of:
+ - "qcom,msm-cvp,context-bank"
+- iommus : A phandle parsed by smmu driver. Number of entries will vary
+ across targets.
+
+Optional properties:
+- label - string describing iommu domain usage.
+- buffer-types : bitmap of buffer types that can be mapped into the current
+ IOMMU domain.
+ - Buffer types are defined as the following:
+ input = 0x1
+ output = 0x2
+ output2 = 0x4
+ extradata input = 0x8
+ extradata output = 0x10
+ extradata output2 = 0x20
+ internal scratch = 0x40
+ internal scratch1 = 0x80
+ internal scratch2 = 0x100
+ internal persist = 0x200
+ internal persist1 = 0x400
+ internal cmd queue = 0x800
+- virtual-addr-pool : offset and length of virtual address pool.
+- qcom,fw-context-bank : bool indicating firmware context bank.
+- qcom,secure-context-bank : bool indicating secure context bank.
+
+Buses
+=====
+Required properties:
+- compatible : one of:
+ - "qcom,msm-cvp,bus"
+- label : an arbitrary name
+- qcom,bus-master : an integer descriptor of the bus master. Refer to arch/arm/\
+ boot/dts/include/dt-bindings/msm/msm-bus-ids.h for list of acceptable masters
+- qcom,bus-slave : an integer descriptor of the bus slave. Refer to arch/arm/\
+ boot/dts/include/dt-bindings/msm/msm-bus-ids.h for list of acceptable slaves
+
+Optional properties:
+- qcom,bus-governor : governor to use when scaling bus, generally any commonly
+ found devfreq governor might be used. In addition to those governors, the
+ custom Venus governors, "msm-vidc-ddr" or "msm-vidc-llcc" are also
+ acceptable values.
+ In the absence of this property the "performance" governor is used.
+- qcom,bus-rage-kbps : an array of two items (<min max>) that indicate the
+ minimum and maximum acceptable votes for the bus.
+ In the absence of this property <0 INT_MAX> is used.
+- qcom,ubwc-10bit : UBWC 10 bit content has different bus requirements,
+ this tag will be used to pick the appropriate bus as per the session profile
+ as shown below in example.
+
+Memory Heaps
+============
+Required properties:
+- compatible : one of:
+ - "qcom,msm-vidc,mem-cdsp"
+- memory-region : phandle to the memory heap/region.
+
+Example:
+ msm_cvp: qcom,cvp@ab00000 {
+ compatible = "qcom,msm-cvp", "qcom,kona-cvp";
+ status = "ok";
+ reg = <0xab00000 0x100000>;
+ interrupts = <GIC_SPI 234 IRQ_TYPE_LEVEL_HIGH>;
+
+ /* FIXME: LLCC Info */
+ /* cache-slice-names = "vidsc0", "vidsc1"; */
+ /* cache-slices = <&llcc 2>, <&llcc 3>; */
+
+ /* Supply */
+ cvp-supply = <&mvs1_gdsc>;
+
+ /* Clocks */
+ clock-names = "gcc_video_axi0",
+ "gcc_video_axi1", "cvp_clk";
+ clocks = <&clock_gcc GCC_VIDEO_AXI0_CLK>,
+ <&clock_gcc GCC_VIDEO_AXI1_CLK>,
+ <&clock_videocc VIDEO_CC_MVS1_CLK>;
+ qcom,proxy-clock-names = "gcc_video_axi0", "gcc_video_axi1",
+ "cvp_clk";
+
+ qcom,clock-configs = <0x0 0x0 0x1>;
+ qcom,allowed-clock-rates = <403000000 520000000
+ 549000000 666000000 800000000>;
+
+ /* Buses */
+ bus_cnoc {
+ compatible = "qcom,msm-cvp,bus";
+ label = "cnoc";
+ qcom,bus-master = <MSM_BUS_MASTER_AMPSS_M0>;
+ qcom,bus-slave = <MSM_BUS_SLAVE_VENUS_CFG>;
+ qcom,bus-governor = "performance";
+ qcom,bus-range-kbps = <1000 1000>;
+ };
+
+ /* MMUs */
+ non_secure_cb {
+ compatible = "qcom,msm-cvp,context-bank";
+ label = "cvp_hlos";
+ iommus =
+ <&apps_smmu 0x2120 0x400>;
+ qcom,iommu-dma = "disabled";
+ buffer-types = <0xfff>;
+ virtual-addr-pool = <0x4b000000 0xe0000000>;
+ };
+
+ /* Memory Heaps */
+ qcom,msm-cvp,mem_cdsp {
+ compatible = "qcom,msm-cvp,mem-cdsp";
+ memory-region = <&cdsp_mem>;
+ };
+ };
+
diff --git a/bindings/media/video/msm-sde-rotator.txt b/bindings/media/video/msm-sde-rotator.txt
new file mode 100644
index 00000000..5a92bf6e
--- /dev/null
+++ b/bindings/media/video/msm-sde-rotator.txt
@@ -0,0 +1,233 @@
+SDE Rotator
+
+SDE rotator is a v4l2 rotator driver, which manages the rotator hw
+block inside the Snapdragon Display Engine (or Mobile Display Subsystem)
+
+Required properties
+- compatible: Must be "qcom,sde-rotator".
+- reg: offset and length of the register set for the device.
+- reg-names: names to refer to register sets related to this device
+- interrupt-parent: phandle for the interrupt controller that
+ services interrupts for this device.
+- interrupts: Interrupt associated with rotator.
+- <name>-supply: Phandle for <name> regulator device node.
+- qcom,supply-names: names to refer to regulator device node.
+- clocks: List of Phandles for clock device nodes
+ needed by the device.
+- clock-names: List of clock names needed by the device.
+- #list-cells: Number of rotator cells, must be 1
+
+Bus Scaling Data:
+- qcom,msm-bus,name: String property describing rotator client.
+- qcom,msm-bus,num-cases: This is the the number of Bus Scaling use cases
+ defined in the vectors property. This must be
+ set to <3> for rotator driver where use-case 0 is
+ used to take off rotator BW votes from the system.
+ And use-case 1 & 2 are used in ping-pong fashion
+ to generate run-time BW requests.
+- qcom,msm-bus,num-paths: This represents the number of paths in each
+ Bus Scaling Usecase. This value depends on
+ how many number of AXI master ports are
+ dedicated to rotator for particular chipset.
+- qcom,msm-bus,vectors-KBps: * A series of 4 cell properties, with a format
+ of (src, dst, ab, ib) which is defined at
+ Documentation/devicetree/bindings/arm/msm/msm_bus.txt
+ * Current values of src & dst are defined at
+ include/linux/msm-bus-board.h
+ src values allowed for rotator are:
+ 25 = MSM_BUS_MASTER_ROTATOR
+ dst values allowed for rotator are:
+ 512 = MSM_BUS_SLAVE_EBI_CH0
+ ab: Represents aggregated bandwidth.
+ ib: Represents instantaneous bandwidth.
+ * Total number of 4 cell properties will be
+ (number of use-cases * number of paths).
+ * These values will be overridden by the driver
+ based on the run-time requirements. So initial
+ ab and ib values defined here are random and
+ bare no logic except for the use-case 0 where ab
+ and ib values needs to be 0.
+ * Define realtime vector properties followed by
+ non-realtime vector properties.
+
+Optional properties
+- qcom,rot-vbif-settings: Array with key-value pairs of constant VBIF register
+ settings used to setup MDSS QoS for optimum performance.
+ The key used should be offset from "rot_vbif_phys" register
+ defined in reg property.
+- qcom,mdss-rot-block-size: This integer value indicates the size of a memory block
+ (in pixels) to be used by the rotator. If this property
+ is not specified, then a default value of 128 pixels
+ would be used.
+- qcom,mdss-highest-bank-bit: This integer value indicate tile format as opposed to usual
+ linear format. The value tells the GPU highest memory
+ bank bit used.
+- qcom,mdss-default-ot-wr-limit: This integer value indicates maximum number of pending
+ writes that can be allowed on each WR xin.
+ This value can be used to reduce the pending writes
+ limit and can be tuned to match performance
+ requirements depending upon system state.
+ Some platforms require a dynamic ot limiting in
+ some cases. Setting this default ot write limit
+ will enable this dynamic limiting for the write
+ operations in the platforms that require these
+ limits.
+- qcom,mdss-default-ot-rd-limit: This integer value indicates the default number of pending
+ reads that can be allowed on each RD xin.
+ Some platforms require a dynamic ot limiting in
+ some cases. Setting this default ot read limit
+ will enable this dynamic limiting for the read
+ operations in the platforms that require these
+ limits.
+- qcom,mdss-rot-vbif-qos-setting: This array is used to program vbif qos remapper register
+ priority for rotator clients.
+- qcom,mdss-rot-vbif-memtype: Array of u32 vbif memory type settings for each xin port.
+- qcom,mdss-rot-cdp-setting: Integer array of size two, to indicate client driven
+ prefetch is available or not. Index 0 represents
+ if CDP is enabled for read and index 1, if CDP
+ is enabled for write operation.
+- qcom,mdss-rot-qos-lut A 4 cell property with the format of <rd_lut_0,
+ rd_lut_1, wr_lut_0, wr_lut_1> indicating the qos
+ lut settings for the rotator sspp and writeback
+ client.
+- qcom,mdss-rot-danger-lut A two cell property with the format of <rd_lut,
+ wr_lut> indicating the danger lut settings for
+ the rotator sspp and writeback client.
+- qcom,mdss-rot-safe-lut A two cell property with the format of <rd_lut,
+ wr_lut> indicating the safe lut settings for the
+ rotator sspp and writeback client.
+- qcom,mdss-inline-rot-qos-lut: A 4 cell property with the format of <rd_lut_0,
+ rd_lut_1, wr_lut_0, wr_lut_1> indicating the qos
+ lut settings for the inline rotator sspp and
+ writeback client.
+- qcom,mdss-inline-rot-danger-lut: A two cell property with the format of
+ <rd_lut, wr_lut> indicating the danger lut
+ settings for the inline rotator sspp and
+ writeback client.
+- qcom,mdss-inline-rot-safe-lut: A two cell property with the format of
+ <rd_lut, wr_lut> indicating the safe lut
+ settings for the inline rotator sspp and
+ writeback client.
+- qcom,mdss-rot-qos-cpu-mask: A u32 value indicating desired PM QoS CPU
+ affine mask.
+- qcom,mdss-rot-qos-cpu-dma-latency: A u32 value indicating desired PM QoS CPU DMA
+ latency in usec.
+- qcom,mdss-rot-mode: This is integer value indicates operation mode
+ of the rotator device
+- qcom,mdss-sbuf-headroom: This integer value indicates stream buffer headroom in lines.
+- qcom,mdss-rot-linewidth: This integer value indicates rotator line width supported in pixels.
+- cache-slice-names: A set of names that identify the usecase names of a client that uses
+ cache slice. These strings are used to look up the cache slice
+ entries by name.
+- cache-slices: The tuple has phandle to llcc device as the first argument and the
+ second argument is the usecase id of the client.
+- qcom,sde-ubwc-malsize: A u32 property to specify the default UBWC
+ minimum allowable length configuration value.
+- qcom,sde-ubwc-swizzle: A u32 property to specify the default UBWC
+ swizzle configuration value.
+- qcom,rot-reg-bus: Property to provide Bus scaling for register
+ access for rotator blocks.
+- power-domains: A phandle to respective power domain node.
+
+Subnode properties:
+- compatible: Compatible name used in smmu v2.
+ smmu_v2 names should be:
+ "qcom,smmu_sde_rot_unsec"- smmu context bank device for
+ unsecure rotation domain.
+ "qcom,smmu_sde_rot_sec" - smmu context bank device for
+ secure rotation domain.
+- iommus: specifies the SID's used by this context bank
+- gdsc-mdss-supply: Phandle for mdss supply regulator device node.
+- clocks: List of Phandles for clock device nodes
+ needed by the device.
+- clock-names: List of clock names needed by the device.
+
+
+Example:
+ mdss_rotator: qcom,mdss_rotator {
+ compatible = "qcom,sde_rotator";
+ reg = <0xfd900000 0x22100>,
+ <0xfd925000 0x1000>;
+ reg-names = "mdp_phys", "rot_vbif_phys";
+
+ #list-cells = <1>;
+
+ interrupt-parent = <&mdss_mdp>;
+ interrupts = <2 0>;
+
+ power-domains = <&mdss_mdp>;
+
+ qcom,mdss-mdp-reg-offset = <0x00001000>;
+
+ rot-vdd-supply = <&gdsc_mdss>;
+ qcom,supply-names = "rot-vdd";
+
+ clocks = <&clock_mmss clk_mmss_mdss_ahb_clk>,
+ <&clock_mmss clk_mmss_mdss_rot_clk>;
+ clock-names = "iface_clk", "rot_core_clk";
+
+ qcom,mdss-highest-bank-bit = <0x2>;
+ qcom,sde-ubwc-malsize = <0>;
+ qcom,sde-ubwc-swizzle = <1>;
+
+ /* Bus Scale Settings */
+ qcom,msm-bus,name = "mdss_rotator";
+ qcom,msm-bus,num-cases = <3>;
+ qcom,msm-bus,num-paths = <1>;
+ qcom,msm-bus,vectors-KBps =
+ <25 512 0 0>,
+ <25 512 0 6400000>,
+ <25 512 0 6400000>;
+
+ /* VBIF QoS remapper settings*/
+ qcom,mdss-rot-vbif-qos-setting = <1 1 1 1>;
+ qcom,mdss-rot-vbif-memtype = <3 3>;
+
+ com,mdss-rot-cdp-setting = <1 1>;
+
+ qcom,mdss-default-ot-rd-limit = <8>;
+ qcom,mdss-default-ot-wr-limit = <16>;
+
+ qcom,mdss-rot-qos-lut = <0x0 0x0 0x0 0x0>;
+ qcom,mdss-rot-danger-lut = <0x0 0x0>;
+ qcom,mdss-rot-safe-lut = <0x0000ffff 0x0>;
+
+ qcom,mdss-rot-qos-cpu-mask = <0xf>;
+ qcom,mdss-rot-qos-cpu-dma-latency = <75>;
+
+ qcom,mdss-inline-rot-qos-lut = <0x0 0x0 0x00112233 0x44556677>;
+ qcom,mdss-inline-rot-danger-lut = <0x0 0x0000ffff>;
+ qcom,mdss-inline-rot-safe-lut = <0x0 0x0000ff00>;
+
+ qcom,mdss-sbuf-headroom = <20>;
+ cache-slice-names = "rotator";
+ cache-slices = <&llcc 4>;
+
+ rot_reg: qcom,rot-reg-bus {
+ qcom,msm-bus,name = "mdss_rot_reg";
+ qcom,msm-bus,num-cases = <2>;
+ qcom,msm-bus,num-paths = <1>;
+ qcom,msm-bus,active-only;
+ qcom,msm-bus,vectors-KBps =
+ <1 590 0 0>,
+ <1 590 0 76800>;
+ };
+
+ smmu_rot_unsec: qcom,smmu_rot_unsec_cb {
+ compatible = "qcom,smmu_sde_rot_unsec";
+ iommus = <&mdp_smmu 0xe00>;
+ gdsc-mdss-supply = <&gdsc_bimc_smmu>;
+ clocks = <&clock_mmss clk_bimc_smmu_ahb_clk>,
+ <&clock_mmss clk_bimc_smmu_axi_clk>;
+ clock-names = "rot_ahb_clk", "rot_axi_clk";
+ };
+
+ smmu_sde_rot_sec: qcom,smmu_sde_rot_sec_cb {
+ compatible = "qcom,smmu_sde_rot_sec";
+ iommus = <&mmss_smmu 0xe01>;
+ gdsc-mdss-supply = <&gdsc_bimc_smmu>;
+ clocks = <&clock_mmss clk_bimc_smmu_ahb_clk>,
+ <&clock_mmss clk_bimc_smmu_axi_clk>;
+ clock-names = "rot_ahb_clk", "rot_axi_clk";
+ };
+ };
diff --git a/bindings/media/video/msm-vidc-bus.txt b/bindings/media/video/msm-vidc-bus.txt
new file mode 100644
index 00000000..1d4056fa
--- /dev/null
+++ b/bindings/media/video/msm-vidc-bus.txt
@@ -0,0 +1,49 @@
+* Qualcomm Technologies Inc MSM VIDC BUS
+
+Required properties:
+- compatible : "qcom,msm-vidc,governor,table"
+- name : name of the governor.
+- qcom,bus-table : node containing individual domain nodes, each with:
+ - qcom,codec-mask: a bitmap of supported codec types, every two bits
+ represents a codec type.
+ - qcom,load-busfreq-tbl: load (in macroblocks/sec) and the corresponding
+ bus frequency (in KBps) table.
+
+Optional properties:
+- qcom,low-power-mode: a boolean which indicates whether bus profile need
+ to be used when client enables low-power mode.
+- qcom,ubwc-mode: a boolean which indicates whether the bus profile need
+ to be used when client enables UBWC mode.
+
+Example:
+
+venus-bus-gov {
+ compatible = "qcom,msm-vidc,governor,table";
+ name = "qcom,venus-gov";
+ qcom,bus-freq-table {
+ qcom,profile-dec {
+ qcom,codec-mask = <0xffffffff>;
+ qcom,ubwc-mode;
+ qcom,load-busfreq-tbl =
+ <489600 1205248>, /* 1080p60D */
+ <244800 618496>, /* 1080p30D */
+ <216000 618496>, /* 720p60D */
+ <108000 314368>, /* 720p30D */
+ <72000 233472>, /* VGA60D */
+ <36000 118784>, /* VGA30D */
+ <0 0>;
+ };
+ qcom,profile-enc {
+ qcom,codec-mask = <0x55555555>;
+ qcom,low-power-mode;
+ qcom,load-busfreq-tbl =
+ <244800 787456>, /* 1080p30E */
+ <216000 350208>, /* 720p60E */
+ <108000 350208>, /* 720p30E */
+ <72000 350208>, /* VGA60E */
+ <36000 136806>, /* VGA30E */
+ <0 0>;
+ };
+ };
+};
+
diff --git a/bindings/media/video/msm-vidc.txt b/bindings/media/video/msm-vidc.txt
new file mode 100644
index 00000000..67c5da2b
--- /dev/null
+++ b/bindings/media/video/msm-vidc.txt
@@ -0,0 +1,188 @@
+* Qualcomm Technologies, Inc. MSM VIDC
+
+[Root level node]
+Venus
+=====
+Required properties:
+- compatible : one of:
+ - "qcom,msm-vidc"
+ - "qcom,kona-vidc" : Invokes driver specific data for KONA.
+ - "qcom,lito-vidc" : Invokes driver specific data for LITO.
+
+Optional properties:
+- reg : offset and length of the register set for the device.
+- sku-index : sku version of the hardware.
+- interrupts : should contain the vidc interrupt.
+- qcom,reg-presets : list of offset-value pairs for registers to be written.
+ The offsets are from the base offset specified in 'reg'. This is mainly
+ used for QoS, VBIF, etc. presets for video.
+- qcom,qdss-presets : list of physical address and memory allocation size pairs.
+ when fw_debug_mode is set as HFI_DEBUG_MODE_QDSS, all firmware messages will be
+ written to QDSS memory.
+- *-supply: A phandle pointing to the appropriate regulator. Number of
+ regulators vary across targets.
+- clock-names: an array of clocks that the driver is supposed to be
+ manipulating. The clocks names here correspond to the clock names used in
+ clk_get(<name>).
+- qcom,clock-configs = an array of bitmaps of clocks' configurations. The index
+ of the bitmap corresponds to the clock at the same index in qcom,clock-names.
+ The bitmaps describes the actions that the device needs to take regarding the
+ clock (i.e. scale it based on load).
+
+ The bitmap is defined as:
+ scalable = 0x1 (if the driver should vary the clock's frequency based on load)
+- qcom,allowed-clock-rates = an array of supported clock rates by the chipset.
+- qcom,clock-freq-tbl = node containing individual domain nodes, each with:
+ - qcom,codec-mask: a bitmap of supported codec types, every two bits
+ represents a codec type.
+ supports mvc encoder = 0x00000001
+ supports mvc decoder = 0x00000003
+ supports h264 encoder = 0x00000004
+ supports h264 decoder = 0x0000000c
+ supports mpeg1 encoder = 0x00000040
+ supports mpeg1 decoder = 0x000000c0
+ supports mpeg2 encoder = 0x00000100
+ supports mpeg2 decoder = 0x00000300
+ supports vp6 encoder = 0x00100000
+ supports vp6 decoder = 0x00300000
+ supports vp7 encoder = 0x00400000
+ supports vp7 decoder = 0x00c00000
+ supports vp8 encoder = 0x01000000
+ supports vp8 decoder = 0x03000000
+ supports hevc encoder = 0x04000000
+ supports hevc decoder = 0x0c000000
+ - qcom,cycles-per-mb: number of cycles required to process each macro
+ block.
+ - qcom,low-power-cycles-per-mb: number of cycles required to process each
+ macro block in low power mode.
+ the required frequency to get the final frequency, the factor is
+ represented in Q16 format.
+- qcom,vidc-iommu-domains = node containing individual domain nodes, each with:
+ - a unique domain name for the domain node (e.g vidc,domain-ns)
+ - qcom,vidc-domain-phandle: phandle for the domain as defined in
+ <target>-iommu-domains.dtsi (e.g msm8974-v1-iommu-domains.dtsi)
+ - qcom,vidc-buffer-types: bitmap of buffer types that can be mapped into each
+ IOMMU domain.
+ - Buffer types are defined as the following:
+ input = 0x1
+ output = 0x2
+ output2 = 0x4
+ extradata input = 0x8
+ extradata output = 0x10
+ extradata output2 = 0x20
+ internal scratch = 0x40
+ internal scratch1 = 0x80
+ internal scratch2 = 0x100
+ internal persist = 0x200
+ internal persist1 = 0x400
+ internal cmd queue = 0x800
+- cache-slice-names = An array of supported cache slice names by llcc
+- cache-slices = An array of supported cache slice ids corresponding
+ to cache-slice-names by llcc
+
+[Second level nodes]
+Context Banks
+=============
+Required properties:
+- compatible : one of:
+ - "qcom,msm-vidc,context-bank"
+- iommus : A phandle parsed by smmu driver. Number of entries will vary
+ across targets.
+
+Optional properties:
+- label - string describing iommu domain usage.
+- buffer-types : bitmap of buffer types that can be mapped into the current
+ IOMMU domain.
+ - Buffer types are defined as the following:
+ input = 0x1
+ output = 0x2
+ output2 = 0x4
+ extradata input = 0x8
+ extradata output = 0x10
+ extradata output2 = 0x20
+ internal scratch = 0x40
+ internal scratch1 = 0x80
+ internal scratch2 = 0x100
+ internal persist = 0x200
+ internal persist1 = 0x400
+ internal cmd queue = 0x800
+- virtual-addr-pool : offset and length of virtual address pool.
+- qcom,secure-context-bank : bool indicating secure context bank.
+
+Buses
+=====
+Required properties:
+- compatible : one of:
+ - "qcom,msm-vidc,bus"
+- label : an arbitrary name
+- qcom,bus-master : an integer descriptor of the bus master. Refer to arch/arm/\
+ boot/dts/include/dt-bindings/msm/msm-bus-ids.h for list of acceptable masters
+- qcom,bus-slave : an integer descriptor of the bus slave. Refer to arch/arm/\
+ boot/dts/include/dt-bindings/msm/msm-bus-ids.h for list of acceptable slaves
+
+Optional properties:
+- qcom,bus-range-kbps : an array of two items (<min max>) that indicate the
+ minimum and maximum acceptable votes for the bus.
+ In the absence of this property <0 INT_MAX> is used.
+- qcom,ubwc-10bit : UBWC 10 bit content has different bus requirements,
+ this tag will be used to pick the appropriate bus as per the session profile
+ as shown below in example.
+- qcom,mode : Type of BW calculations to use.
+ "performance" - Use highest valid BW vote.
+ "venus-ddr", "venus-llcc" - Calculate for DDR, LLCC path.
+
+Memory Heaps
+============
+Required properties:
+- compatible : one of:
+ - "qcom,msm-vidc,mem-adsp"
+ - "qcom,msm-vidc,mem-cdsp"
+- memory-region : phandle to the memory heap/region.
+
+Example:
+
+ qcom,vidc@fdc00000 {
+ compatible = "qcom,msm-vidc";
+ reg = <0xfdc00000 0xff000>;
+ interrupts = <0 44 0>;
+ venus-supply = <&gdsc>;
+ venus-core0-supply = <&gdsc1>;
+ venus-core1-supply = <&gdsc2>;
+ qcom,reg-presets = <0x80004 0x1>,
+ <0x80178 0x00001FFF>;
+ qcom,qdss-presets = <0xFC307000 0x1000>,
+ <0xFC322000 0x1000>;
+ clock-names = "foo_clk", "bar_clk", "baz_clk";
+ qcom,clock-configs = <0x3 0x1 0x0>;
+ qcom,buffer-type-tz-usage-table = <0x1 0x1>,
+ <0x1fe 0x2>;
+ qcom,allowed-clock-rates = <200000000 300000000 400000000>;
+
+ bus_cnoc {
+ compatible = "qcom,msm-vidc,bus";
+ label = "venus-cnoc";
+ qcom,bus-master = <MSM_BUS_MASTER_AMPSS_M0>;
+ qcom,bus-slave = <MSM_BUS_SLAVE_VENUS_CFG>;
+ qcom,bus-governor = "performance";
+ qcom,bus-range-kbps = <1 1>;
+ };
+
+ venus_bus_ddr {
+ compatible = "qcom,msm-vidc,bus";
+ label = "venus-ddr";
+ qcom,bus-master = <MSM_BUS_MASTER_VIDEO_P0>;
+ qcom,bus-slave = <MSM_BUS_SLAVE_EBI_CH0>;
+ qcom,bus-governor = "msm-vidc-ddr";
+ qcom,bus-range-kbps = <1000 3388000>;
+ };
+
+ non_secure_cb {
+ compatible = "qcom,msm-vidc,context-bank";
+ label = "venus_ns";
+ iommus =
+ <&apps_smmu 0x1300 0x60>;
+ buffer-types = <0xfff>;
+ virtual-addr-pool = <0x25800000 0xba800000>;
+ };
+
+ };