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authorzhaochen <zhaochen@qti.qualcomm.com>2020-02-21 14:50:14 +0800
committerzhaochen <zhaochen@qti.qualcomm.com>2020-02-24 11:36:50 +0800
commit1ec38c1ef42d1cca18a2d9d63661efd05fc33d4d (patch)
tree79047ce65e3c103f6a1ec81261d176058ee426d2 /bindings/net
parent835d85e819a7fe257acf28f93fff1e1adf6340c4 (diff)
downloaddevicetree-1ec38c1ef42d1cca18a2d9d63661efd05fc33d4d.tar.gz
ARM: dts: msm: add mcp25xxfd support and DOC
cp25xxfd is CAN bus controller with SPI interface. Add the dts support and documents in bindings. Change-Id: I0958824f0df1d7ee5e200ab8f6c2ec50d3b7cc71
Diffstat (limited to 'bindings/net')
-rw-r--r--bindings/net/can/microchip,mcp25xxfd.txt31
1 files changed, 31 insertions, 0 deletions
diff --git a/bindings/net/can/microchip,mcp25xxfd.txt b/bindings/net/can/microchip,mcp25xxfd.txt
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index 00000000..74f795b4
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+++ b/bindings/net/can/microchip,mcp25xxfd.txt
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+* Microchip MCP2517 stand-alone CAN controller device tree bindings
+
+Required properties:
+ - compatible: Should be one of the following:
+ - "microchip,mcp2517fd" for MCP2517fd.
+ - reg: SPI chip select.
+ - clocks: The clock feeding the CAN controller.
+ - interrupt-parent: The parent interrupt controller.
+ - interrupts: Should contain IRQ line for the CAN controller.
+ - gpio-controller: Marks the device node as a GPIO controller
+
+Optional properties:
+ - vdd-supply: Regulator that powers the CAN controller.
+ - xceiver-supply: Regulator that powers the CAN transceiver.
+ - microchip,clock_out_div = <0|1|2|4|10>: Clock output pin divider
+ 0 = Start of Frame output
+ default: 10
+ - microchip,clock_div2: bool: divide the internal clock by 2
+ - gpio_opendrain: bool: enable open-drain for all pins (except cantx)
+
+Example:
+ can0: can@1 {
+ compatible = "microchip,mcp2517fd";
+ reg = <1>;
+ clocks = <&clk24m>;
+ interrupt-parent = <&gpio4>;
+ interrupts = <13 0x8>;
+ vdd-supply = <&reg5v0>;
+ xceiver-supply = <&reg5v0>;
+ gpio-controller;
+ };