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authorVenkata Narendra Kumar Gutta <vgutta@quicinc.com>2019-04-24 12:36:05 -0700
committerVenkata Narendra Kumar Gutta <vgutta@quicinc.com>2019-05-02 16:41:24 -0700
commited241f132720397b8abac31ca170a274ea6e54e5 (patch)
tree892aeadc1cc2fc0a47d982a533f8112d96866d37 /bindings/regmap
parent1f62b25b429becfcc7d8608f389705b3e6ef0e20 (diff)
downloaddevicetree-ed241f132720397b8abac31ca170a274ea6e54e5.tar.gz
dt-bindings: Add devicetree bindings to devicetree project
Add devicetree bindings snapshot to the devicetree project. This snapshot is taken as of 'commit f3dd4aaeb34438c877ccd42f5a48ccd554dd765a (Merge "platform: qpnp-revid: Add REVID support for PM7250B")' of the kernel project. Change-Id: I5e0ec0eae63ff9c071b2924bd84c5b20d3f6554d
Diffstat (limited to 'bindings/regmap')
-rw-r--r--bindings/regmap/regmap.txt29
1 files changed, 29 insertions, 0 deletions
diff --git a/bindings/regmap/regmap.txt b/bindings/regmap/regmap.txt
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+Devicetree binding for regmap
+
+Optional properties:
+
+ little-endian,
+ big-endian,
+ native-endian: See common-properties.txt for a definition
+
+Note:
+Regmap defaults to little-endian register access on MMIO based
+devices, this is by far the most common setting. On CPU
+architectures that typically run big-endian operating systems
+(e.g. PowerPC), registers can be defined as big-endian and must
+be marked that way in the devicetree.
+
+On SoCs that can be operated in both big-endian and little-endian
+modes, with a single hardware switch controlling both the endianness
+of the CPU and a byteswap for MMIO registers (e.g. many Broadcom MIPS
+chips), "native-endian" is used to allow using the same device tree
+blob in both cases.
+
+Examples:
+Scenario 1 : a register set in big-endian mode.
+dev: dev@40031000 {
+ compatible = "syscon";
+ reg = <0x40031000 0x1000>;
+ big-endian;
+ ...
+};