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| author | George Shen <sqiao@qti.qualcomm.com> | 2019-10-15 15:52:40 -0700 |
|---|---|---|
| committer | George Shen <sqiao@qti.qualcomm.com> | 2019-10-16 13:59:39 -0700 |
| commit | 3e4d7c45dd6285a9b05ff49389d33c45cccc35d8 (patch) | |
| tree | 13242b11339bd77a5aef104b95e9ff4c08120d87 /qcom/kona-cvp.dtsi | |
| parent | 2127932280d3428c537fd9f387a50d24665a1c9a (diff) | |
| download | devicetree-3e4d7c45dd6285a9b05ff49389d33c45cccc35d8.tar.gz | |
ARM: dts: msm: Update CVP clock frequency plan
CVP V2 clock plan changed.
Change-Id: I18f09165e8e4e3a1c5d5bf4d9c1d80c6b40df943
Diffstat (limited to 'qcom/kona-cvp.dtsi')
| -rw-r--r-- | qcom/kona-cvp.dtsi | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/qcom/kona-cvp.dtsi b/qcom/kona-cvp.dtsi index 698ba451..460cd4ac 100644 --- a/qcom/kona-cvp.dtsi +++ b/qcom/kona-cvp.dtsi @@ -24,9 +24,9 @@ qcom,proxy-clock-names = "gcc_video_axi1", "cvp_clk", "core_clk"; + /* V2 clock frequency plan */ qcom,clock-configs = <0x0 0x1 0x1>; - qcom,allowed-clock-rates = <239999999 338000000 - 366000000 444000000>; + qcom,allowed-clock-rates = <280000000 366000000 444000000>; resets = <&clock_gcc GCC_VIDEO_AXI1_CLK_ARES>, <&clock_videocc VIDEO_CC_MVS1C_CLK_ARES>; |