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| author | Elson Roy Serrao <eserrao@quicinc.com> | 2020-01-30 11:46:32 -0800 |
|---|---|---|
| committer | Elson Roy Serrao <eserrao@quicinc.com> | 2020-02-07 09:52:52 -0800 |
| commit | 43736b922e965c8723e390f55adf194c06ed55bf (patch) | |
| tree | 5960f308a9488b4afe35cfa6d083cd20da0e9e11 /qcom/kona-usb.dtsi | |
| parent | 0136ddaf9cc38f569502f165871f59d64b2a9e9d (diff) | |
| download | devicetree-43736b922e965c8723e390f55adf194c06ed55bf.tar.gz | |
ARM: dts: msm: Increase the dwc3 reg address range for Kona
The register address range for Kona is not covering all the
controller registers. Tuning the Tx deemph registers for dwc3
gen2 protocol test is not possible with the current range.
Modify the reg property to cover the entire range as defined
in the data book to fix this issue.
Change-Id: I34b605f920af7cae8b2efd69a54f96e8cde5c001
Diffstat (limited to 'qcom/kona-usb.dtsi')
| -rw-r--r-- | qcom/kona-usb.dtsi | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/qcom/kona-usb.dtsi b/qcom/kona-usb.dtsi index 814605b9..02439f4f 100644 --- a/qcom/kona-usb.dtsi +++ b/qcom/kona-usb.dtsi @@ -81,7 +81,7 @@ dwc0: dwc3@a600000 { compatible = "snps,dwc3"; - reg = <0x0a600000 0xcd00>; + reg = <0x0a600000 0xd93c>; interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; usb-phy = <&usb2_phy0>, <&usb_qmp_dp_phy>; linux,sysdev_is_parent; @@ -416,7 +416,7 @@ dwc1: dwc3@a800000 { compatible = "snps,dwc3"; - reg = <0xa800000 0xcd00>; + reg = <0xa800000 0xd93c>; interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; usb-phy = <&usb2_phy1>, <&usb_qmp_phy>; linux,sysdev_is_parent; |