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author | Sankeerth Billakanti <sbillaka@qti.qualcomm.com> | 2020-07-01 11:43:01 +0530 |
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committer | Gerrit - the friendly Code Review server <code-review@localhost> | 2020-07-02 02:59:10 -0700 |
commit | 97b0834063492fff052a6661f821adb5d696c4c5 (patch) | |
tree | 598faa29a01ad9aa9b7f902765796f0f5397b863 /qcom/lagoon-sde.dtsi | |
parent | 5a298b18fec2d7f56ba03cc7316408bb13a71871 (diff) | |
download | devicetree-97b0834063492fff052a6661f821adb5d696c4c5.tar.gz |
ARM: dts: msm: vote for the QLINK clk on lagoon
The dp-usb3 combo phy power is controlled by the QLINK ARC.
If QLINK ARC is not enabled, the ref_clk for the phy is
powered-down. This was causing the DP pll to not lock
sometimes and causing display blankout or flickers. This
change will vote for the QLINK ARC to power the ref clk for
the dp-usb3 combo phy.
Change-Id: I2a70e5a197096dcc0330541c761130afa2e7e4ee
Diffstat (limited to 'qcom/lagoon-sde.dtsi')
-rw-r--r-- | qcom/lagoon-sde.dtsi | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/qcom/lagoon-sde.dtsi b/qcom/lagoon-sde.dtsi index dd22627b..320379e6 100644 --- a/qcom/lagoon-sde.dtsi +++ b/qcom/lagoon-sde.dtsi @@ -483,7 +483,7 @@ clocks = <&dispcc DISP_CC_MDSS_DP_AUX_CLK>, <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>, - <&rpmhcc RPMH_CXO_CLK>, + <&rpmhcc RPMH_QLINK_CLK>, <&gcc GCC_USB3_PRIM_CLKREF_CLK>, <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>, <&dispcc DISP_CC_MDSS_DP_LINK_CLK>, |