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authorQC Publisher <qcpublisher@qti.qualcomm.com>2023-04-28 04:07:36 -0700
committerDaniel Price <danielprice@google.com>2023-05-01 20:29:45 +0000
commit2f02eb8c808e7a89e7f88651228ddad13b616d0a (patch)
treeae90f12a4f0eaf076a610ddebf81ca00a2285786 /qcom/sdmshrike.dtsi
parent94f4a4876813f7ba58f764866f9e3705527601d4 (diff)
downloaddevicetree-2f02eb8c808e7a89e7f88651228ddad13b616d0a.tar.gz
Commit label r00078.3a - ES6 0.0.078.3a
TRACKING-ID:002deea6-3cac-4530-9032-57124bf93566
Diffstat (limited to 'qcom/sdmshrike.dtsi')
-rwxr-xr-xqcom/sdmshrike.dtsi118
1 files changed, 93 insertions, 25 deletions
diff --git a/qcom/sdmshrike.dtsi b/qcom/sdmshrike.dtsi
index 0d7ccca1..ff89880e 100755
--- a/qcom/sdmshrike.dtsi
+++ b/qcom/sdmshrike.dtsi
@@ -413,7 +413,7 @@
reg = <0x0 0x8be00000 0x0 0x1a00000>;
};
- pil_modem_mem: modem_region@8d800000 {
+ rproc_modem_mem: rproc_modem_region@8d800000 {
no-map;
reg = <0x0 0x8d800000 0x0 0x9600000>;
};
@@ -465,11 +465,6 @@
label = "cont_splash_region";
};
- disp_rdump_memory: disp_rdump_region@9c000000 {
- reg = <0x0 0x9c000000 0x0 0x02400000>;
- label = "disp_rdump_region";
- };
-
adsp_mem: adsp_region {
compatible = "shared-dma-pool";
alloc-ranges = <0x0 0x00000000 0x0 0xffffffff>;
@@ -1173,6 +1168,26 @@
};
};
+ qcom,smp2p-modem {
+ compatible = "qcom,smp2p";
+ qcom,smem = <435>, <428>;
+ interrupts = <GIC_SPI 451 IRQ_TYPE_EDGE_RISING>;
+ qcom,ipc = <&apcs 0 14>;
+ qcom,local-pid = <0>;
+ qcom,remote-pid = <1>;
+
+ modem_smp2p_out: master-kernel {
+ qcom,entry-name = "master-kernel";
+ #qcom,smem-state-cells = <1>;
+ };
+
+ modem_smp2p_in: slave-kernel {
+ qcom,entry-name = "slave-kernel";
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+ };
+
wdog: qcom,wdt@17c10000 {
compatible = "qcom,msm-watchdog";
reg = <0x17c10000 0x1000>;
@@ -1390,7 +1405,8 @@
< 672000 768000 >,
< 864000 960000 >,
< 1171200 1228800 >,
- < 1267200 1344000 >;
+ < 1267200 1344000 >,
+ < 1766400 1651200 >;
qcom,sampling-enabled;
};
@@ -1403,7 +1419,8 @@
< 768000 768000 >,
< 960000 960000 >,
< 1248000 1228800 >,
- < 1593600 1344000 >;
+ < 1593600 1344000 >,
+ < 2841600 1651200 >;
qcom,sampling-enabled;
};
};
@@ -1574,6 +1591,74 @@
};
};
+ modem_pas: remoteproc-modem@4080000 {
+ compatible = "qcom,sdmshrike-mpss-pas";
+ reg = <0x4080000 0x00100>;
+ status = "disabled";
+ cx-supply = <&VDD_CX_LEVEL>;
+ cx-uV-uA = <RPMH_REGULATOR_LEVEL_TURBO 100000>;
+ mx-supply = <&VDD_MX_LEVEL>;
+ mx-uV-uA = <RPMH_REGULATOR_LEVEL_TURBO 100000>;
+ reg-names = "cx", "mx";
+
+ clocks = <&rpmhcc RPMH_CXO_CLK>;
+ clock-names = "xo";
+
+ qcom,qmp = <&aoss_qmp>;
+
+ interconnects = <&aggre2_noc MASTER_CRYPTO &mc_virt SLAVE_EBI1>;
+ interconnect-names = "crypto_ddr";
+
+ memory-region = <&rproc_modem_mem>;
+
+ /* Inputs from mss */
+ interrupts-extended = <&intc GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>,
+ <&modem_smp2p_in 0 0>,
+ <&modem_smp2p_in 2 0>,
+ <&modem_smp2p_in 1 0>,
+ <&modem_smp2p_in 3 0>,
+ <&modem_smp2p_in 7 0>;
+
+ interrupt-names = "wdog",
+ "fatal",
+ "handover",
+ "ready",
+ "stop-ack",
+ "shutdown-ack";
+
+ /* Outputs to mss */
+ qcom,smem-states = <&modem_smp2p_out 0>;
+ qcom,smem-state-names = "stop";
+
+ glink_edge_modem: glink-edge {
+ qcom,remote-pid = <1>;
+ transport = "smem";
+ mboxes = <&apss_shared 12>;
+ mbox-names = "mpss_smem";
+ interrupts = <GIC_SPI 449 IRQ_TYPE_EDGE_RISING>;
+
+ label = "modem";
+ qcom,glink-label = "mpss";
+
+ qcom,modem_qrtr {
+ qcom,glink-channels = "IPCRTR";
+ qcom,low-latency;
+ qcom,intents = <0x800 5
+ 0x2000 3
+ 0x4400 2>;
+ };
+
+ qcom,msm_fastrpc_rpmsg {
+ compatible = "qcom,msm-fastrpc-rpmsg";
+ qcom,glink-channels = "fastrpcglink-apps-dsp";
+ qcom,intents = <0x64 64>;
+ };
+
+ qcom,modem_glink_ssr {
+ qcom,glink-channels = "glink_ssr";
+ };
+ };
+ };
sdhc2_opp_table: sdhc2-opp-table {
compatible = "operating-points-v2";
@@ -1636,23 +1721,6 @@
};
};
- ufs_ice: ufsice@1d90000 {
- compatible = "qcom,ice";
- reg = <0x1d90000 0x8000>;
- qcom,enable-ice-clk;
- clock-names = "ufs_core_clk",
- "iface_clk", "ice_core_clk";
- clocks = <&gcc GCC_UFS_PHY_AXI_CLK>,
- <&gcc GCC_UFS_PHY_AHB_CLK>,
- <&gcc GCC_UFS_PHY_ICE_CORE_CLK>;
- qcom,op-freq-hz = <0>, <0>, <300000000>;
- vdd-hba-supply = <&ufs_phy_gdsc>;
- qcom,bus-vector-names = "MIN",
- "MAX";
- qcom,instance-type = "ufs";
- qcom,num-fde-slots = <31>;
- };
-
ufsphy_mem: ufsphy_mem@1d87000 {
reg = <0x1d87000 0xe00>; /* PHY regs */
reg-names = "phy_mem";