diff options
| author | QC Publisher <qcpublisher@qti.qualcomm.com> | 2022-05-01 00:10:30 -0700 |
|---|---|---|
| committer | Andrew Evans <andrewevans@google.com> | 2022-05-11 19:34:27 -0700 |
| commit | 4cf598fef3ddc592c940b9936bd425d059ecb8fe (patch) | |
| tree | 0c6f33b370c2651915a5029b28a9a3578e95d6b4 /qcom | |
| parent | a1db91e244fb83cfdfdd181b0294c3926c0675cc (diff) | |
| download | devicetree-4cf598fef3ddc592c940b9936bd425d059ecb8fe.tar.gz | |
commit 95b36382623f806e31198373ef3a2f6c107d972b (tag: r00185.1)
Author: QC Publisher <qcpublisher@qti.qualcomm.com>
Date: Sun May 1 00:10:30 2022 -0700
Commit label r00185.1 - Pre-CS3 0.0.185.1
TRACKING-ID:ecda4810-c9ca-4777-8bb0-46eb9f919a42
Diffstat (limited to 'qcom')
51 files changed, 4498 insertions, 329 deletions
diff --git a/qcom/bengal-audio-overlay.dtsi b/qcom/bengal-audio-overlay.dtsi index 6317b5ab..f95ef96e 100755 --- a/qcom/bengal-audio-overlay.dtsi +++ b/qcom/bengal-audio-overlay.dtsi @@ -205,7 +205,6 @@ qcom,msm-mbhc-hphl-swh = <1>; qcom,msm-mbhc-gnd-swh = <1>; qcom,cdc-dmic01-gpios = <&cdc_dmic01_gpios>; - qcom,cdc-dmic23-gpios = <&cdc_dmic23_gpios>; nvmem-cells = <&adsp_variant>; nvmem-cell-names = "adsp_variant"; @@ -225,6 +224,7 @@ clocks = <&wsa881x_analog_clk 0>; qcom,wsa-analog-clk-gpio = <&wsa881x_analog_clk_gpio>; qcom,wsa-analog-reset-gpio = <&wsa881x_analog_reset_gpio>; + qcom,wsa-analog-vi-gpio = <&cdc_dmic23_gpios>; qcom,wsa-prefix = "SpkrMono"; }; @@ -317,3 +317,33 @@ adsp-fw-names = "adsp2"; adsp-fw-bit-values = <0x1>; }; + +&lpi_tlmm { + cdc_dmic23_clk_active: dmic23_clk_active { + mux { + pins = "gpio8"; + function = "func1"; + }; + + config { + pins = "gpio8"; + drive-strength = <8>; + bias-disable; /* NO PULL */ + output-high; + }; + }; + + cdc_dmic23_clk_sleep: dmic23_clk_sleep { + mux { + pins = "gpio8"; + function = "gpio"; + }; + + config { + pins = "gpio8"; + drive-strength = <2>; + bias-pull-down; + input-enable; + }; + }; +}; diff --git a/qcom/bengal-qrd.dtsi b/qcom/bengal-qrd.dtsi index cb55bd75..d1572794 100755 --- a/qcom/bengal-qrd.dtsi +++ b/qcom/bengal-qrd.dtsi @@ -348,23 +348,23 @@ leds { compatible = "gpio-leds"; - gpio52 { - label = "user4-led_green"; - gpios = <&tlmm 52 GPIO_ACTIVE_HIGH>; - default-state = "off"; - }; - - gpio47 { + wifi_led { label = "wifi-led_yellow"; gpios = <&tlmm 47 GPIO_ACTIVE_HIGH>; default-state = "off"; }; - gpio45 { + bt_led { label = "bt-led_blue"; gpios = <&tlmm 45 GPIO_ACTIVE_HIGH>; default-state = "off"; }; + + user_led0 { + label = "user-led0_green"; + gpios = <&tlmm 52 GPIO_ACTIVE_HIGH>; + default-state = "off"; + }; }; fan0: pwm-fan { @@ -381,6 +381,20 @@ }; }; +&pmi632_rgb { + blue { + label = "user-led1_green"; + }; + + green { + label = "user-led2_green"; + }; + + red { + label = "user-led3_green"; + }; +}; + &qupv3_se5_spi { status = "okay"; mcp2518fd: can@0 { @@ -391,6 +405,7 @@ interrupts = <39 0>; interrupt-names = "can_irq"; spi-max-frequency = <10000000>; + message-transmit-interval = <800>; gpio-controller; status = "okay"; }; diff --git a/qcom/direwolf-gdsc.dtsi b/qcom/direwolf-gdsc.dtsi index b1cf8522..8c4887e7 100755 --- a/qcom/direwolf-gdsc.dtsi +++ b/qcom/direwolf-gdsc.dtsi @@ -23,12 +23,6 @@ status = "disabled"; }; - gcc_pcie_0_gdsc: qcom,gdsc@1a9004 { - compatible = "regulator-fixed"; - regulator-name = "gcc_pcie_0_gdsc"; - status = "disabled"; - }; - gcc_pcie_0_tunnel_gdsc: qcom,gdsc@1a4004 { compatible = "qcom,gdsc"; reg = <0x1a4004 0x4>; @@ -41,12 +35,6 @@ status = "disabled"; }; - gcc_pcie_1_gdsc: qcom,gdsc@177004 { - compatible = "regulator-fixed"; - regulator-name = "gcc_pcie_1_gdsc"; - status = "disabled"; - }; - gcc_pcie_1_tunnel_gdsc: qcom,gdsc@18d004 { compatible = "qcom,gdsc"; reg = <0x18d004 0x4>; @@ -135,12 +123,6 @@ status = "disabled"; }; - gcc_usb20_prim_gdsc: qcom,gdsc@11c004 { - compatible = "regulator-fixed"; - regulator-name = "gcc_usb20_prim_gdsc"; - status = "disabled"; - }; - gcc_usb30_mp_gdsc: qcom,gdsc@1ab004 { compatible = "qcom,gdsc"; reg = <0x1ab004 0x4>; @@ -371,10 +353,9 @@ reg = <0xabf0d18 0x4>; regulator-name = "video_cc_mvs0_gdsc"; qcom,gds-timeout = <500>; - clock-names = "ahb_clk"; - clocks = <&gcc GCC_VIDEO_AHB_CLK>; qcom,support-hw-trigger; qcom,retain-regs; + status = "disabled"; }; video_cc_mvs0c_gdsc: qcom,gdsc@abf0bf8 { @@ -382,9 +363,8 @@ reg = <0xabf0bf8 0x4>; regulator-name = "video_cc_mvs0c_gdsc"; qcom,gds-timeout = <500>; - clock-names = "ahb_clk"; - clocks = <&gcc GCC_VIDEO_AHB_CLK>; qcom,retain-regs; + status = "disabled"; }; video_cc_mvs1_gdsc: qcom,gdsc@abf0d98 { @@ -392,10 +372,9 @@ reg = <0xabf0d98 0x4>; regulator-name = "video_cc_mvs1_gdsc"; qcom,gds-timeout = <500>; - clock-names = "ahb_clk"; - clocks = <&gcc GCC_VIDEO_AHB_CLK>; qcom,support-hw-trigger; qcom,retain-regs; + status = "disabled"; }; video_cc_mvs1c_gdsc: qcom,gdsc@abf0c98 { @@ -403,9 +382,8 @@ reg = <0xabf0c98 0x4>; regulator-name = "video_cc_mvs1c_gdsc"; qcom,gds-timeout = <500>; - clock-names = "ahb_clk"; - clocks = <&gcc GCC_VIDEO_AHB_CLK>; qcom,retain-regs; + status = "disabled"; }; /* GPU_CC GDSCs */ diff --git a/qcom/direwolf-pinctrl.dtsi b/qcom/direwolf-pinctrl.dtsi index 84a8ac24..f9d31416 100755 --- a/qcom/direwolf-pinctrl.dtsi +++ b/qcom/direwolf-pinctrl.dtsi @@ -1800,6 +1800,20 @@ }; }; + tps_i2c_intr: tps_i2c_intr { + mux { + pins = "gpio138"; + function = "gpio"; + }; + + config { + pins = "gpio138"; + drive-strength = <2>; + bias-pull-up; + input-enable; + }; + }; + pcie0 { pcie2a_perst_default: pcie2a_perst_default { mux { @@ -2835,4 +2849,604 @@ }; }; }; + + hs1_i2s_sck { + hs1_i2s_sck_sleep: hs1_i2s_sck_sleep { + mux { + pins = "gpio208"; + function = "gpio"; + }; + + config { + pins = "gpio208"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + hs1_i2s_sck_active: hs1_i2s_sck_active { + mux { + pins = "gpio208"; + function = "hs1_mi2s"; + }; + + config { + pins = "gpio208"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + hs1_i2s_ws { + hs1_i2s_ws_sleep: hs1_i2s_ws_sleep { + mux { + pins = "gpio209"; + function = "gpio"; + }; + + config { + pins = "gpio209"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + hs1_i2s_ws_active: hs1_i2s_ws_active { + mux { + pins = "gpio209"; + function = "hs1_mi2s"; + }; + + config { + pins = "gpio209"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + hs1_i2s_data0 { + hs1_i2s_data0_sleep: hs1_i2s_data0_sleep { + mux { + pins = "gpio210"; + function = "gpio"; + }; + + config { + pins = "gpio210"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + hs1_i2s_data0_active: hs1_i2s_data0_active { + mux { + pins = "gpio210"; + function = "hs1_mi2s"; + }; + + config { + pins = "gpio210"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + hs1_i2s_data1 { + hs1_i2s_data1_sleep: hs1_i2s_data1_sleep { + mux { + pins = "gpio211"; + function = "gpio"; + }; + + config { + pins = "gpio211"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + hs1_i2s_data1_active: hs1_i2s_data1_active { + mux { + pins = "gpio211"; + function = "hs1_mi2s"; + }; + + config { + pins = "gpio211"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + input-enable; + }; + }; + }; + + hs2_i2s_sck { + hs2_i2s_sck_sleep: hs2_i2s_sck_sleep { + mux { + pins = "gpio92"; + function = "gpio"; + }; + + config { + pins = "gpio92"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + hs2_i2s_sck_active: hs2_i2s_sck_active { + mux { + pins = "gpio92"; + function = "hs2_mi2s"; + }; + + config { + pins = "gpio92"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + hs2_i2s_ws { + hs2_i2s_ws_sleep: hs2_i2s_ws_sleep { + mux { + pins = "gpio91"; + function = "gpio"; + }; + + config { + pins = "gpio91"; + drive-strength = <2>; /* 8 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + hs2_i2s_ws_active: hs2_i2s_ws_active { + mux { + pins = "gpio91"; + function = "hs2_mi2s"; + }; + + config { + pins = "gpio91"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + hs2_i2s_data0 { + hs2_i2s_data0_sleep: hs2_i2s_data0_sleep { + mux { + pins = "gpio218"; + function = "gpio"; + }; + + config { + pins = "gpio218"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + hs2_i2s_data0_active: hs2_i2s_data0_active { + mux { + pins = "gpio218"; + function = "hs2_mi2s"; + }; + + config { + pins = "gpio218"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + hs2_i2s_data1 { + hs2_i2s_data1_sleep: hs2_i2s_data1_sleep { + mux { + pins = "gpio219"; + function = "gpio"; + }; + + config { + pins = "gpio219"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + hs2_i2s_data1_active: hs2_i2s_data1_active { + mux { + pins = "gpio219"; + function = "hs2_mi2s"; + }; + + config { + pins = "gpio219"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + input-enable; + }; + }; + }; + + hs3_i2s_sck { + hs3_i2s_sck_sleep: hs3_i2s_sck_sleep { + mux { + pins = "gpio224"; + function = "gpio"; + }; + + config { + pins = "gpio224"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + hs3_i2s_sck_active: hs3_i2s_sck_active { + mux { + pins = "gpio224"; + function = "hs3_mi2s"; + }; + + config { + pins = "gpio224"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + hs3_i2s_ws { + hs3_i2s_ws_sleep: hs3_i2s_ws_sleep { + mux { + pins = "gpio225"; + function = "gpio"; + }; + + config { + pins = "gpio225"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + hs3_i2s_ws_active: hs3_i2s_ws_active { + mux { + pins = "gpio225"; + function = "hs3_mi2s"; + }; + + config { + pins = "gpio225"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + hs3_i2s_data0 { + hs3_i2s_data0_sleep: hs3_i2s_data0_sleep { + mux { + pins = "gpio226"; + function = "gpio"; + }; + + config { + pins = "gpio226"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + hs3_i2s_data0_active: hs3_i2s_data0_active { + mux { + pins = "gpio226"; + function = "hs3_mi2s"; + }; + + config { + pins = "gpio226"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + hs3_i2s_data1 { + hs3_i2s_data1_sleep: hs3_i2s_data1_sleep { + mux { + pins = "gpio227"; + function = "gpio"; + }; + + config { + pins = "gpio227"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + hs3_i2s_data1_active: hs3_i2s_data1_active { + mux { + pins = "gpio227"; + function = "hs3_mi2s"; + }; + + config { + pins = "gpio227"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + input-enable; + }; + }; + }; + + hs4_i2s_sck { + hs4_i2s_sck_sleep: hs4_i2s_sck_sleep { + mux { + pins = "gpio220"; + function = "gpio"; + }; + + config { + pins = "gpio220"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + hs4_i2s_sck_active: hs4_i2s_sck_active { + mux { + pins = "gpio220"; + function = "mi2s1_sck"; + }; + + config { + pins = "gpio220"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + hs4_i2s_ws { + hs4_i2s_ws_sleep: hs4_i2s_ws_sleep { + mux { + pins = "gpio221"; + function = "gpio"; + }; + + config { + pins = "gpio221"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + hs4_i2s_ws_active: hs4_i2s_ws_active { + mux { + pins = "gpio221"; + function = "mi2s1_ws"; + }; + + config { + pins = "gpio221"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + hs4_i2s_data0 { + hs4_i2s_data0_sleep: hs4_i2s_data0_sleep { + mux { + pins = "gpio222"; + function = "gpio"; + }; + + config { + pins = "gpio222"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + hs4_i2s_data0_active: hs4_i2s_data0_active { + mux { + pins = "gpio222"; + function = "mi2s1_data0"; + }; + + config { + pins = "gpio222"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + hs4_i2s_data1 { + hs4_i2s_data1_sleep: hs4_i2s_data1_sleep { + mux { + pins = "gpio223"; + function = "gpio"; + }; + + config { + pins = "gpio223"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + hs4_i2s_data1_active: hs4_i2s_data1_active { + mux { + pins = "gpio223"; + function = "mi2s1_data1"; + }; + + config { + pins = "gpio223"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + input-enable; + }; + }; + }; + + hs5_i2s_sck { + hs5_i2s_sck_sleep: hs5_i2s_sck_sleep { + mux { + pins = "gpio212"; + function = "gpio"; + }; + + config { + pins = "gpio212"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + hs5_i2s_sck_active: hs5_i2s_sck_active { + mux { + pins = "gpio212"; + function = "mi2s2_sck"; + }; + + config { + pins = "gpio212"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + hs5_i2s_ws { + hs5_i2s_ws_sleep: hs5_i2s_ws_sleep { + mux { + pins = "gpio213"; + function = "gpio"; + }; + + config { + pins = "gpio213"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + hs5_i2s_ws_active: hs5_i2s_ws_active { + mux { + pins = "gpio213"; + function = "mi2s2_ws"; + }; + + config { + pins = "gpio213"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + hs5_i2s_data0 { + hs5_i2s_data0_sleep: hs5_i2s_data0_sleep { + mux { + pins = "gpio214"; + function = "gpio"; + }; + + config { + pins = "gpio214"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + hs5_i2s_data0_active: hs5_i2s_data0_active { + mux { + pins = "gpio214"; + function = "mi2s2_data0"; + }; + + config { + pins = "gpio214"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + output-high; + }; + }; + }; + + hs5_i2s_data1 { + hs5_i2s_data1_sleep: hs5_i2s_data1_sleep { + mux { + pins = "gpio215"; + function = "gpio"; + }; + + config { + pins = "gpio215"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + hs5_i2s_data1_active: hs5_i2s_data1_active { + mux { + pins = "gpio215"; + function = "mi2s2_data1"; + }; + + config { + pins = "gpio215"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + input-enable; + }; + }; + }; }; diff --git a/qcom/direwolf-qupv3.dtsi b/qcom/direwolf-qupv3.dtsi index 09bcf573..30566863 100755 --- a/qcom/direwolf-qupv3.dtsi +++ b/qcom/direwolf-qupv3.dtsi @@ -493,6 +493,7 @@ pinctrl-0 = <&qupv3_se0_i2c_active>; pinctrl-1 = <&qupv3_se0_i2c_sleep>; qcom,wrapper-core = <&qupv3_0>; + qcom,rtl_se; status = "disabled"; }; @@ -824,6 +825,7 @@ pinctrl-0 = <&qupv3_se8_i2c_active>; pinctrl-1 = <&qupv3_se8_i2c_sleep>; qcom,wrapper-core = <&qupv3_1>; + qcom,rtl_se; status = "disabled"; }; @@ -860,6 +862,7 @@ pinctrl-0 = <&qupv3_se9_i2c_active>; pinctrl-1 = <&qupv3_se9_i2c_sleep>; qcom,wrapper-core = <&qupv3_1>; + qcom,rtl_se; status = "disabled"; }; @@ -896,6 +899,7 @@ pinctrl-0 = <&qupv3_se10_i2c_active>; pinctrl-1 = <&qupv3_se10_i2c_sleep>; qcom,wrapper-core = <&qupv3_1>; + qcom,rtl_se; status = "disabled"; }; @@ -948,6 +952,7 @@ pinctrl-0 = <&qupv3_se11_i2c_active>; pinctrl-1 = <&qupv3_se11_i2c_sleep>; qcom,wrapper-core = <&qupv3_1>; + qcom,rtl_se; status = "disabled"; }; @@ -984,6 +989,7 @@ pinctrl-0 = <&qupv3_se12_i2c_active>; pinctrl-1 = <&qupv3_se12_i2c_sleep>; qcom,wrapper-core = <&qupv3_1>; + qcom,rtl_se; status = "disabled"; }; @@ -1020,6 +1026,7 @@ pinctrl-0 = <&qupv3_se13_i2c_active>; pinctrl-1 = <&qupv3_se13_i2c_sleep>; qcom,wrapper-core = <&qupv3_1>; + qcom,rtl_se; status = "disabled"; }; @@ -1077,6 +1084,7 @@ pinctrl-0 = <&qupv3_se14_i2c_active>; pinctrl-1 = <&qupv3_se14_i2c_sleep>; qcom,wrapper-core = <&qupv3_1>; + qcom,rtl_se; status = "disabled"; }; @@ -1113,6 +1121,7 @@ pinctrl-0 = <&qupv3_se15_i2c_active>; pinctrl-1 = <&qupv3_se15_i2c_sleep>; qcom,wrapper-core = <&qupv3_1>; + qcom,rtl_se; status = "disabled"; }; diff --git a/qcom/direwolf-usb.dtsi b/qcom/direwolf-usb.dtsi index ff4b0d8c..f0f11019 100755 --- a/qcom/direwolf-usb.dtsi +++ b/qcom/direwolf-usb.dtsi @@ -47,6 +47,7 @@ qcom,dwc-usb3-msm-tx-fifo-size = <27696>; qcom,ignore-wakeup-src-in-hostmode; + usb-role-switch; interconnect-names = "usb-ddr", "ddr-usb"; interconnects = <&aggre1_noc MASTER_USB3_0 &mc_virt SLAVE_EBI1>, @@ -70,6 +71,12 @@ maximum-speed = "super-speed-plus"; dr_mode = "otg"; }; + + port { + usb_port0: endpoint { + remote-endpoint = <&usb_port0_connector>; + }; + }; }; /* Primary USB port related High Speed PHY */ @@ -336,6 +343,7 @@ qcom,dwc-usb3-msm-tx-fifo-size = <27696>; qcom,ignore-wakeup-src-in-hostmode; qcom,default-mode-host; + usb-role-switch; interconnect-names = "usb-ddr", "ddr-usb"; interconnects = <&aggre1_noc MASTER_USB3_1 &mc_virt SLAVE_EBI1>, @@ -359,6 +367,12 @@ maximum-speed = "super-speed-plus"; dr_mode = "otg"; }; + + port { + usb_port1: endpoint { + remote-endpoint = <&usb_port1_connector>; + }; + }; }; /* Secondary USB port related High Speed PHY */ diff --git a/qcom/direwolf-vm-la-mt.dtsi b/qcom/direwolf-vm-la-mt.dtsi index 6e159e05..360622f3 100755 --- a/qcom/direwolf-vm-la-mt.dtsi +++ b/qcom/direwolf-vm-la-mt.dtsi @@ -16,16 +16,21 @@ actual-dev = "vda", "vdb", "vdc", "vdd", "vde", "vdf", "vdg", "vdh", "vdi", - "vdj", "vdk"; + "vdj", "vdk", "vdl"; rename-dev = "system", "userdata", "vendor", "persist", "modem", "bluetooth", - "misc", "vbmeta", "boot", "dtbo"; + "misc", "vbmeta", "boot", "dtbo", + "dsp"; rename-dev-ab = "super", "userdata", "metadata", "persist", "modem_a", "bluetooth_a", "misc", "vbmeta_a", "vbmeta_b", - "boot", "dtbo"; + "boot_a", "dtbo_a", "dsp_a"; }; }; + + chosen { + bootargs = "rcupdate.rcu_expedited=1 rcu_nocbs=0-7 cgroup.memory=nokmem,nosocket androidboot.usbcontroller=a600000.dwc3"; + }; }; &usb0 { diff --git a/qcom/direwolf-vm-la.dtsi b/qcom/direwolf-vm-la.dtsi index 465dea2f..00bd996d 100755 --- a/qcom/direwolf-vm-la.dtsi +++ b/qcom/direwolf-vm-la.dtsi @@ -21,16 +21,21 @@ actual-dev = "vda", "vdb", "vdc", "vdd", "vde", "vdf", "vdg", "vdh", "vdi", - "vdj", "vdk"; + "vdj", "vdk", "vdl"; rename-dev = "system", "userdata", "vendor", "persist", "modem", "bluetooth", - "misc", "vbmeta", "boot", "dtbo"; + "misc", "vbmeta", "boot", "dtbo", + "dsp"; rename-dev-ab = "super", "userdata", "metadata", "persist", "modem_a", "bluetooth_a", "misc", "vbmeta_a", "vbmeta_b", - "boot", "dtbo"; + "boot_a", "dtbo_a", "dsp_a"; }; }; + + chosen { + bootargs = "rcupdate.rcu_expedited=1 rcu_nocbs=0-7 cgroup.memory=nokmem,nosocket androidboot.usbcontroller=a600000.dwc3"; + }; }; #include "display/quin-vm-display-la.dtsi" @@ -96,4 +101,167 @@ status = "okay"; }; +&soc { + hsi2s: qcom,hsi2s@3B40000 { + compatible = "qcom,sa8295-hsi2s", "qcom,hsi2s"; + number-of-interfaces = <4>; + reg = <0x3B40000 0x29000>, + <0x3905000 0x6000>; + reg-names = "lpa_if", "lpass_core_cc_hs_if"; + interrupts = <GIC_SPI 719 IRQ_TYPE_LEVEL_HIGH>; + number-of-rate-detectors = <2>; + rate-detector-interfaces = <0 1>; + iommus = <&apps_smmu 0xC2A 0x11>, + <&apps_smmu 0xC34 0x9>, + <&apps_smmu 0xC3E 0x0>; + qcom,iommu-dma-addr-pool = <0x0 0xFFFFFFFF>; + + sdr0: qcom,hs0_i2s { + compatible = "qcom,hsi2s-interface"; + minor-number = <0>; + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&hs1_i2s_sck_active + &hs1_i2s_ws_active &hs1_i2s_data0_active + &hs1_i2s_data1_active>; + pinctrl-1 = <&hs1_i2s_sck_sleep + &hs1_i2s_ws_sleep &hs1_i2s_data0_sleep + &hs1_i2s_data1_sleep>; + bit-clock-hz = <12288000>; + data-buffer-ms = <10>; + bit-depth = <32>; + spkr-channel-count = <2>; + mic-channel-count = <2>; + pcm-rate = <2>; + pcm-sync-src = <0>; + aux-mode = <0>; + rpcm-width = <1>; + tpcm-width = <1>; + enable-tdm = <1>; + tdm-rate = <32>; + tdm-rpcm-width = <16>; + tdm-tpcm-width = <16>; + tdm-sync-delay = <2>; + tdm-inv-sync = <0>; + pcm-lane-config = <1>; + }; + + sdr1: qcom,hs1_i2s { + compatible = "qcom,hsi2s-interface"; + minor-number = <1>; + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&hs2_i2s_sck_active + &hs2_i2s_ws_active &hs2_i2s_data0_active + &hs2_i2s_data1_active>; + pinctrl-1 = <&hs2_i2s_sck_sleep + &hs2_i2s_ws_sleep &hs2_i2s_data0_sleep + &hs2_i2s_data1_sleep>; + bit-clock-hz = <12288000>; + data-buffer-ms = <10>; + bit-depth = <32>; + spkr-channel-count = <2>; + mic-channel-count = <2>; + pcm-rate = <2>; + pcm-sync-src = <0>; + aux-mode = <0>; + rpcm-width = <1>; + tpcm-width = <1>; + enable-tdm = <1>; + tdm-rate = <32>; + tdm-rpcm-width = <16>; + tdm-tpcm-width = <16>; + tdm-sync-delay = <2>; + tdm-inv-sync = <0>; + pcm-lane-config = <1>; + }; + + sdr2: qcom,hs2_i2s { + compatible = "qcom,hsi2s-interface"; + minor-number = <2>; + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&hs3_i2s_sck_active + &hs3_i2s_ws_active &hs3_i2s_data0_active + &hs3_i2s_data1_active>; + pinctrl-1 = <&hs3_i2s_sck_sleep + &hs3_i2s_ws_sleep &hs3_i2s_data0_sleep + &hs3_i2s_data1_sleep>; + bit-clock-hz = <12288000>; + data-buffer-ms = <10>; + bit-depth = <32>; + spkr-channel-count = <2>; + mic-channel-count = <2>; + pcm-rate = <2>; + pcm-sync-src = <0>; + aux-mode = <0>; + rpcm-width = <1>; + tpcm-width = <1>; + enable-tdm = <1>; + tdm-rate = <32>; + tdm-rpcm-width = <16>; + tdm-tpcm-width = <16>; + tdm-sync-delay = <2>; + tdm-inv-sync = <0>; + pcm-lane-config = <1>; + }; + + sdr3: qcom,hs3_i2s { + compatible = "qcom,hsi2s-interface"; + minor-number = <3>; + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&hs4_i2s_sck_active + &hs4_i2s_ws_active &hs4_i2s_data0_active + &hs4_i2s_data1_active>; + pinctrl-1 = <&hs4_i2s_sck_sleep + &hs4_i2s_ws_sleep &hs4_i2s_data0_sleep + &hs4_i2s_data1_sleep>; + bit-clock-hz = <12288000>; + data-buffer-ms = <10>; + bit-depth = <32>; + spkr-channel-count = <2>; + mic-channel-count = <2>; + pcm-rate = <2>; + pcm-sync-src = <0>; + aux-mode = <0>; + rpcm-width = <1>; + tpcm-width = <1>; + enable-tdm = <1>; + tdm-rate = <32>; + tdm-rpcm-width = <16>; + tdm-tpcm-width = <16>; + tdm-sync-delay = <2>; + tdm-inv-sync = <0>; + pcm-lane-config = <1>; + }; + + sdr4: qcom,hs4_i2s { + compatible = "qcom,hsi2s-interface"; + minor-number = <4>; + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&hs5_i2s_sck_active + &hs5_i2s_ws_active &hs5_i2s_data0_active + &hs5_i2s_data1_active>; + pinctrl-1 = <&hs5_i2s_sck_sleep + &hs5_i2s_ws_sleep &hs5_i2s_data0_sleep + &hs5_i2s_data1_sleep>; + bit-clock-hz = <12288000>; + data-buffer-ms = <10>; + bit-depth = <32>; + spkr-channel-count = <2>; + mic-channel-count = <2>; + pcm-rate = <2>; + pcm-sync-src = <0>; + aux-mode = <0>; + rpcm-width = <1>; + tpcm-width = <1>; + enable-tdm = <1>; + tdm-rate = <32>; + tdm-rpcm-width = <16>; + tdm-tpcm-width = <16>; + tdm-sync-delay = <2>; + tdm-inv-sync = <0>; + pcm-lane-config = <1>; + status = "disabled"; + }; + }; +}; + #include "direwolf-vm-gnss.dtsi" diff --git a/qcom/direwolf-vm-la1-mt.dtsi b/qcom/direwolf-vm-la1-mt.dtsi index 74f29e19..8a21bf21 100755 --- a/qcom/direwolf-vm-la1-mt.dtsi +++ b/qcom/direwolf-vm-la1-mt.dtsi @@ -1,5 +1,5 @@ &hab { - vmid = <3>; + vmid = <5>; }; &reserved_memory { @@ -18,14 +18,15 @@ actual-dev = "vda", "vdb", "vdc", "vdd", "vde", "vdf", "vdg", "vdh", "vdi", - "vdj", "vdk"; + "vdj", "vdk", "vdl"; rename-dev = "system", "userdata", "vendor", "persist", "modem", "bluetooth", - "misc", "vbmeta", "boot", "dtbo"; + "misc", "vbmeta", "boot", "dtbo", + "dsp"; rename-dev-ab = "super", "userdata", "metadata", "persist", "modem_a", "bluetooth_a", "misc", "vbmeta_a", "vbmeta_b", - "boot", "dtbo"; + "boot_a", "dtbo_a", "dsp_a"; }; rename_net: rename_net { @@ -34,8 +35,15 @@ rename-dev = "eth1"; }; }; + + chosen { + bootargs = "rcupdate.rcu_expedited=1 rcu_nocbs=0-7 cgroup.memory=nokmem,nosocket androidboot.usbcontroller=a800000.dwc3"; + }; }; +#include "display/quin-vm-display-la1.dtsi" + + &qcom_rng_ee4 { status = "okay"; }; diff --git a/qcom/direwolf-vm-usb.dtsi b/qcom/direwolf-vm-usb.dtsi index 3b178a90..247b22fd 100755 --- a/qcom/direwolf-vm-usb.dtsi +++ b/qcom/direwolf-vm-usb.dtsi @@ -45,6 +45,7 @@ qcom,core-clk-rate-hs = <66666667>; qcom,dwc-usb3-msm-tx-fifo-size = <27696>; + qcom,ignore-wakeup-src-in-hostmode; status = "disabled"; @@ -59,6 +60,7 @@ snps,hird-threshold = /bits/ 8 <0x0>; snps,ssp-u3-u0-quirk; snps,is-utmi-l1-suspend; + snps,usb2-gadget-lpm-disable; snps,dis-u1-entry-quirk; snps,dis-u2-entry-quirk; tx-fifo-resize; @@ -84,6 +86,10 @@ resets = <&gcc GCC_QUSB2PHY_PRIM_BCR>; reset-names = "phy_reset"; + qcom,param-override-seq = + <0x63 0x6c /* override_x0 */ + 0xC8 0x70 /* override_x1 */ + 0x17 0x74>; /* override x2 */ status = "disabled"; }; @@ -135,7 +141,7 @@ qcom,core-clk-rate-hs = <66666667>; qcom,dwc-usb3-msm-tx-fifo-size = <27696>; - + qcom,ignore-wakeup-src-in-hostmode; qcom,default-mode-host; status = "disabled"; @@ -152,6 +158,7 @@ snps,is-utmi-l1-suspend; snps,dis-u1-entry-quirk; snps,dis-u2-entry-quirk; + snps,usb2-gadget-lpm-disable; tx-fifo-resize; maximum-speed = "high-speed"; dr_mode = "otg"; @@ -175,6 +182,10 @@ resets = <&gcc GCC_USB2_PHY_SEC_BCR>; reset-names = "phy_reset"; + qcom,param-override-seq = + <0x63 0x6c /* override_x0 */ + 0xC8 0x70 /* override_x1 */ + 0x17 0x74>; /* override x2 */ status = "disabled"; }; @@ -228,6 +239,7 @@ reset-names = "core_reset"; qcom,core-clk-rate = <200000000>; + qcom,ignore-wakeup-src-in-hostmode; status = "disabled"; @@ -245,8 +257,6 @@ snps,hird-threshold = /bits/ 8 <0x0>; snps,ssp-u3-u0-quirk; snps,is-utmi-l1-suspend; - snps,dis-u1-entry-quirk; - snps,dis-u2-entry-quirk; snps,dis_u3_susphy_quirk; maximum-speed = "high-speed"; dr_mode = "host"; @@ -270,8 +280,8 @@ resets = <&gcc GCC_QUSB2PHY_HS0_MP_BCR>; reset-names = "phy_reset"; qcom,param-override-seq = - <0xe6 0x6c /* override_x0 */ - 0x0b 0x70 /* override_x1 */ + <0x63 0x6c /* override_x0 */ + 0xC8 0x70 /* override_x1 */ 0x17 0x74>; /* override x2 */ status = "disabled"; @@ -294,8 +304,8 @@ resets = <&gcc GCC_QUSB2PHY_HS1_MP_BCR>; reset-names = "phy_reset"; qcom,param-override-seq = - <0xe6 0x6c /* override_x0 */ - 0x0b 0x70 /* override_x1 */ + <0x63 0x6c /* override_x0 */ + 0xC8 0x70 /* override_x1 */ 0x17 0x74>; /* override x2 */ status = "disabled"; @@ -318,8 +328,8 @@ resets = <&gcc GCC_QUSB2PHY_HS2_MP_BCR>; reset-names = "phy_reset"; qcom,param-override-seq = - <0xe6 0x6c /* override_x0 */ - 0x0b 0x70 /* override_x1 */ + <0x63 0x6c /* override_x0 */ + 0xC8 0x70 /* override_x1 */ 0x17 0x74>; /* override x2 */ status = "disabled"; @@ -342,8 +352,8 @@ resets = <&gcc GCC_QUSB2PHY_HS3_MP_BCR>; reset-names = "phy_reset"; qcom,param-override-seq = - <0xe6 0x6c /* override_x0 */ - 0x0b 0x70 /* override_x1 */ + <0x63 0x6c /* override_x0 */ + 0xC8 0x70 /* override_x1 */ 0x17 0x74>; /* override x2 */ status = "disabled"; diff --git a/qcom/direwolf.dtsi b/qcom/direwolf.dtsi index fe8c7b2f..c8c42fc7 100755 --- a/qcom/direwolf.dtsi +++ b/qcom/direwolf.dtsi @@ -2874,6 +2874,33 @@ status = "ok"; }; +&video_cc_mvs0_gdsc { + clocks = <&gcc GCC_VIDEO_AHB_CLK>; + clock-names = "ahb_clk"; + parent-supply = <&VDD_MM_LEVEL>; + status = "ok"; +}; + +&video_cc_mvs0c_gdsc { + clocks = <&gcc GCC_VIDEO_AHB_CLK>; + clock-names = "ahb_clk"; + parent-supply = <&VDD_MM_LEVEL>; + status = "ok"; +}; + +&video_cc_mvs1_gdsc { + clocks = <&gcc GCC_VIDEO_AHB_CLK>; + clock-names = "ahb_clk"; + parent-supply = <&VDD_MM_LEVEL>; + status = "ok"; +}; + +&video_cc_mvs1c_gdsc { + clocks = <&gcc GCC_VIDEO_AHB_CLK>; + clock-names = "ahb_clk"; + parent-supply = <&VDD_MM_LEVEL>; + status = "ok"; +}; &gpu_cc_cx_gdsc { clocks = <&gcc GCC_GPU_CFG_AHB_CLK>; @@ -2892,6 +2919,41 @@ status = "ok"; }; +&qupv3_se0_i2c { + status = "ok"; + usb0_typec: usb0_typec@21 { + compatible = "ti,tps6598x"; + reg = <0x21>; + interrupt-parent = <&tlmm>; + interrupts = <138 IRQ_TYPE_LEVEL_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&tps_i2c_intr>; + + connector { + port { + usb_port0_connector: endpoint { + remote-endpoint = <&usb_port0>; + }; + }; + }; + }; + + usb1_typec: usb1_typec@25 { + compatible = "ti,tps6598x"; + reg = <0x25>; + interrupt-parent = <&tlmm>; + interrupts = <138 IRQ_TYPE_LEVEL_LOW>; + + connector { + port { + usb_port1_connector: endpoint { + remote-endpoint = <&usb_port1>; + }; + }; + }; + }; +}; + &qupv3_se17_2uart { status = "ok"; }; @@ -2962,9 +3024,8 @@ compatible = "qcom,stmmac-ethqos"; qcom,arm-smmu; reg = <0x20000 0x10000>, - <0x36000 0x100>, - <0x3D00000 0x300000>; - reg-names = "stmmaceth", "rgmii","tlmm-central-base"; + <0x36000 0x100>; + reg-names = "stmmaceth", "rgmii"; clocks = <&gcc GCC_EMAC0_AXI_CLK>, <&gcc GCC_EMAC0_SLV_AHB_CLK>, <&gcc GCC_EMAC0_PTP_CLK>, @@ -2983,7 +3044,7 @@ snps,mtl-tx-config = <&mtl_tx_setup>; snps,reset-gpios = <&pm8540_1_gpios 1 GPIO_ACTIVE_HIGH>; - vreg_rgmii-supply = <&pm8540_a0_l2>; + vreg_emac_phy-supply = <&pm8540_a0_l2>; gdsc_emac-supply = <&gcc_emac0_gdsc>; qcom,phy-intr-redirect = <&tlmm 127 GPIO_ACTIVE_LOW>; pinctrl-names = "dev-emac-mdc", diff --git a/qcom/holi-qupv3.dtsi b/qcom/holi-qupv3.dtsi index 3376a25d..cbc8be21 100755 --- a/qcom/holi-qupv3.dtsi +++ b/qcom/holi-qupv3.dtsi @@ -158,6 +158,7 @@ <&gpi_dma0 1 2 3 64 0>; dma-names = "tx", "rx"; qcom,wrapper-core = <&qupv3_0>; + qcom,rtl_se; status = "disabled"; }; @@ -241,6 +242,7 @@ <&gpi_dma1 1 0 3 64 0>; dma-names = "tx", "rx"; qcom,wrapper-core = <&qupv3_1>; + qcom,rtl_se; status = "disabled"; }; @@ -283,6 +285,7 @@ <&gpi_dma1 1 1 3 64 0>; dma-names = "tx", "rx"; qcom,wrapper-core = <&qupv3_1>; + qcom,rtl_se; status = "disabled"; }; @@ -303,6 +306,7 @@ <&gpi_dma1 1 2 3 64 0>; dma-names = "tx", "rx"; qcom,wrapper-core = <&qupv3_1>; + qcom,rtl_se; status = "disabled"; }; diff --git a/qcom/lemans-gdsc.dtsi b/qcom/lemans-gdsc.dtsi new file mode 100755 index 00000000..d0da844f --- /dev/null +++ b/qcom/lemans-gdsc.dtsi @@ -0,0 +1,59 @@ +#include "direwolf-gdsc.dtsi" + +&soc { + /delete-node/ qcom,gdsc@177004; + /delete-node/ syscon@152128; + + gcc_apcs_gdsc_vote_ctrl: syscon@14b104 { + compatible = "syscon"; + reg = <0x14b104 0x4>; + }; + + gcc_pcie_0_gdsc: qcom,gdsc@1a9004 { + compatible = "qcom,gdsc"; + reg = <0x1a9004 0x4>; + qcom,support-hw-trigger; + qcom,no-status-check-on-disable; + qcom,collapse-vote = <&gcc_apcs_gdsc_vote_ctrl 0>; + qcom,retain-regs; + regulator-name = "gcc_pcie_0_gdsc"; + status = "disabled"; + }; + + gcc_pcie_1_gdsc: qcom,gdsc@177004 { + compatible = "qcom,gdsc"; + reg = <0x177004 0x4>; + qcom,support-hw-trigger; + qcom,retain-regs; + qcom,no-status-check-on-disable; + qcom,collapse-vote = <&gcc_apcs_gdsc_vote_ctrl 1>; + regulator-name = "gcc_pcie_1_gdsc"; + status = "disabled"; + }; + + gcc_ufs_phy_gdsc: qcom,gdsc@183004 { + compatible = "qcom,gdsc"; + reg = <0x183004 0x4>; + qcom,retain-regs; + regulator-name = "gcc_ufs_phy_gdsc"; + status = "disabled"; + }; + + gcc_usb20_prim_gdsc: qcom,gdsc@11c004 { + compatible = "qcom,gdsc"; + reg = <0x11c004 0x4>; + regulator-name = "gcc_usb20_prim_gdsc"; + qcom,retain-regs; + status = "disabled"; + }; + + gpu_cc_gx_acd_reset: syscon@3d99358 { + compatible = "syscon"; + reg = <0x3d99358 0x4>; + }; + + gpu_cc_gx_acd_iroot_reset: syscon@3d9958c { + compatible = "syscon"; + reg = <0x3d9958c 0x4>; + }; +}; diff --git a/qcom/lemans-rumi.dtsi b/qcom/lemans-rumi.dtsi index 35a248a0..a6b2a500 100755 --- a/qcom/lemans-rumi.dtsi +++ b/qcom/lemans-rumi.dtsi @@ -1,4 +1,5 @@ #include "lemans.dtsi" +#include <dt-bindings/clock/qcom,gcc-lemans.h> &arch_timer { clock-frequency = <500000>; @@ -56,3 +57,26 @@ &tsens3 { status = "disabled"; }; + +&gcc { + clocks = <&bi_tcxo>, <&pcie_0_pipe_clk>, <&pcie_1_pipe_clk>, + <&pcie_phy_aux_clk>, <&rxc0_ref_clk>, <&rxc1_ref_clk>, + <&sleep_clk>, <&ufs_card_rx_symbol_0_clk>, <&ufs_card_rx_symbol_1_clk>, + <&ufs_card_tx_symbol_0_clk>, <&ufs_phy_rx_symbol_0_clk>, + <&ufs_phy_rx_symbol_1_clk>, <&ufs_phy_tx_symbol_0_clk>, + <&usb3_phy_wrapper_gcc_usb30_prim_pipe_clk>, + <&usb3_phy_wrapper_gcc_usb30_sec_pipe_clk>; +}; + +&camcc { + clocks = <&bi_tcxo>, <&gcc GCC_CAMERA_AHB_CLK>, <&sleep_clk>; +}; + +&videocc { + clocks = <&bi_tcxo>, <&gcc GCC_VIDEO_AHB_CLK>, <&sleep_clk>; +}; + +&gpucc { + clocks = <&bi_tcxo>, <&gcc GCC_GPU_CFG_AHB_CLK>, + <&gcc GCC_GPU_GPLL0_CLK_SRC>, <&gcc GCC_GPU_GPLL0_DIV_CLK_SRC>; +}; diff --git a/qcom/lemans-smp2p.dtsi b/qcom/lemans-smp2p.dtsi new file mode 100755 index 00000000..79ee60f6 --- /dev/null +++ b/qcom/lemans-smp2p.dtsi @@ -0,0 +1,182 @@ +#include <dt-bindings/interrupt-controller/arm-gic.h> +#include <dt-bindings/soc/qcom,ipcc.h> + +&soc { + qcom,smp2p-adsp { + compatible = "qcom,smp2p"; + qcom,smem = <443>, <429>; + interrupt-parent = <&ipcc_mproc>; + interrupts = <IPCC_CLIENT_LPASS IPCC_MPROC_SIGNAL_SMP2P + IRQ_TYPE_EDGE_RISING>; + mboxes = <&ipcc_mproc IPCC_CLIENT_LPASS + IPCC_MPROC_SIGNAL_SMP2P>; + qcom,local-pid = <0>; + qcom,remote-pid = <2>; + + adsp_smp2p_out: master-kernel { + qcom,entry-name = "master-kernel"; + #qcom,smem-state-cells = <1>; + }; + + adsp_smp2p_in: slave-kernel { + qcom,entry-name = "slave-kernel"; + interrupt-controller; + #interrupt-cells = <2>; + }; + + smp2p_rdbg2_out: qcom,smp2p-rdbg2-out { + qcom,entry-name = "rdbg"; + #qcom,smem-state-cells = <1>; + }; + + smp2p_rdbg2_in: qcom,smp2p-rdbg2-in { + qcom,entry-name = "rdbg"; + interrupt-controller; + #interrupt-cells = <2>; + }; + }; + + qcom,smp2p-cdsp@1799000c { + compatible = "qcom,smp2p"; + qcom,smem = <94>, <432>; + interrupt-parent = <&ipcc_mproc>; + interrupts = <IPCC_CLIENT_CDSP IPCC_MPROC_SIGNAL_SMP2P + IRQ_TYPE_EDGE_RISING>; + mboxes = <&ipcc_mproc IPCC_CLIENT_CDSP IPCC_MPROC_SIGNAL_SMP2P>; + qcom,local-pid = <0>; + qcom,remote-pid = <5>; + + cdsp_smp2p_out: master-kernel { + qcom,entry-name = "master-kernel"; + #qcom,smem-state-cells = <1>; + }; + + cdsp_smp2p_in: slave-kernel { + qcom,entry-name = "slave-kernel"; + interrupt-controller; + #interrupt-cells = <2>; + }; + + smp2p_rdbg5_out: qcom,smp2p-rdbg5-out { + qcom,entry-name = "rdbg"; + #qcom,smem-state-cells = <1>; + }; + + smp2p_rdbg5_in: qcom,smp2p-rdbg5-in { + qcom,entry-name = "rdbg"; + interrupt-controller; + #interrupt-cells = <2>; + }; + + smp2p_qvrexternal5_out: qcom,smp2p-qvrexternal5-out { + qcom,entry-name = "qvrexternal"; + #qcom,smem-state-cells = <1>; + }; + }; + + qcom,smp2p-cdsp1@1799000c { + compatible = "qcom,smp2p"; + qcom,smem = <617>, <616>; + interrupt-parent = <&ipcc_mproc>; + interrupts = <IPCC_CLIENT_NSP1 IPCC_MPROC_SIGNAL_SMP2P + IRQ_TYPE_EDGE_RISING>; + mboxes = <&ipcc_mproc IPCC_CLIENT_NSP1 IPCC_MPROC_SIGNAL_SMP2P>; + qcom,local-pid = <0>; + qcom,remote-pid = <12>; + + cdsp1_smp2p_out: master-kernel { + qcom,entry-name = "master-kernel"; + #qcom,smem-state-cells = <1>; + }; + + cdsp1_smp2p_in: slave-kernel { + qcom,entry-name = "slave-kernel"; + interrupt-controller; + #interrupt-cells = <2>; + }; + + smp2p_rdbg12_out: qcom,smp2p-rdbg12-out { + qcom,entry-name = "rdbg"; + #qcom,smem-state-cells = <1>; + }; + + smp2p_rdbg12_in: qcom,smp2p-rdbg12-in { + qcom,entry-name = "rdbg"; + interrupt-controller; + #interrupt-cells = <2>; + }; + + smp2p_qvrexternal12_out: qcom,smp2p-qvrexternal12-out { + qcom,entry-name = "qvrexternal"; + #qcom,smem-state-cells = <1>; + }; + }; + + qcom,smp2p-gpdsp0 { + compatible = "qcom,smp2p"; + qcom,smem = <617>, <616>; + interrupt-parent = <&ipcc_mproc>; + interrupts = <IPCC_CLIENT_GPDSP0 IPCC_MPROC_SIGNAL_SMP2P + IRQ_TYPE_EDGE_RISING>; + mboxes = <&ipcc_mproc IPCC_CLIENT_GPDSP0 + IPCC_MPROC_SIGNAL_SMP2P>; + qcom,local-pid = <0>; + qcom,remote-pid = <17>; + + gpdsp0_smp2p_out: master-kernel { + qcom,entry-name = "master-kernel"; + #qcom,smem-state-cells = <1>; + }; + + gpdsp0_smp2p_in: slave-kernel { + qcom,entry-name = "slave-kernel"; + interrupt-controller; + #interrupt-cells = <2>; + }; + + smp2p_rdbg17_out: qcom,smp2p-rdbg2-out { + qcom,entry-name = "rdbg"; + #qcom,smem-state-cells = <1>; + }; + + smp2p_rdbg17_in: qcom,smp2p-rdbg2-in { + qcom,entry-name = "rdbg"; + interrupt-controller; + #interrupt-cells = <2>; + }; + }; + + qcom,smp2p-gpdsp1 { + compatible = "qcom,smp2p"; + qcom,smem = <617>, <616>; + interrupt-parent = <&ipcc_mproc>; + interrupts = <IPCC_CLIENT_GPDSP1 IPCC_MPROC_SIGNAL_SMP2P + IRQ_TYPE_EDGE_RISING>; + mboxes = <&ipcc_mproc IPCC_CLIENT_GPDSP1 + IPCC_MPROC_SIGNAL_SMP2P>; + qcom,local-pid = <0>; + qcom,remote-pid = <18>; + + gpdsp1_smp2p_out: master-kernel { + qcom,entry-name = "master-kernel"; + #qcom,smem-state-cells = <1>; + }; + + gpdsp1_smp2p_in: slave-kernel { + qcom,entry-name = "slave-kernel"; + interrupt-controller; + #interrupt-cells = <2>; + }; + + smp2p_rdbg18_out: qcom,smp2p-rdbg2-out { + qcom,entry-name = "rdbg"; + #qcom,smem-state-cells = <1>; + }; + + smp2p_rdbg18_in: qcom,smp2p-rdbg2-in { + qcom,entry-name = "rdbg"; + interrupt-controller; + #interrupt-cells = <2>; + }; + }; +}; diff --git a/qcom/lemans.dtsi b/qcom/lemans.dtsi index 46100347..d83b45d6 100755 --- a/qcom/lemans.dtsi +++ b/qcom/lemans.dtsi @@ -7,6 +7,8 @@ #include <dt-bindings/interconnect/qcom,epss-l3.h> #include <dt-bindings/interconnect/qcom,lemans.h> #include <dt-bindings/interrupt-controller/arm-gic.h> +#include <dt-bindings/soc/qcom,rpmh-rsc.h> +#include <dt-bindings/soc/qcom,ipcc.h> / { model = "Qualcomm Technologies, Inc. Lemans"; @@ -367,6 +369,28 @@ ranges = <0 0 0 0xffffffff>; compatible = "simple-bus"; + apps_rsc: rsc@18200000 { + label = "apps_rsc"; + compatible = "qcom,rpmh-rsc"; + reg = <0x18200000 0x10000>, + <0x18210000 0x10000>, + <0x18220000 0x10000>; + reg-names = "drv-0", "drv-1", "drv-2"; + interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; + qcom,tcs-offset = <0xd00>; + qcom,drv-id = <2>; + qcom,tcs-config = <ACTIVE_TCS 2>, + <SLEEP_TCS 3>, + <WAKE_TCS 3>, + <CONTROL_TCS 0>; + + apps_bcm_voter: bcm_voter { + compatible = "qcom,bcm-voter"; + }; + }; + intc: interrupt-controller@17a00000 { compatible = "arm,gic-v3"; #interrupt-cells = <3>; @@ -492,7 +516,7 @@ clocks { xo_board: xo_board { compatible = "fixed-clock"; - clock-frequency = <19200000>; + clock-frequency = <38400000>; clock-output-names = "xo_board"; #clock-cells = <0>; }; @@ -500,7 +524,7 @@ bi_tcxo: bi_tcxo { compatible = "fixed-factor-clock"; clock-mult = <1>; - clock-div = <1>; + clock-div = <2>; clocks = <&xo_board>; clock-output-names = "bi_tcxo"; #clock-cells = <0>; @@ -509,7 +533,7 @@ bi_tcxo_ao: bi_tcxo_ao { compatible = "fixed-factor-clock"; clock-mult = <1>; - clock-div = <1>; + clock-div = <2>; clocks = <&xo_board>; clock-output-names = "bi_tcxo_ao"; #clock-cells = <0>; @@ -543,6 +567,20 @@ #clock-cells = <0>; }; + rxc0_ref_clk: rxc0_ref_clk { + compatible = "fixed-clock"; + clock-frequency = <1000>; + clock-output-names = "rxc0_ref_clk"; + #clock-cells = <0>; + }; + + rxc1_ref_clk: rxc1_ref_clk { + compatible = "fixed-clock"; + clock-frequency = <1000>; + clock-output-names = "rxc0_ref_clk"; + #clock-cells = <0>; + }; + ufs_card_rx_symbol_0_clk: ufs_card_rx_symbol_0_clk { compatible = "fixed-clock"; clock-frequency = <1000>; @@ -607,9 +645,38 @@ #reset-cells = <1>; }; + gcc: clock-controller@100000 { + compatible = "qcom,lemans-gcc", "syscon"; + reg = <0x100000 0xc7018>; + reg-name = "cc_base"; + vdd_cx-supply = <&VDD_CX_LEVEL>; + clocks = <&rpmhcc RPMH_CXO_CLK>, <&pcie_0_pipe_clk>, <&pcie_1_pipe_clk>, + <&pcie_phy_aux_clk>, <&rxc0_ref_clk>, <&rxc1_ref_clk>, <&sleep_clk>, + <&ufs_card_rx_symbol_0_clk>, <&ufs_card_rx_symbol_1_clk>, + <&ufs_card_tx_symbol_0_clk>, <&ufs_phy_rx_symbol_0_clk>, + <&ufs_phy_rx_symbol_1_clk>, <&ufs_phy_tx_symbol_0_clk>, + <&usb3_phy_wrapper_gcc_usb30_prim_pipe_clk>, + <&usb3_phy_wrapper_gcc_usb30_sec_pipe_clk>; + clock-names = "bi_tcxo", "pcie_0_pipe_clk", "pcie_1_pipe_clk", + "pcie_phy_aux_clk", "rxc0_ref_clk", "rxc1_ref_clk", "sleep_clk", + "ufs_card_rx_symbol_0_clk", "ufs_card_rx_symbol_1_clk", + "ufs_card_tx_symbol_0_clk", "ufs_phy_rx_symbol_0_clk", + "ufs_phy_rx_symbol_1_clk", "ufs_phy_tx_symbol_0_clk", + "usb3_phy_wrapper_gcc_usb30_prim_pipe_clk", + "usb3_phy_wrapper_gcc_usb30_sec_pipe_clk"; + #clock-cells = <1>; + #reset-cells = <1>; + }; + camcc: clock-controller@ade0000 { - compatible = "qcom,dummycc"; - clock-output-names = "camcc_clocks"; + compatible = "qcom,lemans-camcc", "syscon"; + reg = <0xade0000 0x20000>; + reg-name = "cc_base"; + vdd_mm-supply = <&VDD_MM_LEVEL>; + vdd_mxa-supply = <&VDD_MXA_LEVEL>; + vdd_mxc-supply = <&VDD_MXC_LEVEL>; + clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GCC_CAMERA_AHB_CLK>, <&sleep_clk>; + clock-names = "bi_tcxo", "iface", "sleep_clk"; #clock-cells = <1>; #reset-cells = <1>; }; @@ -628,23 +695,27 @@ #reset-cells = <1>; }; - gcc: clock-controller@100000 { - compatible = "qcom,dummycc"; - clock-output-names = "gcc_clocks"; - #clock-cells = <1>; - #reset-cells = <1>; - }; - gpucc: clock-controller@3d90000 { - compatible = "qcom,dummycc"; - clock-output-names = "gpucc_clocks"; + compatible = "qcom,lemans-gpucc", "syscon"; + reg = <0x3d90000 0xa000>; + reg-name = "cc_base"; + vdd_cx-supply = <&VDD_CX_LEVEL>; + vdd_mxa-supply = <&VDD_MXA_LEVEL>; + clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GCC_GPU_CFG_AHB_CLK>, + <&gcc GCC_GPU_GPLL0_CLK_SRC>, <&gcc GCC_GPU_GPLL0_DIV_CLK_SRC>; + clock-names = "bi_tcxo", "iface", "gpll0_out_main", "gpll0_out_main_div"; #clock-cells = <1>; #reset-cells = <1>; }; videocc: clock-controller@abf0000 { - compatible = "qcom,dummycc"; - clock-output-names = "videocc_clocks"; + compatible = "qcom,lemans-videocc", "syscon"; + reg = <0xabf0000 0x10000>; + reg-name = "cc_base"; + vdd_mm-supply = <&VDD_MM_LEVEL>; + vdd_mx-supply = <&VDD_MXA_LEVEL>; + clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GCC_VIDEO_AHB_CLK>, <&sleep_clk>; + clock-names = "bi_tcxo", "iface", "sleep_clk"; #clock-cells = <1>; #reset-cells = <1>; }; @@ -662,77 +733,103 @@ clk_virt: interconnect@0 { compatible = "qcom,lemans-clk_virt"; #interconnect-cells = <1>; + qcom,bcm-voter-names = "hlos"; + qcom,bcm-voters = <&apps_bcm_voter>; }; mc_virt: interconnect@1 { compatible = "qcom,lemans-mc_virt"; #interconnect-cells = <1>; + qcom,bcm-voter-names = "hlos"; + qcom,bcm-voters = <&apps_bcm_voter>; }; config_noc: interconnect@014C0000 { compatible = "qcom,lemans-config_noc"; reg = <0x014C0000 0x13080>; #interconnect-cells = <1>; + qcom,bcm-voter-names = "hlos"; + qcom,bcm-voters = <&apps_bcm_voter>; }; system_noc: interconnect@01680000 { compatible = "qcom,lemans-system_noc"; reg = <0x01680000 0x15080>; #interconnect-cells = <1>; + qcom,bcm-voter-names = "hlos"; + qcom,bcm-voters = <&apps_bcm_voter>; }; aggre1_noc:interconnect@016C0000 { compatible = "qcom,lemans-aggre1_noc"; reg = <0x016C0000 0x18080>; #interconnect-cells = <1>; + qcom,bcm-voter-names = "hlos"; + qcom,bcm-voters = <&apps_bcm_voter>; }; aggre2_noc: interconnect@01700000 { compatible = "qcom,lemans-aggre2_noc"; reg = <0x01700000 0x1B080>; #interconnect-cells = <1>; + qcom,bcm-voter-names = "hlos"; + qcom,bcm-voters = <&apps_bcm_voter>; }; pcie_anoc: interconnect@01760000 { compatible = "qcom,lemans-pcie_anoc"; reg = <0x01760000 0xC080>; #interconnect-cells = <1>; + qcom,bcm-voter-names = "hlos"; + qcom,bcm-voters = <&apps_bcm_voter>; }; mmss_noc: interconnect@017A0000 { compatible = "qcom,lemans-mmss_noc"; reg = <0x017A0000 0x40000>; #interconnect-cells = <1>; + qcom,bcm-voter-names = "hlos"; + qcom,bcm-voters = <&apps_bcm_voter>; }; lpass_ag_noc: interconnect@03C40000 { compatible = "qcom,lemans-lpass_ag_noc"; reg = <0x3C40000 0x17200>; #interconnect-cells = <1>; + qcom,bcm-voter-names = "hlos"; + qcom,bcm-voters = <&apps_bcm_voter>; }; dc_noc: interconnect@090E0000 { compatible = "qcom,lemans-dc_noc"; reg = <0x090E0000 0x5080>; #interconnect-cells = <1>; + qcom,bcm-voter-names = "hlos"; + qcom,bcm-voters = <&apps_bcm_voter>; }; gem_noc: interconnect@09100000 { compatible = "qcom,lemans-gem_noc"; reg = <0x09100000 0xF6080>; #interconnect-cells = <1>; + qcom,bcm-voter-names = "hlos"; + qcom,bcm-voters = <&apps_bcm_voter>; }; nspa_noc: interconnect@260C0000 { compatible = "qcom,lemans-nspa_noc"; reg = <0x260C0000 0x16080>; #interconnect-cells = <1>; + qcom,bcm-voter-names = "hlos"; + qcom,bcm-voters = <&apps_bcm_voter>; }; nspb_noc: interconnect@2A0C0000 { compatible = "qcom,lemans-nspb_noc"; reg = <0x2A0C0000 0x16080>; #interconnect-cells = <1>; + qcom,bcm-voter-names = "hlos"; + qcom,bcm-voters = <&apps_bcm_voter>; }; epss_l3_cpu: l3_cpu@18590000 { @@ -742,16 +839,291 @@ thermal_zones: thermal-zones { }; + + ipcc_mproc: qcom,ipcc@408000 { + compatible = "qcom,ipcc"; + reg = <0x408000 0x1000>; + interrupts = <GIC_SPI 229 IRQ_TYPE_LEVEL_HIGH>; + interrupt-controller; + #interrupt-cells = <3>; + #mbox-cells = <2>; + }; + + tcsr_mutex_block: syscon@1f40000 { + compatible = "syscon"; + reg = <0x1f40000 0x20000>; + }; + + tcsr_mutex: hwlock@1f40000 { + compatible = "qcom,tcsr-mutex"; + syscon = <&tcsr_mutex_block 0 0x1000>; + #hwlock-cells = <1>; + }; + + smem: qcom,smem { + compatible = "qcom,smem"; + memory-region = <&smem_mem>; + hwlocks = <&tcsr_mutex 3>; + }; + + qmp_aop: qcom,qmp-aop@c300000 { + compatible = "qcom,qmp-mbox"; + mboxes = <&ipcc_mproc IPCC_CLIENT_AOP + IPCC_MPROC_SIGNAL_GLINK_QMP>; + mbox-names = "aop_qmp"; + interrupt-parent = <&ipcc_mproc>; + interrupts = <IPCC_CLIENT_AOP + IPCC_MPROC_SIGNAL_GLINK_QMP + IRQ_TYPE_EDGE_RISING>; + reg = <0xc300000 0x400>; + reg-names = "msgram"; + + label = "aop"; + qcom,early-boot; + priority = <0>; + mbox-desc-offset = <0x0>; + #mbox-cells = <1>; + }; + + qcom,glink { + compatible = "qcom,glink"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + glink_adsp: adsp { + qcom,remote-pid = <2>; + transport = "smem"; + mboxes = <&ipcc_mproc IPCC_CLIENT_LPASS + IPCC_MPROC_SIGNAL_GLINK_QMP>; + mbox-names = "adsp_smem"; + interrupt-parent = <&ipcc_mproc>; + interrupts = <IPCC_CLIENT_LPASS + IPCC_MPROC_SIGNAL_GLINK_QMP + IRQ_TYPE_EDGE_RISING>; + + label = "adsp"; + qcom,glink-label = "lpass"; + cpu-affinity = <1 2>; + + qcom,adsp_qrtr { + qcom,glink-channels = "IPCRTR"; + qcom,intents = <0x800 5 + 0x2000 3 + 0x4400 2>; + }; + + qcom,apr_tal_rpmsg { + qcom,glink-channels = "apr_audio_svc"; + qcom,intents = <0x200 20>; + }; + + qcom,msm_fastrpc_rpmsg { + compatible = "qcom,msm-fastrpc-rpmsg"; + qcom,glink-channels = "fastrpcglink-apps-dsp"; + qcom,intents = <0x64 64>; + }; + + qcom,adsp_glink_ssr { + qcom,glink-channels = "glink_ssr"; + qcom,notify-edges = <&glink_gpdsp0>, + <&glink_gpdsp1>; + }; + }; + + glink_cdsp0: cdsp0 { + qcom,remote-pid = <5>; + transport = "smem"; + mboxes = <&ipcc_mproc IPCC_CLIENT_CDSP + IPCC_MPROC_SIGNAL_GLINK_QMP>; + mbox-names = "cdsp0_smem"; + interrupt-parent = <&ipcc_mproc>; + interrupts = <IPCC_CLIENT_CDSP + IPCC_MPROC_SIGNAL_GLINK_QMP + IRQ_TYPE_EDGE_RISING>; + + label = "cdsp0"; + qcom,glink-label = "cdsp0"; + + qcom,cdsp0_qrtr { + qcom,glink-channels = "IPCRTR"; + qcom,intents = <0x800 5 + 0x2000 3 + 0x4400 2>; + }; + + qcom,msm_fastrpc_rpmsg { + compatible = "qcom,msm-fastrpc-rpmsg"; + qcom,glink-channels = "fastrpcglink-apps-dsp"; + qcom,intents = <0x64 64>; + }; + + qcom,msm_cdsprm_rpmsg { + compatible = "qcom,msm-cdsprm-rpmsg"; + qcom,glink-channels = "cdsprmglink-apps-dsp"; + qcom,intents = <0x20 12>; + + msm_cdsp_rm: qcom,msm_cdsp_rm { + compatible = "qcom,msm-cdsp-rm"; + qcom,qos-latency-us = <44>; + qcom,qos-maxhold-ms = <20>; + qcom,compute-cx-limit-en; + qcom,compute-priority-mode = <2>; + #cooling-cells = <2>; + }; + }; + + qcom,cdsp0_glink_ssr { + qcom,glink-channels = "glink_ssr"; + qcom,notify-edges = <&glink_adsp>, + <&glink_cdsp1>; + }; + }; + + glink_cdsp1: cdsp1 { + qcom,remote-pid = <12>; + transport = "smem"; + mboxes = <&ipcc_mproc IPCC_CLIENT_NSP1 + IPCC_MPROC_SIGNAL_GLINK_QMP>; + mbox-names = "cdsp1_smem"; + interrupt-parent = <&ipcc_mproc>; + interrupts = <IPCC_CLIENT_NSP1 + IPCC_MPROC_SIGNAL_GLINK_QMP + IRQ_TYPE_EDGE_RISING>; + + label = "cdsp1"; + qcom,glink-label = "cdsp1"; + + qcom,cdsp1_qrtr { + qcom,glink-channels = "IPCRTR"; + qcom,intents = <0x800 5 + 0x2000 3 + 0x4400 2>; + }; + + qcom,msm_fastrpc_rpmsg { + compatible = "qcom,msm-fastrpc-rpmsg"; + qcom,glink-channels = "fastrpcglink-apps-dsp"; + qcom,intents = <0x64 64>; + }; + + qcom,cdsp1_glink_ssr { + qcom,glink-channels = "glink_ssr"; + qcom,notify-edges = <&glink_adsp>, + <&glink_cdsp0>; + }; + }; + + glink_gpdsp0: gpdsp0 { + qcom,remote-pid = <17>; + transport = "smem"; + mboxes = <&ipcc_mproc IPCC_CLIENT_GPDSP0 + IPCC_MPROC_SIGNAL_GLINK_QMP>; + mbox-names = "gpdsp0_smem"; + interrupt-parent = <&ipcc_mproc>; + interrupts = <IPCC_CLIENT_GPDSP0 + IPCC_MPROC_SIGNAL_GLINK_QMP + IRQ_TYPE_EDGE_RISING>; + + label = "gpdsp0"; + qcom,glink-label = "gpdsp0"; + + qcom,gpdsp0_qrtr { + qcom,glink-channels = "IPCRTR"; + qcom,intents = <0x800 5 + 0x2000 3 + 0x4400 2>; + }; + + qcom,apr_tal_rpmsg { + qcom,glink-channels = "apr_audio_svc"; + qcom,intents = <0x200 20>; + }; + + qcom,msm_fastrpc_rpmsg { + compatible = "qcom,msm-fastrpc-rpmsg"; + qcom,glink-channels = "fastrpcglink-apps-dsp"; + qcom,intents = <0x64 64>; + }; + + qcom,gpdsp0_glink_ssr { + qcom,glink-channels = "glink_ssr"; + qcom,notify-edges = <&glink_adsp>, + <&glink_cdsp0>, + <&glink_cdsp1>, + <&glink_gpdsp1>; + }; + }; + + glink_gpdsp1: gpdsp1 { + qcom,remote-pid = <18>; + transport = "smem"; + mboxes = <&ipcc_mproc IPCC_CLIENT_GPDSP1 + IPCC_MPROC_SIGNAL_GLINK_QMP>; + mbox-names = "gpdsp1_smem"; + interrupt-parent = <&ipcc_mproc>; + interrupts = <IPCC_CLIENT_GPDSP1 + IPCC_MPROC_SIGNAL_GLINK_QMP + IRQ_TYPE_EDGE_RISING>; + + label = "gpdsp1"; + qcom,glink-label = "gpdsp1"; + + qcom,gpdsp1_qrtr { + qcom,glink-channels = "IPCRTR"; + qcom,intents = <0x800 5 + 0x2000 3 + 0x4400 2>; + }; + + qcom,apr_tal_rpmsg { + qcom,glink-channels = "apr_audio_svc"; + qcom,intents = <0x200 20>; + }; + + qcom,msm_fastrpc_rpmsg { + compatible = "qcom,msm-fastrpc-rpmsg"; + qcom,glink-channels = "fastrpcglink-apps-dsp"; + qcom,intents = <0x64 64>; + }; + + qcom,gpdsp1_glink_ssr { + qcom,glink-channels = "glink_ssr"; + qcom,notify-edges = <&glink_cdsp0>, + <&glink_cdsp1>, + <&glink_adsp>, + <&glink_gpdsp0>; + }; + }; + }; + + qcom,glinkpkt { + compatible = "qcom,glinkpkt"; + + qcom,glinkpkt-apr-apps2 { + qcom,glinkpkt-edge = "adsp"; + qcom,glinkpkt-ch-name = "apr_apps2"; + qcom,glinkpkt-dev-name = "apr_apps2"; + }; + }; + + qcom,sps { + compatible = "qcom,msm-sps-4k"; + qcom,pipe-attr-ee; + }; }; -#include "direwolf-gdsc.dtsi" +#include "lemans-gdsc.dtsi" #include "lemans-pinctrl.dtsi" #include "lemans-qupv3.dtsi" #include "lemans-usb.dtsi" +#include "lemans-smp2p.dtsi" &cam_cc_titan_top_gdsc { - compatible = "regulator-fixed"; reg = <0xadf31bc 0x4>; + clocks = <&gcc GCC_CAMERA_AHB_CLK>; + clock-names = "ahb_clk"; + parent-supply = <&VDD_MM_MXC_VOTER_LEVEL>; status = "ok"; }; @@ -780,140 +1152,157 @@ }; &gcc_emac0_gdsc { - compatible = "regulator-fixed"; reg = <0x1b6004 0x4>; + parent-supply = <&VDD_CX_LEVEL>; status = "ok"; }; &gcc_emac1_gdsc { - compatible = "regulator-fixed"; reg = <0x1b4004 0x4>; + parent-supply = <&VDD_CX_LEVEL>; status = "ok"; }; &gcc_pcie_0_gdsc { + parent-supply = <&VDD_CX_LEVEL>; status = "ok"; }; &gcc_pcie_1_gdsc { + parent-supply = <&VDD_CX_LEVEL>; status = "ok"; }; &gcc_ufs_card_gdsc { - compatible = "regulator-fixed"; reg = <0x181004 0x4>; + parent-supply = <&VDD_CX_LEVEL>; status = "ok"; }; &gcc_ufs_phy_gdsc { - compatible = "regulator-fixed"; - reg = <0x183004 0x4>; + parent-supply = <&VDD_CX_LEVEL>; status = "ok"; }; &gcc_usb20_prim_gdsc { + parent-supply = <&VDD_CX_LEVEL>; status = "ok"; }; &gcc_usb30_prim_gdsc { - compatible = "regulator-fixed"; reg = <0x11b004 0x4>; + parent-supply = <&VDD_CX_LEVEL>; status = "ok"; }; &gcc_usb30_sec_gdsc { - compatible = "regulator-fixed"; reg = <0x12f004 0x4>; + parent-supply = <&VDD_CX_LEVEL>; status = "ok"; }; &hlos1_vote_mmnoc_mmu_tbu_hf0_gdsc { - compatible = "regulator-fixed"; reg = <0x18d050 0x4>; + parent-supply = <&VDD_CX_LEVEL>; status = "ok"; }; &hlos1_vote_mmnoc_mmu_tbu_hf1_gdsc { - compatible = "regulator-fixed"; reg = <0x18d058 0x4>; status = "ok"; }; &hlos1_vote_mmnoc_mmu_tbu_sf0_gdsc { - compatible = "regulator-fixed"; reg = <0x18d054 0x4>; status = "ok"; }; &hlos1_vote_mmnoc_mmu_tbu_sf1_gdsc { - compatible = "regulator-fixed"; reg = <0x18d06c 0x4>; status = "ok"; }; &hlos1_vote_turing_mmu_tbu0_gdsc { - compatible = "regulator-fixed"; reg = <0x17d05c 0x4>; status = "ok"; }; &hlos1_vote_turing_mmu_tbu1_gdsc { - compatible = "regulator-fixed"; reg = <0x18d060 0x4>; status = "ok"; }; &hlos1_vote_turing_mmu_tbu2_gdsc { - compatible = "regulator-fixed"; reg = <0x18d090 0x4>; status = "ok"; }; &hlos1_vote_turing_mmu_tbu3_gdsc { - compatible = "regulator-fixed"; reg = <0x18d0a4 0x4>; status = "ok"; }; &gpu_cc_cx_gdsc_hw_ctrl { - compatible = "syscon"; reg = <0x3d9953c 0x4>; - status = "ok"; }; &gpu_cc_cx_gdsc { - compatible = "regulator-fixed"; reg = <0x3d99108 0x4>; + clocks = <&gcc GCC_GPU_CFG_AHB_CLK>; + clock-names = "ahb_clk"; + parent-supply = <&VDD_CX_LEVEL>; status = "ok"; }; +&gpu_cc_gx_domain_addr { + reg = <0x3d99504 0x4>; +}; + +&gpu_cc_gx_sw_reset { + reg = <0x3d99058 0x4>; +}; + &gpu_cc_gx_gdsc { - compatible = "regulator-fixed"; reg = <0x3d9905c 0x4>; + clocks = <&gcc GCC_GPU_CFG_AHB_CLK>; + clock-names = "ahb_clk"; + parent-supply = <&VDD_GX_MXC_VOTER_LEVEL>; + sw-reset = <&gpu_cc_gx_sw_reset>, + <&gpu_cc_gx_acd_reset>, + <&gpu_cc_gx_acd_iroot_reset>; + qcom,skip-disable-before-sw-enable; status = "ok"; }; &video_cc_mvs0_gdsc { - compatible = "regulator-fixed"; reg = <0xabf809c 0x4>; + clocks = <&gcc GCC_VIDEO_AHB_CLK>; + clock-names = "ahb_clk"; + parent-supply = <&VDD_MM_LEVEL>; status = "ok"; }; &video_cc_mvs0c_gdsc { - compatible = "regulator-fixed"; reg = <0xabf804c 0x4>; + clocks = <&gcc GCC_VIDEO_AHB_CLK>; + clock-names = "ahb_clk"; + parent-supply = <&VDD_MM_LEVEL>; status = "ok"; }; &video_cc_mvs1_gdsc { - compatible = "regulator-fixed"; reg = <0xabf80c0 0x4>; + clocks = <&gcc GCC_VIDEO_AHB_CLK>; + clock-names = "ahb_clk"; + parent-supply = <&VDD_MM_LEVEL>; status = "ok"; }; &video_cc_mvs1c_gdsc { - compatible = "regulator-fixed"; reg = <0xabf8074 0x4>; + clocks = <&gcc GCC_VIDEO_AHB_CLK>; + clock-names = "ahb_clk"; + parent-supply = <&VDD_MM_LEVEL>; status = "ok"; }; diff --git a/qcom/monaco-idp-v1.dtsi b/qcom/monaco-idp-v1.dtsi index 10748dab..8fe0fac5 100755 --- a/qcom/monaco-idp-v1.dtsi +++ b/qcom/monaco-idp-v1.dtsi @@ -32,6 +32,9 @@ &icnss { qcom,is_slate_rfa = <1>; + qcom,rf_subtype = <0>; + vdd-1.8-xo-supply = <>; + vdd-3.3-ch0-supply = <>; }; &qupv3_se5_4uart { diff --git a/qcom/monaco-standalone-idp-v1.dtsi b/qcom/monaco-standalone-idp-v1.dtsi index 5d6461f0..a75c6d68 100755 --- a/qcom/monaco-standalone-idp-v1.dtsi +++ b/qcom/monaco-standalone-idp-v1.dtsi @@ -51,6 +51,10 @@ }; }; +&icnss { + qcom,rf_subtype = <1>; +}; + &qupv3_se5_4uart { status = "ok"; }; diff --git a/qcom/msm-arm-smmu-sa515m.dtsi b/qcom/msm-arm-smmu-sa515m.dtsi new file mode 100755 index 00000000..a83ff741 --- /dev/null +++ b/qcom/msm-arm-smmu-sa515m.dtsi @@ -0,0 +1,66 @@ +#include <dt-bindings/interrupt-controller/arm-gic.h> + +&soc { + apps_smmu: apps-smmu@15000000 { + compatible = "qcom,qsmmu-v500"; + reg = <0x15000000 0x20000>, + <0x15022000 0x20>; + reg-names = "base", "tcu-base"; + #iommu-cells = <2>; + qcom,skip-init; + qcom,use-3-lvl-tables; + #global-interrupts = <1>; + #size-cells = <1>; + #address-cells = <1>; + ranges; + + interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>; + interconnects = <&system_noc MASTER_QDSS_BAM + &system_noc SLAVE_IMEM>; + qcom,active-only; + + + periph_tbu: periph_tbu@15025000 { + compatible = "qcom,qsmmuv500-tbu"; + reg = <0x15025000 0x1000>, + <0x15022200 0x8>; + reg-names = "base", "status-reg"; + qcom,stream-id-range = <0x0 0x400>; + interconnects = <&system_noc MASTER_QDSS_BAM + &system_noc SLAVE_IMEM>; + qcom,active-only; + }; + + ipa_tbu: ipa_tbu@15029000 { + compatible = "qcom,qsmmuv500-tbu"; + reg = <0x15029000 0x1000>, + <0x15022208 0x8>; + reg-names = "base", "status-reg"; + qcom,stream-id-range = <0x400 0x400>; + interconnects = <&system_noc MASTER_QDSS_BAM + &system_noc SLAVE_IMEM>; + }; + }; + + apps_iommu_test_device { + compatible = "iommu-debug-test"; + iommus = <&apps_smmu 0x100 0x0>; + qcom,iommu-dma = "disabled"; + }; +}; diff --git a/qcom/pm5100.dtsi b/qcom/pm5100.dtsi index 94646945..26ffc40c 100755 --- a/qcom/pm5100.dtsi +++ b/qcom/pm5100.dtsi @@ -332,6 +332,8 @@ interrupts = <0x0 0x76 0x1 IRQ_TYPE_EDGE_RISING>; qcom,num-data-sdams = <5>; qcom,sdam-base = <0x7600>; + qcom,adc-cmn-wb-base = <0x3000>; + qcom,adc-cmn-base = <0x3900>; }; pm5100_haptics: qcom,hv-haptics@f000 { diff --git a/qcom/pm6155-vm.dtsi b/qcom/pm6155-vm.dtsi index 2262e38a..bef0994b 100755 --- a/qcom/pm6155-vm.dtsi +++ b/qcom/pm6155-vm.dtsi @@ -20,6 +20,7 @@ pm6155_1_rtc: qcom,pm6155_1_rtc { compatible = "qcom,pm8941-rtc"; interrupts = <0x0 0x61 0x1 IRQ_TYPE_NONE>; + disable-alarm-wakeup; }; }; }; diff --git a/qcom/pm8150-vm.dtsi b/qcom/pm8150-vm.dtsi index d2c0b19d..78b20c9e 100755 --- a/qcom/pm8150-vm.dtsi +++ b/qcom/pm8150-vm.dtsi @@ -24,6 +24,7 @@ reg = <0x6000>, <0x6100>; reg-names = "rtc", "alarm"; interrupts = <0x0 0x61 0x1 IRQ_TYPE_LEVEL_HIGH>; + disable-alarm-wakeup; }; }; }; diff --git a/qcom/pm8195-vm.dtsi b/qcom/pm8195-vm.dtsi index 8945a9f5..96ddfccb 100755 --- a/qcom/pm8195-vm.dtsi +++ b/qcom/pm8195-vm.dtsi @@ -24,6 +24,7 @@ reg = <0x6000>, <0x6100>; reg-names = "rtc", "alarm"; interrupts = <0x0 0x61 0x1 IRQ_TYPE_NONE>; + disable-alarm-wakeup; }; }; }; diff --git a/qcom/prairie-iot-idp-overlay.dts b/qcom/prairie-iot-idp-overlay.dts index a95ef9b5..911fe645 100755 --- a/qcom/prairie-iot-idp-overlay.dts +++ b/qcom/prairie-iot-idp-overlay.dts @@ -4,6 +4,7 @@ #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/clock/qcom,camcc-sm6150.h> #include "prairie-iot-idp.dtsi" +#include "sm6150-audio-overlay.dtsi" / { model = "Internal Audio Codec IDP overlay"; diff --git a/qcom/prairie-iot-idp.dtsi b/qcom/prairie-iot-idp.dtsi index 52fa8019..ecb7339a 100755 --- a/qcom/prairie-iot-idp.dtsi +++ b/qcom/prairie-iot-idp.dtsi @@ -170,6 +170,22 @@ }; }; +&usb0 { + qcom,interconnect-values-nom = /* NOMINAL Votes */ + <1000000 2500000>, + <0 2400>, + <0 40000>; + qcom,interconnect-values-svs = /* SVS Votes */ + <240000 700000>, + <0 2400>, + <0 40000>; + extcon = <&pm6150_pdphy>, <&pm6150_charger>, <&eud>; + + #io-channel-cells = <1>; + io-channels= <&pm6150_charger PSY_IIO_USB_REAL_TYPE>; + io-channel-names = "chg_type"; +}; + &qupv3_se0_2uart { status = "ok"; }; @@ -314,6 +330,21 @@ }; &pm6150_qg { + io-channels = <&pm6150_vadc ADC5_BAT_THERM_100K_PU>, + <&pm6150_vadc ADC5_BAT_ID_100K_PU>, + <&pm6150_charger PSY_IIO_INPUT_CURRENT_LIMITED>, + <&pm6150_charger PSY_IIO_RECHARGE_SOC>, + <&pm6150_charger PSY_IIO_FORCE_RECHARGE>, + <&pm6150_charger PSY_IIO_CHARGE_DONE>, + <&smb1390_charger PSY_IIO_CP_ENABLE>; + io-channel-names = "batt-therm", + "batt-id", + "input_current_limited", + "recharge_soc", + "force_recharge", + "charge_done", + "cp_charging_enabled"; + qcom,battery-data = <&mtp_batterydata>; qcom,qg-iterm-ma = <100>; qcom,hold-soc-while-full; @@ -321,6 +352,38 @@ qcom,cl-feedback-on; }; +&pm6150_pdphy { + #io-channel-cells = <1>; + io-channels = <&pm6150_charger PSY_IIO_PD_ACTIVE>, + <&pm6150_charger PSY_IIO_TYPEC_CC_ORIENTATION>, + <&pm6150_charger PSY_IIO_CONNECTOR_TYPE>, + <&pm6150_charger PSY_IIO_TYPEC_POWER_ROLE>, + <&pm6150_charger PSY_IIO_PD_USB_SUSPEND_SUPPORTED>, + <&pm6150_charger PSY_IIO_TYPEC_SRC_RP>, + <&pm6150_charger PSY_IIO_PD_IN_HARD_RESET>, + <&pm6150_charger PSY_IIO_PD_CURRENT_MAX>, + <&pm6150_charger PSY_IIO_PR_SWAP>, + <&pm6150_charger PSY_IIO_PD_VOLTAGE_MIN>, + <&pm6150_charger PSY_IIO_PD_VOLTAGE_MAX>, + <&pm6150_charger PSY_IIO_USB_REAL_TYPE>, + <&pm6150_charger PSY_IIO_TYPEC_MODE>, + <&pm6150_charger PSY_IIO_PE_START>; + io-channel-names = "pd_active", + "typec_cc_orientation", + "connector_type", + "typec_power_role", + "pd_usb_suspend_supported", + "typec_src_rp", + "pd_in_hard_reset", + "pr_current_max", + "pr_swap", + "pd_voltage_min", + "pd_voltage_max", + "real_type", + "typec_mode", + "pe_start"; +}; + &pm6150_charger { depends-on-supply = <&pm6150_vadc>; #io-channel-cells = <1>; @@ -346,7 +409,14 @@ <&pm6150_qg PSY_IIO_VOLTAGE_MAX>, <&pm6150_qg PSY_IIO_CHARGE_COUNTER>, <&pm6150_qg PSY_IIO_CYCLE_COUNT>, - <&pm6150_qg PSY_IIO_TIME_TO_FULL_NOW>; + <&pm6150_qg PSY_IIO_TIME_TO_FULL_NOW>, + <&smb1390_charger PSY_IIO_PARALLEL_MODE>, + <&smb1390_charger PSY_IIO_PARALLEL_OUTPUT_MODE>, + <&smb1390_charger PSY_IIO_MIN_ICL>, + <&smb1390_charger PSY_IIO_CP_SWITCHER_EN>, + <&smb1390_charger PSY_IIO_CP_ENABLE>, + <&smb1390_charger PSY_IIO_CP_ILIM>, + <&smb1390_charger PSY_IIO_CP_DIE_TEMP>; io-channel-names = "usb_in_voltage", "usb_in_current", "chg_temp", @@ -369,14 +439,21 @@ "voltage_max", "charge_counter", "cycle_count", - "time_to_full_now"; + "time_to_full_now", + "cp_parallel_mode", + "cp_parallel_output_mode", + "cp_min_icl", + "cp_switcher_en", + "cp_enable", + "cp_ilim", + "cp_die_temp"; qcom,battery-data = <&mtp_batterydata>; qcom,auto-recharge-soc = <98>; qcom,step-charging-enable; qcom,sw-jeita-enable; qcom,fcc-stepping-enable; qcom,suspend-input-on-debug-batt; - qcom,sec-charger-config = <0>; + qcom,sec-charger-config = <3>; qcom,thermal-mitigation = <4200000 3500000 3000000 2500000 2000000 1500000 1000000 500000>; dpdm-supply = <&qusb_phy0>; @@ -393,10 +470,20 @@ }; &smb1390_charger { - /delete-property/ compatible; - compatible = "qcom,smb1390-charger-psy"; - io-channels = <&pm6150_vadc ADC5_AMUX_THM3>; - io-channel-names = "cp_die_temp"; + io-channels = <&pm6150_vadc ADC5_AMUX_THM3>, + <&pm6150_charger PSY_IIO_AICL_DONE>, + <&pm6150_charger PSY_IIO_ADAPTER_CC_MODE>, + <&pm6150_charger PSY_IIO_PD_CURRENT_MAX>, + <&pm6150_charger PSY_IIO_USB_INPUT_CURRENT_SETTLED>, + <&pm6150_charger PSY_IIO_SMB_EN_MODE>, + <&pm6150_charger PSY_IIO_SMB_EN_REASON>; + io-channel-names = "cp_die_temp", + "aicl_done", + "adapter_cc_mode", + "pd_current_max", + "input_current_settled", + "smb_en_mode", + "smb_en_reason"; status = "ok"; }; diff --git a/qcom/qcs610-iot.dtsi b/qcom/qcs610-iot.dtsi index c17d6474..4e025159 100755 --- a/qcom/qcs610-iot.dtsi +++ b/qcom/qcs610-iot.dtsi @@ -1,7 +1,7 @@ #include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/iio/qcom,spmi-vadc.h> #include <dt-bindings/input/input.h> - #include <dt-bindings/clock/qcom,rpmh.h> #include <dt-bindings/clock/qcom,gcc-sm6150.h> #include <dt-bindings/clock/qcom,camcc-sm6150.h> @@ -250,6 +250,44 @@ qcom,smb-temp-max = <800>; }; +&ufsphy_mem { + compatible = "qcom,ufs-phy-qmp-v3-660"; + + vdda-phy-supply = <&pm6150_l4>; /* 0.9v */ + vdda-phy-always-on; + vdda-pll-supply = <&pm6150_l11>; + vdda-phy-max-microamp = <30000>; + vdda-pll-max-microamp = <12000>; + + status = "ok"; +}; + +&ufshc_mem { + vdd-hba-supply = <&ufs_phy_gdsc>; + vdd-hba-fixed-regulator; + vcc-supply = <&pm6150l_l11>; + vcc-voltage-level = <2960000 2960000>; + vccq2-supply = <&pm6150_l12>; + vccq2-voltage-level = <1800000 1800000>; + vcc-max-microamp = <600000>; + vccq2-max-microamp = <600000>; + + qcom,vddp-ref-clk-supply = <&pm6150l_l3>; + qcom,vddp-ref-clk-max-microamp = <100>; + qcom,vddp-ref-clk-min-uV = <1232000>; + qcom,vddp-ref-clk-max-uV = <1260000>; + + /* + * QCS610 UFS 3.x uses PMIC Buck regulator which requires additional + * delay to settle its voltage back to normal 2.5volts from + * the power down, so below property is used to enable delay + * before sending start stop unit command. + */ + qcom,delay-ssu; + + status = "ok"; +}; + &usb0 { qcom,interconnect-values-nom = /* NOMINAL Votes */ <1000000 2500000>, @@ -428,6 +466,7 @@ qcom,i2c-touch-active = "focaltech,fts_ts"; focaltech@38 { + status = "disabled"; compatible = "focaltech,fts_ts"; reg = <0x38>; interrupt-parent = <&tlmm>; @@ -448,4 +487,44 @@ panel = <&dsi_ili9881c_720p_video>; }; + + lt9611: lt,lt9611@3b { + compatible = "lt,lt9611"; + reg = <0x3b>; + + interrupts-extended = <&tlmm 26 IRQ_TYPE_EDGE_FALLING>; + + reset-gpios = <&tlmm 20 GPIO_ACTIVE_HIGH>; + enable-gpios = <&tlmm 79 GPIO_ACTIVE_HIGH>; + + vdd-supply = <&pm6150_l13>; + vcc-supply = <&pm6150_l16>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + lt9611_in: endpoint { + remote-endpoint = <&dsi0_out>; + }; + }; + }; + }; +}; + +&sde_dsi { + qcom,dsi-default-panel = <&dsi_ext_bridge_1080p>; + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + dsi0_out: endpoint { + remote-endpoint = <<9611_in>; + }; + }; + }; }; diff --git a/qcom/qcs610-opk.dtsi b/qcom/qcs610-opk.dtsi index be81bdd9..a463c793 100755 --- a/qcom/qcs610-opk.dtsi +++ b/qcom/qcs610-opk.dtsi @@ -104,6 +104,170 @@ #include "qg-batterydata-alium-3600mah.dtsi" #include "qg-batterydata-mlp356477-2800mah.dtsi" }; + + mtl_rx_setup: rx-queues-config { + snps,rx-queues-to-use = <4>; + snps,rx-sched-sp; + + queue0 { + snps,dcb-algorithm; + snps,map-to-dma-channel = <0x0>; + snps,route-up; + snps,priority = <0x1>; + }; + + queue1 { + snps,dcb-algorithm; + snps,map-to-dma-channel = <0x1>; + snps,route-ptp; + }; + + queue2 { + snps,avb-algorithm; + snps,map-to-dma-channel = <0x2>; + snps,route-avcp; + }; + + queue3 { + snps,avb-algorithm; + snps,map-to-dma-channel = <0x3>; + snps,priority = <0xC>; + }; + }; + + mtl_tx_setup: tx-queues-config { + snps,tx-queues-to-use = <4>; + snps,tx-sched-sp; + queue0 { + snps,dcb-algorithm; + }; + + queue1 { + snps,dcb-algorithm; + }; + + queue2 { + snps,avb-algorithm; + snps,send_slope = <0x1000>; + snps,idle_slope = <0x1000>; + snps,high_credit = <0x3E800>; + snps,low_credit = <0xFFC18000>; + }; + + queue3 { + snps,avb-algorithm; + snps,send_slope = <0x1000>; + snps,idle_slope = <0x1000>; + snps,high_credit = <0x3E800>; + snps,low_credit = <0xFFC18000>; + }; + }; + + ethqos_hw: qcom,ethernet@20000 { + compatible = "qcom,stmmac-ethqos"; + qcom,arm-smmu; + emac-core-version = <0x20030001>; + reg = <0x20000 0x10000>, + <0x36000 0x100>, + <0x3D00000 0x300000>; + reg-names = "stmmaceth", "rgmii","tlmm-central-base"; + clocks = <&gcc GCC_EMAC_AXI_CLK>, + <&gcc GCC_EMAC_SLV_AHB_CLK>, + <&gcc GCC_EMAC_PTP_CLK>, + <&gcc GCC_EMAC_RGMII_CLK>; + clock-names = "stmmaceth", "pclk", "ptp_ref", "rgmii"; + snps,ptp-ref-clk-rate = <250000000>; + snps,ptp-req-clk-rate = <96000000>; + interrupts-extended = <&intc 0 660 4>, <&intc 0 700 4>, + <&tlmm 76 2>, <&intc 0 668 4>, <&intc 0 669 4>; + interrupt-names = "macirq", "eth_lpi", + "phy-intr", "ptp_pps_irq_0", "ptp_pps_irq_1"; + + snps,tso; + snps,pbl = <32>; + rx-fifo-depth = <16384>; + tx-fifo-depth = <20480>; + snps,mtl-rx-config = <&mtl_rx_setup>; + snps,mtl-tx-config = <&mtl_tx_setup>; + snps,reset-gpios = <&tlmm 36 GPIO_ACTIVE_HIGH>; + qcom,phy-intr-redirect = <&tlmm 76 GPIO_ACTIVE_LOW>; + gdsc_emac-supply = <&emac_gdsc>; + + pinctrl-names = "dev-emac-mdc", + "dev-emac-mdio", + "dev-emac-rgmii_txd0_state", + "dev-emac-rgmii_txd1_state", + "dev-emac-rgmii_txd2_state", + "dev-emac-rgmii_txd3_state", + "dev-emac-rgmii_txc_state", + "dev-emac-rgmii_tx_ctl_state", + "dev-emac-rgmii_rxd0_state", + "dev-emac-rgmii_rxd1_state", + "dev-emac-rgmii_rxd2_state", + "dev-emac-rgmii_rxd3_state", + "dev-emac-rgmii_rxc_state", + "dev-emac-rgmii_rx_ctl_state", + "dev-emac-phy_intr", + "dev-emac-phy_reset_state", + "dev-emac_pin_pps_0"; + + pinctrl-0 = <&emac_mdc>; + pinctrl-1 = <&emac_mdio>; + + pinctrl-2 = <&emac_rgmii_txd0>; + pinctrl-3 = <&emac_rgmii_txd1>; + pinctrl-4 = <&emac_rgmii_txd2>; + pinctrl-5 = <&emac_rgmii_txd3>; + pinctrl-6 = <&emac_rgmii_txc>; + pinctrl-7 = <&emac_rgmii_tx_ctl>; + + pinctrl-8 = <&emac_rgmii_rxd0>; + pinctrl-9 = <&emac_rgmii_rxd1>; + pinctrl-10 = <&emac_rgmii_rxd2>; + pinctrl-11 = <&emac_rgmii_rxd3>; + pinctrl-12 = <&emac_rgmii_rxc>; + pinctrl-13 = <&emac_rgmii_rx_ctl>; + + pinctrl-14 = <&emac_phy_intr>; + pinctrl-15 = <&emac_phy_reset_state>; + pinctrl-16 = <&emac_pin_pps_0>; + + snps,reset-delays-us = <0 11000 70000>; + vreg_emac_phy-supply = <&L19A>; + qcom,phyad_change; + phy-mode = "rgmii"; + ethqos_emb_smmu: ethqos_emb_smmu { + compatible = "qcom,emac-smmu-embedded"; + iommus = <&apps_smmu 0x1C0 0x0>; + qcom,iommu-dma = "fastmap"; + qcom,iommu-dma-addr-pool = <0x80000000 0x40000000>; + }; + + rgmii-io-macro-info { + config-cdr-en = <1>; + mclk-gating-en = <1>; + cdr-fine-phase = <1>; + skip-calc-traffic = <1>; + data-divide-clk-sel = <0>; + prg-rclk-dly = <1000>; + loopback-en = <1>; + rx-prog-swap = <1>; + tx-clk-phase-shift-en = <1>; + dll-clock-dis = <0>; + mclk-freq-calc = <0x1A>; + ddr-traffic-init-sel = <0>; + ddr-traffic-init-sw = <0>; + ddr-cal-en = <0>; + tcx0-cycles-dly-line = <64>; + tcx0-cycles-cnt = <4>; + test-ctl = <0xC1800000>; + usr-ctl = <0x2C010800>; + pps-create = <1>; + l3-master-dev = <1>; + ipv6-wq = <1>; + }; + + }; }; &tlmm { @@ -124,6 +288,44 @@ }; }; +&emac_phy_intr { + mux { + pins = "gpio76"; + function = "gpio"; + }; + + config { + pins = "gpio76"; + bias-disable; /* NO pull */ + drive-strength = <2>; + }; +}; + +&emac_phy_reset_state { + mux { + pins = "gpio36"; + function = "gpio"; + }; + + config { + pins = "gpio36"; + bias-pull-up; + drive-strength = <16>; + }; +}; + +&emac_pin_pps_0 { + mux { + pins = "gpio77"; + function = "rgmii_sync"; + }; + + config { + pins = "gpio77"; + bias-pull-up; + drive-strength = <16>; + }; +}; &flash_led { status = "ok"; diff --git a/qcom/qcs610.dtsi b/qcom/qcs610.dtsi index 7c44539b..a9816f46 100755 --- a/qcom/qcs610.dtsi +++ b/qcom/qcs610.dtsi @@ -1,12 +1,19 @@ #include "sm6150.dtsi" #include "display/sm6150-sde-display.dtsi" #include "sm6150-pmic-overlay.dtsi" +#include "sm6150-audio.dtsi" / { model = "Qualcomm Technologies, Inc. QCS610"; qcom,msm-name = "QCS610"; qcom,msm-id = <401 0>; }; +&aliases { + swr0 = &swr0; + swr1 = &swr1; + swr2 = &swr2; +}; + &reserved_memory { memshare_mem: memshare_region { compatible = "shared-dma-pool"; @@ -174,7 +181,7 @@ reg = <0x1de0000 0x20000>, <0x1dc4000 0x24000>; reg-names = "crypto-base","crypto-bam-base"; - interrupts = <0 272 0>; + interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>; qcom,bam-pipe-pair = <3>; qcom,ce-hw-instance = <0>; qcom,ce-device = <0>; @@ -194,7 +201,7 @@ reg = <0x1de0000 0x20000>, <0x1dc4000 0x24000>; reg-names = "crypto-base","crypto-bam-base"; - interrupts = <0 272 0>; + interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>; qcom,bam-pipe-pair = <2>; qcom,ce-hw-instance = <0>; qcom,ce-device = <0>; diff --git a/qcom/sa410m-audio-lpass.dtsi b/qcom/sa410m-audio-lpass.dtsi index ec80f3de..1e3538f5 100755 --- a/qcom/sa410m-audio-lpass.dtsi +++ b/qcom/sa410m-audio-lpass.dtsi @@ -190,6 +190,14 @@ compatible = "qcom,msm-lsm-client"; }; + qcom,msm-dai-stub { + compatible = "qcom,msm-dai-stub"; + dtmf_tx: qcom,msm-dai-stub-dtmf-tx { + compatible = "qcom,msm-dai-stub-dev"; + qcom,msm-dai-stub-dev-id = <4>; + }; + }; + qcom,msm-dai-q6 { compatible = "qcom,msm-dai-q6"; sb_7_rx: qcom,msm-dai-q6-sb-7-rx { @@ -308,6 +316,10 @@ }; }; + pcm_dtmf: qcom,msm-pcm-dtmf { + compatible = "qcom,msm-pcm-dtmf"; + }; + dai_pri_auxpcm: qcom,msm-pri-auxpcm { compatible = "qcom,msm-auxpcm-dev"; qcom,msm-cpudai-auxpcm-mode = <0>, <0>; diff --git a/qcom/sa410m-audio.dtsi b/qcom/sa410m-audio.dtsi index ea22ecf6..105c417a 100755 --- a/qcom/sa410m-audio.dtsi +++ b/qcom/sa410m-audio.dtsi @@ -102,15 +102,15 @@ asoc-platform = <&pcm0>, <&pcm1>, <&pcm2>, <&voip>, <&voice>, <&loopback>, <&hostless>, - <&afe>, <&lsm>, <&routing>; + <&afe>, <&lsm>, <&routing>, <&pcm_dtmf>; asoc-platform-names = "msm-pcm-dsp.0", "msm-pcm-dsp.1", "msm-pcm-dsp.2", "msm-voip-dsp", "msm-pcm-voice", "msm-pcm-loopback", "msm-pcm-hostless", "msm-pcm-afe", "msm-lsm-client", - "msm-pcm-routing"; + "msm-pcm-routing", "msm-pcm-dtmf"; asoc-cpu = <&dai_mi2s0>, <&dai_mi2s1>, <&dai_pri_auxpcm>, - <&dai_sec_auxpcm>, + <&dai_sec_auxpcm>, <&dtmf_tx>, <&afe_pcm_rx>, <&afe_pcm_tx>, <&afe_proxy_rx>, <&afe_proxy_tx>, <&incall_record_rx>, <&incall_record_tx>, <&incall_music_rx>, @@ -128,8 +128,8 @@ <&rx_cdc_dma_4_rx>, <&tx_cdc_dma_4_tx>, <&afe_loopback_tx>; asoc-cpu-names = "msm-dai-q6-mi2s.0", "msm-dai-q6-mi2s.1", - "msm-dai-q6-auxpcm.1", - "msm-dai-q6-auxpcm.2", "msm-dai-q6-dev.224", + "msm-dai-q6-auxpcm.1", "msm-dai-q6-auxpcm.2", + "msm-dai-stub-dev.4", "msm-dai-q6-dev.224", "msm-dai-q6-dev.225", "msm-dai-q6-dev.241", "msm-dai-q6-dev.240", "msm-dai-q6-dev.32771", "msm-dai-q6-dev.32772", "msm-dai-q6-dev.32773", diff --git a/qcom/sa410m-ion.dtsi b/qcom/sa410m-ion.dtsi new file mode 100755 index 00000000..8119d38c --- /dev/null +++ b/qcom/sa410m-ion.dtsi @@ -0,0 +1,42 @@ +#include <dt-bindings/arm/msm/msm_ion_ids.h> +&soc { + qcom,ion { + compatible = "qcom,msm-ion"; + #address-cells = <1>; + #size-cells = <0>; + + system_heap: qcom,ion-heap@25 { + reg = <ION_SYSTEM_HEAP_ID>; + qcom,ion-heap-type = "MSM_SYSTEM"; + }; + + system_secure_heap: qcom,ion-heap@9 { + reg = <ION_SECURE_HEAP_ID>; + qcom,ion-heap-type = "SYSTEM_SECURE"; + }; + + qcom,ion-heap@10 { /* SECURE DISPLAY HEAP */ + reg = <ION_SECURE_DISPLAY_HEAP_ID>; + memory-region = <&secure_display_memory>; + qcom,ion-heap-type = "HYP_CMA"; + }; + + qcom,ion-heap@26 { /* USER CONTIG HEAP */ + reg = <ION_USER_CONTIG_HEAP_ID>; + memory-region = <&user_contig_mem>; + qcom,ion-heap-type = "DMA"; + }; + + qcom,ion-heap@27 { /* QSEECOM HEAP */ + reg = <ION_QSECOM_HEAP_ID>; + memory-region = <&qseecom_mem>; + qcom,ion-heap-type = "DMA"; + }; + + qcom,ion-heap@19 { /* QSEECOM HEAP */ + reg = <ION_QSECOM_TA_HEAP_ID>; + memory-region = <&qseecom_ta_mem>; + qcom,ion-heap-type = "DMA"; + }; + }; +}; diff --git a/qcom/sa410m.dtsi b/qcom/sa410m.dtsi index 081d536c..e32aa7a3 100755 --- a/qcom/sa410m.dtsi +++ b/qcom/sa410m.dtsi @@ -255,6 +255,14 @@ label = "disp_rdump_region"; }; + user_contig_mem: user_contig_region { + compatible = "shared-dma-pool"; + alloc-ranges = <0x0 0x00000000 0x0 0xffffffff>; + reusable; + alignment = <0x0 0x400000>; + size = <0x0 0x1000000>; + }; + qseecom_mem: qseecom_region { compatible = "shared-dma-pool"; alloc-ranges = <0x0 0x00000000 0x0 0xffffffff>; @@ -1510,7 +1518,7 @@ #include "sa410m-pinctrl.dtsi" #include "pm2250-rpm-regulator.dtsi" #include "scuba-regulator.dtsi" -#include "scuba-ion.dtsi" +#include "sa410m-ion.dtsi" #include "msm-arm-smmu-scuba.dtsi" #include "sa410m-gdsc.dtsi" #include "sa410m-qupv3.dtsi" @@ -1518,12 +1526,7 @@ #include "sa410m-audio.dtsi" #include "sa410m-audio-overlay.dtsi" #include "scuba-pm.dtsi" - -&soc { - qcom,ion { - /delete-node/ qcom,ion-heap@26; - }; -}; +#include "scuba-coresight.dtsi" &qupv3_se4_2uart { status = "ok"; @@ -1591,6 +1594,10 @@ "chg_temp"; }; +&tmc_etr { + qcom,iommu-dma = "bypass"; +}; + #include "msm-arm-smmu-scuba.dtsi" /delete-node/ &kgsl_iommu_test_device; diff --git a/qcom/sa515m-ion.dtsi b/qcom/sa515m-ion.dtsi new file mode 100755 index 00000000..bb3da3f7 --- /dev/null +++ b/qcom/sa515m-ion.dtsi @@ -0,0 +1,32 @@ +#include <dt-bindings/arm/msm/msm_ion_ids.h> + +&soc { + qcom,ion { + compatible = "qcom,msm-ion"; + #address-cells = <1>; + #size-cells = <0>; + + system_heap: qcom,ion-heap@25 { + reg = <ION_SYSTEM_HEAP_ID>; + qcom,ion-heap-type = "SYSTEM"; + }; + + qcom,ion-heap@27 { /* QSEECOM HEAP */ + reg = <ION_QSECOM_HEAP_ID>; + memory-region = <&qseecom_mem>; + qcom,ion-heap-type = "DMA"; + }; + + qcom,ion-heap@19 { /* QSEECOM TA HEAP */ + reg = <ION_QSECOM_TA_HEAP_ID>; + memory-region = <&qseecom_ta_mem>; + qcom,ion-heap-type = "DMA"; + }; + + qcom,ion-heap@28 { /* AUDIO HEAP */ + reg = <ION_AUDIO_HEAP_ID>; + memory-region = <&audio_mem>; + qcom,ion-heap-type = "DMA"; + }; + }; +}; diff --git a/qcom/sa515m-pinctrl.dtsi b/qcom/sa515m-pinctrl.dtsi new file mode 100755 index 00000000..a5badcc7 --- /dev/null +++ b/qcom/sa515m-pinctrl.dtsi @@ -0,0 +1,1703 @@ +&soc { + tlmm: pinctrl@f100000 { + compatible = "qcom,sa515m-pinctrl"; + reg = <0xf100000 0x300000>, + <0xb204900 0x280>; + reg-names = "pinctrl"; + interrupts = <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + interrupt-parent = <&intc>; + #interrupt-cells = <2>; + wakeup-parent = <&pdc>; + + uart3_console_active: uart3_console_active { + mux { + pins = "gpio8", "gpio9"; + function = "blsp_uart3"; + }; + + config { + pins = "gpio8", "gpio9"; + drive-strength = <2>; + bias-disable; + }; + }; + + uart3_console_sleep: uart3_console_sleep { + mux { + pins = "gpio8", "gpio9"; + function = "blsp_uart3"; + }; + + config { + pins = "gpio8", "gpio9"; + drive-strength = <2>; + bias-disable; + }; + }; + + /* I2C CONFIGURATION */ + i2c_1 { + i2c_1_active: i2c_1_active { + mux { + pins = "gpio2", "gpio3"; + function = "blsp_i2c1"; + }; + + config { + pins = "gpio2", "gpio3"; + drive-strength = <2>; + bias-disable; + }; + }; + + i2c_1_sleep: i2c_1_sleep { + mux { + pins = "gpio2", "gpio3"; + function = "blsp_i2c1"; + }; + + config { + pins = "gpio2", "gpio3"; + drive-strength = <2>; + bias-pull-up; + }; + }; + }; + + i2c_2 { + i2c_2_active: i2c_2_active { + mux { + pins = "gpio6", "gpio7"; + function = "blsp_i2c2"; + }; + + config { + pins = "gpio6", "gpio7"; + drive-strength = <2>; + bias-disable; + }; + }; + + i2c_2_sleep: i2c_2_sleep { + mux { + pins = "gpio6", "gpio7"; + function = "blsp_i2c2"; + }; + + config { + pins = "gpio6", "gpio7"; + drive-strength = <2>; + bias-pull-up; + }; + }; + }; + + i2c_3 { + i2c_3_active: i2c_3_active { + mux { + pins = "gpio10", "gpio11"; + function = "blsp_i2c3"; + }; + + config { + pins = "gpio10", "gpio11"; + drive-strength = <2>; + bias-disable; + }; + }; + + i2c_3_sleep: i2c_3_sleep { + mux { + pins = "gpio10", "gpio11"; + function = "blsp_i2c3"; + }; + + config { + pins = "gpio10", "gpio11"; + drive-strength = <2>; + bias-pull-up; + }; + }; + }; + + i2c_4 { + i2c_4_active: i2c_4_active { + mux { + pins = "gpio78", "gpio79"; + function = "blsp_i2c4"; + }; + + config { + pins = "gpio78", "gpio79"; + drive-strength = <2>; + bias-disable; + }; + }; + + i2c_4_sleep: i2c_4_sleep { + mux { + pins = "gpio78", "gpio79"; + function = "blsp_i2c4"; + }; + + config { + pins = "gpio78", "gpio79"; + drive-strength = <2>; + bias-pull-up; + }; + }; + }; + + i2c_5 { + i2c_5_active: i2c_5_active { + mux { + pins = "gpio82", "gpio83"; + function = "blsp_i2c1"; + }; + + config { + pins = "gpio82", "gpio83"; + drive-strength = <2>; + bias-disable; + }; + }; + + i2c_5_sleep: i2c_5_sleep { + mux { + pins = "gpio82", "gpio83"; + function = "blsp_i2c1"; + }; + + config { + pins = "gpio82", "gpio83"; + drive-strength = <2>; + bias-pull-up; + }; + }; + }; + + i2c_6 { + i2c_6_active: i2c_6_active { + mux { + pins = "gpio65", "gpio66"; + function = "blsp_i2c2"; + }; + + config { + pins = "gpio65", "gpio66"; + drive-strength = <2>; + bias-disable; + }; + }; + + i2c_6_sleep: i2c_6_sleep { + mux { + pins = "gpio65", "gpio66"; + function = "blsp_i2c2"; + }; + + config { + pins = "gpio65", "gpio66"; + drive-strength = <2>; + bias-pull-up; + }; + }; + }; + + i2c_7 { + i2c_7_active: i2c_7_active { + mux { + pins = "gpio18", "gpio19"; + function = "blsp_i2c4"; + }; + + config { + pins = "gpio18", "gpio19"; + drive-strength = <2>; + bias-disable; + }; + }; + + i2c_7_sleep: i2c_7_sleep { + mux { + pins = "gpio18", "gpio19"; + function = "blsp_i2c4"; + }; + + config { + pins = "gpio18", "gpio19"; + drive-strength = <2>; + bias-pull-up; + }; + }; + }; + + /*SPI Configuration*/ + spi_1 { + spi_1_active: spi_1_active { + mux { + pins = "gpio80", "gpio81", + "gpio82", "gpio83"; + function = "blsp_spi1"; + }; + + config { + pins = "gpio80", "gpio81", + "gpio82", "gpio83"; + drive-strength = <6>; + bias-disable; + }; + }; + + spi_1_sleep: spi_1_sleep { + mux { + pins = "gpio80", "gpio81", + "gpio82", "gpio83"; + function = "blsp_spi1"; + }; + + config { + pins = "gpio80", "gpio81", + "gpio82", "gpio83"; + drive-strength = <6>; + bias-disable; + }; + }; + }; + + spi_2 { + spi_2_active: spi_2_active { + mux { + pins = "gpio4", "gpio5", + "gpio6", "gpio7"; + function = "blsp_spi2"; + }; + + config { + pins = "gpio4", "gpio5", + "gpio6", "gpio7"; + drive-strength = <6>; + bias-disable; + }; + }; + + spi_2_sleep: spi_2_sleep { + mux { + pins = "gpio4", "gpio5", + "gpio6", "gpio7"; + function = "blsp_spi2"; + }; + + config { + pins = "gpio4", "gpio5", + "gpio6", "gpio7"; + drive-strength = <6>; + bias-disable; + }; + }; + }; + + spi_3 { + spi_3_active: spi_3_active { + mux { + pins = "gpio8", "gpio9", + "gpio10", "gpio11"; + function = "blsp_spi3"; + }; + + config { + pins = "gpio8", "gpio9", + "gpio10", "gpio11"; + drive-strength = <6>; + bias-disable; + }; + }; + + spi_3_sleep: spi_3_sleep { + mux { + pins = "gpio8", "gpio9", + "gpio10", "gpio11"; + function = "blsp_spi3"; + }; + + config { + pins = "gpio8", "gpio9", + "gpio10", "gpio11"; + drive-strength = <6>; + bias-disable; + }; + }; + }; + + spi_4 { + spi_4_active: spi_4_active { + mux { + pins = "gpio16", "gpio17", + "gpio18", "gpio19"; + function = "blsp_spi4"; + }; + + config { + pins = "gpio16", "gpio17", + "gpio18", "gpio19"; + drive-strength = <6>; + bias-disable; + }; + }; + + spi_4_sleep: spi_4_sleep { + mux { + pins = "gpio16", "gpio17", + "gpio18", "gpio19"; + function = "blsp_spi4"; + }; + + config { + pins = "gpio16", "gpio17", + "gpio18", "gpio19"; + drive-strength = <6>; + bias-disable; + }; + }; + }; + + wcd9xxx_intr { + wcd_intr_default: wcd_intr_default { + mux { + pins = "gpio96"; + function = "gpio"; + }; + + config { + pins = "gpio96"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* pull down */ + input-enable; + }; + }; + }; + + cdc_reset_ctrl { + cdc_reset_sleep: cdc_reset_sleep { + mux { + pins = "gpio92"; + function = "gpio"; + }; + + config { + pins = "gpio92"; + drive-strength = <2>; + bias-disable; + output-low; + }; + }; + + cdc_reset_active:cdc_reset_active { + mux { + pins = "gpio92"; + function = "gpio"; + }; + + config { + pins = "gpio92"; + drive-strength = <8>; + bias-pull-down; + output-high; + }; + }; + }; + + i2s_mclk { + i2s_mclk_sleep: i2s_mclk_sleep { + mux { + pins = "gpio62"; + function = "i2s_mclk"; + }; + + config { + pins = "gpio62"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + }; + }; + + i2s_mclk_active: i2s_mclk_active { + mux { + pins = "gpio62"; + function = "i2s_mclk"; + }; + + config { + pins = "gpio62"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL*/ + output-high; + }; + }; + }; + + pmx_pri_mi2s_aux { + pri_ws_sleep: pri_ws_sleep { + mux { + pins = "gpio12"; + function = "gpio"; + }; + + config { + pins = "gpio12"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + pri_sck_sleep: pri_sck_sleep { + mux { + pins = "gpio15"; + function = "gpio"; + }; + + config { + pins = "gpio15"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + pri_dout_sleep: pri_dout_sleep { + mux { + pins = "gpio14"; + function = "gpio"; + }; + + config { + pins = "gpio14"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + pri_ws_active_master: pri_ws_active_master { + mux { + pins = "gpio12"; + function = "pri_mi2s"; + }; + + config { + pins = "gpio12"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL*/ + output-high; + }; + }; + + pri_sck_active_master: pri_sck_active_master { + mux { + pins = "gpio15"; + function = "pri_mi2s"; + }; + + config { + pins = "gpio15"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL*/ + output-high; + }; + }; + + pri_ws_active_slave: pri_ws_active_slave { + mux { + pins = "gpio12"; + function = "pri_mi2s"; + }; + + config { + pins = "gpio12"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL*/ + }; + }; + + pri_sck_active_slave: pri_sck_active_slave { + mux { + pins = "gpio15"; + function = "pri_mi2s"; + }; + + config { + pins = "gpio15"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL*/ + }; + }; + + pri_dout_active: pri_dout_active { + mux { + pins = "gpio14"; + function = "pri_mi2s"; + }; + + config { + pins = "gpio14"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL*/ + output-high; + }; + }; + }; + + pmx_pri_mi2s_aux_din { + pri_din_sleep: pri_din_sleep { + mux { + pins = "gpio13"; + function = "gpio"; + }; + + config { + pins = "gpio13"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + pri_din_active: pri_din_active { + mux { + pins = "gpio13"; + function = "pri_mi2s"; + }; + + config { + pins = "gpio13"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + }; + }; + }; + + pmx_sec_mi2s_aux { + sec_ws_sleep: sec_ws_sleep { + mux { + pins = "gpio16"; + function = "gpio"; + }; + + config { + pins = "gpio16"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + sec_sck_sleep: sec_sck_sleep { + mux { + pins = "gpio19"; + function = "gpio"; + }; + + config { + pins = "gpio19"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + sec_dout_sleep: sec_dout_sleep { + mux { + pins = "gpio18"; + function = "gpio"; + }; + + config { + pins = "gpio18"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + input-enable; + }; + }; + + sec_ws_active_master: sec_ws_active_master { + mux { + pins = "gpio16"; + function = "sec_mi2s"; + }; + + config { + pins = "gpio16"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL*/ + output-high; + }; + }; + + sec_sck_active_master: sec_sck_active_master { + mux { + pins = "gpio19"; + function = "sec_mi2s"; + }; + + config { + pins = "gpio19"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL*/ + output-high; + }; + }; + + sec_ws_active_slave: sec_ws_active_slave { + mux { + pins = "gpio16"; + function = "sec_mi2s"; + }; + + config { + pins = "gpio16"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL*/ + }; + }; + + sec_sck_active_slave: sec_sck_active_slave { + mux { + pins = "gpio19"; + function = "sec_mi2s"; + }; + + config { + pins = "gpio19"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL*/ + }; + }; + + sec_dout_active: sec_dout_active { + mux { + pins = "gpio18"; + function = "sec_mi2s"; + }; + + config { + pins = "gpio18"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL*/ + output-high; + }; + }; + }; + + mdss_cs_active: mdss_cs_active { + mux { + pins = "gpio21"; + function = "ebi2_lcd"; + }; + + config { + pins = "gpio21"; + drive-strength = <10>; /* 10 mA */ + bias-disable; /* NO pull */ + }; + }; + + mdss_cs_sleep: mdss_cs_sleep { + mux { + pins = "gpio21"; + function = "ebi2_lcd"; + }; + + config { + pins = "gpio21"; + drive-strength = <2>; /* 2 mA */ + bias-disable; /* NO pull */ + }; + }; + + mdss_te_active: mdss_te_active { + mux { + pins = "gpio22"; + function = "ebi2_lcd"; + }; + + config { + pins = "gpio22"; + drive-strength = <10>; /* 10 mA */ + bias-disable; /* NO pull */ + }; + }; + + mdss_te_sleep: mdss_te_sleep { + mux { + pins = "gpio22"; + function = "ebi2_lcd"; + }; + + config { + pins = "gpio22"; + drive-strength = <2>; /* 2 mA */ + bias-disable; /* NO pull */ + }; + }; + + mdss_rs_active: mdss_rs_active { + mux { + pins = "gpio23"; + function = "ebi2_lcd"; + }; + + config { + pins = "gpio23"; + drive-strength = <10>; /* 10 mA */ + bias-disable; /* NO pull */ + }; + }; + + mdss_rs_sleep: mdss_rs_sleep { + mux { + pins = "gpio23"; + function = "ebi2_lcd"; + }; + + config { + pins = "gpio23"; + drive-strength = <2>; /* 2 mA */ + bias-disable; /* NO pull */ + }; + }; + + mdss_ad_active: mdss_ad_active { + mux { + pins = "gpio20"; + function = "ebi2_a"; + }; + + config { + pins = "gpio20"; + drive-strength = <10>; /* 10 mA */ + bias-disable; /* NO pull */ + }; + }; + + mdss_ad_sleep: mdss_ad_sleep { + mux { + pins = "gpio20"; + function = "ebi2_a"; + }; + + config { + pins = "gpio20"; + drive-strength = <2>; /* 2 mA */ + bias-disable; /* NO pull */ + }; + }; + + pmx_sec_mi2s_aux_din { + sec_din_sleep: sec_din_sleep { + mux { + pins = "gpio17"; + function = "gpio"; + }; + + config { + pins = "gpio17"; + drive-strength = <2>; /* 2 mA */ + bias-disable; /* NO PULL */ + input-enable; + }; + }; + + sec_din_active: sec_din_active { + mux { + pins = "gpio17"; + function = "sec_mi2s"; + }; + + config { + pins = "gpio17"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL */ + }; + }; + }; + + /* HS UART CONFIGURATION */ + + blsp1_uart1a: blsp1_uart1a { + blsp1_uart1a_tx_active: blsp1_uart1a_tx_active { + mux { + pins = "gpio0"; + function = "blsp_uart1"; + }; + + config { + pins = "gpio0"; + drive-strength = <2>; + bias-disable; + }; + }; + + blsp1_uart1a_tx_sleep: blsp1_uart1a_tx_sleep { + mux { + pins = "gpio0"; + function = "gpio"; + }; + + config { + pins = "gpio0"; + drive-strength = <2>; + bias-pull-up; + }; + }; + + blsp1_uart1a_rxcts_active: blsp1_uart1a_rxcts_active { + mux { + pins = "gpio1", "gpio2"; + function = "blsp_uart1"; + }; + + config { + pins = "gpio1", "gpio2"; + drive-strength = <2>; + bias-disable; + }; + }; + + blsp1_uart1a_rxcts_sleep: blsp1_uart1a_rxcts_sleep { + mux { + pins = "gpio1", "gpio2"; + function = "gpio"; + }; + + config { + pins = "gpio1", "gpio2"; + drive-strength = <2>; + bias-no-pull; + }; + }; + + blsp1_uart1a_rfr_active: blsp1_uart1a_rfr_active { + mux { + pins = "gpio3"; + function = "blsp_uart1"; + }; + + config { + pins = "gpio3"; + drive-strength = <2>; + bias-disable; + }; + }; + + blsp1_uart1a_rfr_sleep: blsp1_uart1a_rfr_sleep { + mux { + pins = "gpio3"; + function = "gpio"; + }; + + config { + pins = "gpio3"; + drive-strength = <2>; + bias-no-pull; + }; + }; + }; + + blsp1_uart1b: blsp1_uart1b { + blsp1_uart1b_tx_active: blsp1_uart1b_tx_active { + mux { + pins = "gpio20"; + function = "blsp_uart1"; + }; + + config { + pins = "gpio20"; + drive-strength = <2>; + bias-disable; + }; + }; + + blsp1_uart1b_tx_sleep: blsp1_uart1b_tx_sleep { + mux { + pins = "gpio20"; + function = "gpio"; + }; + + config { + pins = "gpio20"; + drive-strength = <2>; + bias-pull-up; + }; + }; + + blsp1_uart1b_rxcts_active: blsp1_uart1b_rxcts_active { + mux { + pins = "gpio21", "gpio22"; + function = "blsp_uart1"; + }; + + config { + pins = "gpio21", "gpio22"; + drive-strength = <2>; + bias-disable; + }; + }; + + blsp1_uart1b_rxcts_sleep: blsp1_uart1b_rxcts_sleep { + mux { + pins = "gpio21", "gpio22"; + function = "gpio"; + }; + + config { + pins = "gpio21", "gpio22"; + drive-strength = <2>; + bias-no-pull; + }; + }; + + blsp1_uart1b_rfr_active: blsp1_uart1b_rfr_active { + mux { + pins = "gpio23"; + function = "blsp_uart1"; + }; + + config { + pins = "gpio23"; + drive-strength = <2>; + bias-disable; + }; + }; + + blsp1_uart1b_rfr_sleep: blsp1_uart1b_rfr_sleep { + mux { + pins = "gpio23"; + function = "gpio"; + }; + + config { + pins = "gpio23"; + drive-strength = <2>; + bias-no-pull; + }; + }; + }; + + blsp1_uart2a: blsp1_uart2a { + blsp1_uart2a_tx_active: blsp1_uart2a_tx_active { + mux { + pins = "gpio4"; + function = "blsp_uart2"; + }; + + config { + pins = "gpio4"; + drive-strength = <2>; + bias-disable; + }; + }; + + blsp1_uart2a_tx_sleep: blsp1_uart2a_tx_sleep { + mux { + pins = "gpio4"; + function = "gpio"; + }; + + config { + pins = "gpio4"; + drive-strength = <2>; + bias-pull-up; + }; + }; + + blsp1_uart2a_rxcts_active: blsp1_uart2a_rxcts_active { + mux { + pins = "gpio5", "gpio6"; + function = "blsp_uart2"; + }; + + config { + pins = "gpio5", "gpio6"; + drive-strength = <2>; + bias-disable; + }; + }; + + blsp1_uart2a_rxcts_sleep: blsp1_uart2a_rxcts_sleep { + mux { + pins = "gpio5", "gpio6"; + function = "gpio"; + }; + + config { + pins = "gpio1", "gpio2"; + drive-strength = <2>; + bias-no-pull; + }; + }; + + blsp1_uart2a_rfr_active: blsp1_uart2a_rfr_active { + mux { + pins = "gpio7"; + function = "blsp_uart2"; + }; + + config { + pins = "gpio7"; + drive-strength = <2>; + bias-disable; + }; + }; + + blsp1_uart2a_rfr_sleep: blsp1_uart2a_rfr_sleep { + mux { + pins = "gpio7"; + function = "gpio"; + }; + + config { + pins = "gpio7"; + drive-strength = <2>; + bias-no-pull; + }; + }; + }; + + blsp1_uart2b: blsp1_uart2b { + blsp1_uart2b_tx_active: blsp1_uart2b_tx_active { + mux { + pins = "gpio63"; + function = "blsp_uart2"; + }; + + config { + pins = "gpio63"; + drive-strength = <2>; + bias-disable; + }; + }; + + blsp1_uart2b_tx_sleep: blsp1_uart2b_tx_sleep { + mux { + pins = "gpio63"; + function = "gpio"; + }; + + config { + pins = "gpio63"; + drive-strength = <2>; + bias-pull-up; + }; + }; + + blsp1_uart2b_rxcts_active: blsp1_uart2b_rxcts_active { + mux { + pins = "gpio64", "gpio65"; + function = "blsp_uart2"; + }; + + config { + pins = "gpio64", "gpio65"; + drive-strength = <2>; + bias-disable; + }; + }; + + blsp1_uart2b_rxcts_sleep: blsp1_uart2b_rxcts_sleep { + mux { + pins = "gpio64", "gpio65"; + function = "gpio"; + }; + + config { + pins = "gpio64", "gpio65"; + drive-strength = <2>; + bias-no-pull; + }; + }; + + blsp1_uart2b_rfr_active: blsp1_uart2b_rfr_active { + mux { + pins = "gpio66"; + function = "blsp_uart2"; + }; + + config { + pins = "gpio66"; + drive-strength = <2>; + bias-disable; + }; + }; + + blsp1_uart2b_rfr_sleep: blsp1_uart2b_rfr_sleep { + mux { + pins = "gpio66"; + function = "gpio"; + }; + + config { + pins = "gpio66"; + drive-strength = <2>; + bias-no-pull; + }; + }; + }; + + blsp1_uart3: blsp1_uart3 { + blsp1_uart3_tx_active: blsp1_uart3_tx_active { + mux { + pins = "gpio8"; + function = "blsp_uart3"; + }; + + config { + pins = "gpio8"; + drive-strength = <2>; + bias-disable; + }; + }; + + blsp1_uart3_tx_sleep: blsp1_uart3_tx_sleep { + mux { + pins = "gpio8"; + function = "gpio"; + }; + + config { + pins = "gpio8"; + drive-strength = <2>; + bias-pull-up; + }; + }; + + blsp1_uart3_rxcts_active: blsp1_uart3_rxcts_active { + mux { + pins = "gpio9", "gpio10"; + function = "blsp_uart3"; + }; + + config { + pins = "gpio9", "gpio10"; + drive-strength = <2>; + bias-disable; + }; + }; + + blsp1_uart3_rxcts_sleep: blsp1_uart3_rxcts_sleep { + mux { + pins = "gpio9", "gpio10"; + function = "gpio"; + }; + + config { + pins = "gpio9", "gpio10"; + drive-strength = <2>; + bias-no-pull; + }; + }; + + blsp1_uart3_rfr_active: blsp1_uart3_rfr_active { + mux { + pins = "gpio11"; + function = "blsp_uart3"; + }; + + config { + pins = "gpio11"; + drive-strength = <2>; + bias-disable; + }; + }; + + blsp1_uart3_rfr_sleep: blsp1_uart3_rfr_sleep { + mux { + pins = "gpio11"; + function = "gpio"; + }; + + config { + pins = "gpio11"; + drive-strength = <2>; + bias-no-pull; + }; + }; + }; + + blsp1_uart4a: blsp1_uart4a { + blsp1_uart4a_tx_active: blsp1_uart4a_tx_active { + mux { + pins = "gpio20"; + function = "blsp_uart4"; + }; + + config { + pins = "gpio20"; + drive-strength = <2>; + bias-disable; + }; + }; + + blsp1_uart4a_tx_sleep: blsp1_uart4a_tx_sleep { + mux { + pins = "gpio20"; + function = "gpio"; + }; + + config { + pins = "gpio20"; + drive-strength = <2>; + bias-pull-up; + }; + }; + + blsp1_uart4a_rxcts_active: blsp1_uart4a_rxcts_active { + mux { + pins = "gpio21", "gpio22"; + function = "blsp_uart4"; + }; + + config { + pins = "gpio21", "gpio22"; + drive-strength = <2>; + bias-disable; + }; + }; + + blsp1_uart4a_rxcts_sleep: blsp1_uart4a_rxcts_sleep { + mux { + pins = "gpio21", "gpio22"; + function = "gpio"; + }; + + config { + pins = "gpio21", "gpio22"; + drive-strength = <2>; + bias-no-pull; + }; + }; + + blsp1_uart4a_rfr_active: blsp1_uart4a_rfr_active { + mux { + pins = "gpio23"; + function = "blsp_uart4"; + }; + + config { + pins = "gpio23"; + drive-strength = <2>; + bias-disable; + }; + }; + + blsp1_uart4a_rfr_sleep: blsp1_uart4a_rfr_sleep { + mux { + pins = "gpio23"; + function = "gpio"; + }; + + config { + pins = "gpio23"; + drive-strength = <2>; + bias-no-pull; + }; + }; + }; + + blsp1_uart4b: blsp1_uart4b { + blsp1_uart4b_tx_active: blsp1_uart4b_tx_active { + mux { + pins = "gpio16"; + function = "blsp_uart4"; + }; + + config { + pins = "gpio16"; + drive-strength = <2>; + bias-disable; + }; + }; + + blsp1_uart4b_tx_sleep: blsp1_uart4b_tx_sleep { + mux { + pins = "gpio16"; + function = "gpio"; + }; + + config { + pins = "gpio16"; + drive-strength = <2>; + bias-pull-up; + }; + }; + + blsp1_uart4b_rxcts_active: blsp1_uart4b_rxcts_active { + mux { + pins = "gpio17", "gpio18"; + function = "blsp_uart4"; + }; + + config { + pins = "gpio17", "gpio18"; + drive-strength = <2>; + bias-disable; + }; + }; + + blsp1_uart4b_rxcts_sleep: blsp1_uart4b_rxcts_sleep { + mux { + pins = "gpio17", "gpio18"; + function = "gpio"; + }; + + config { + pins = "gpio17", "gpio18"; + drive-strength = <2>; + bias-no-pull; + }; + }; + + blsp1_uart4b_rfr_active: blsp1_uart4b_rfr_active { + mux { + pins = "gpio19"; + function = "blsp_uart4"; + }; + + config { + pins = "gpio19"; + drive-strength = <2>; + bias-disable; + }; + }; + + blsp1_uart4b_rfr_sleep: blsp1_uart4b_rfr_sleep { + mux { + pins = "gpio19"; + function = "gpio"; + }; + + config { + pins = "gpio19"; + drive-strength = <2>; + bias-no-pull; + }; + }; + }; + + pcie0 { + pcie0_clkreq_default: pcie0_clkreq_default { + mux { + pins = "gpio56"; + function = "pcie_clkreq"; + }; + + config { + pins = "gpio56"; + drive-strength = <2>; + bias-pull-up; + }; + }; + + pcie0_perst_default: pcie0_perst_default { + mux { + pins = "gpio57"; + function = "gpio"; + }; + + config { + pins = "gpio57"; + drive-strength = <2>; + bias-pull-down; + }; + }; + + pcie0_wake_default: pcie0_wake_default { + mux { + pins = "gpio53"; + function = "gpio"; + }; + + config { + pins = "gpio53"; + drive-strength = <2>; + bias-pull-up; + }; + }; + + pcie0_clkreq_sleep: pcie0_clkreq_sleep { + mux { + pins = "gpio56"; + function = "gpio"; + }; + + config { + pins = "gpio56"; + drive-strength = <2>; + bias-pull-up; + }; + }; + }; + + pcie_ep { + pcie_ep_clkreq_default: pcie_ep_clkreq_default { + mux { + pins = "gpio56"; + function = "pcie_clkreq"; + }; + + config { + pins = "gpio56"; + drive-strength = <2>; + bias-disable; + }; + }; + + pcie_ep_perst_default: pcie_ep_perst_default { + mux { + pins = "gpio57"; + function = "gpio"; + }; + + config { + pins = "gpio57"; + drive-strength = <2>; + bias-pull-down; + }; + }; + + pcie_ep_wake_default: pcie_ep_wake_default { + mux { + pins = "gpio53"; + function = "gpio"; + }; + + config { + pins = "gpio53"; + drive-strength = <2>; + bias-disable; + }; + }; + }; + + cnss_pins { + cnss_wlan_en_active: cnss_wlan_en_active { + mux { + pins = "gpio52"; + function = "gpio"; + }; + + config { + pins = "gpio52"; + drive-strength = <16>; + output-high; + bias-pull-up; + }; + }; + + cnss_wlan_en_sleep: cnss_wlan_en_sleep { + mux { + pins = "gpio52"; + function = "gpio"; + }; + + config { + pins = "gpio52"; + drive-strength = <2>; + output-low; + bias-pull-down; + }; + }; + }; + + /* SDC pin type */ + sdc1_clk_on: sdc1_clk_on { + config { + pins = "sdc1_clk"; + bias-disable; /* NO pull */ + drive-strength = <16>; /* 16 MA */ + }; + }; + + sdc1_clk_off: sdc1_clk_off { + config { + pins = "sdc1_clk"; + bias-disable; /* NO pull */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + sdc1_cmd_on: sdc1_cmd_on { + config { + pins = "sdc1_cmd"; + bias-pull-up; /* pull up */ + drive-strength = <10>; /* 10 MA */ + }; + }; + + sdc1_cmd_off: sdc1_cmd_off { + config { + pins = "sdc1_cmd"; + num-grp-pins = <1>; + bias-pull-up; /* pull up */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + sdc1_data_on: sdc1_data_on { + config { + pins = "sdc1_data"; + bias-pull-up; /* pull up */ + drive-strength = <10>; /* 10 MA */ + }; + }; + + sdc1_data_off: sdc1_data_off { + config { + pins = "sdc1_data"; + bias-pull-up; /* pull up */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + sdc1_cd_on: cd_on { + mux { + pins = "gpio99"; + function = "gpio"; + }; + + config { + pins = "gpio99"; + drive-strength = <2>; + bias-pull-up; + }; + }; + + sdc1_cd_off: cd_off { + mux { + pins = "gpio99"; + function = "gpio"; + }; + + config { + pins = "gpio99"; + drive-strength = <2>; + bias-disable; + }; + }; + + emac { + emac_pin_pps_0: emac_pin_pps_0 { + mux { + pins = "gpio106"; + function = "emac_PPS0"; + }; + + config { + pins = "gpio106"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL*/ + }; + }; + + emac_pin_pps_1: emac_pin_pps_1 { + mux { + pins = "gpio95"; + function = "emac_PPS1"; + }; + + config { + pins = "gpio95"; + drive-strength = <8>; /* 8 mA */ + bias-disable; /* NO PULL*/ + }; + }; + }; + + a2b_cdc_sel { + a2b_cdc_sel_default: a2b_cdc_sel_default { + mux { + pins = "gpio97"; + function = "gpio"; + }; + + config { + pins = "gpio97"; + drive-strength = <8>; + bias-disable; + output-high; + }; + }; + }; + + sensor_int1_default: sensor_int1_default { + mux { + pins = "gpio84"; + function = "gpio"; + }; + + config { + pins = "gpio84"; + drive-strength = <16>; /* 16 mA */ + bias-pull-down; /* pull down */ + }; + }; + + sensor_int2_default: sensor_int2_default { + mux { + pins = "gpio85"; + function = "gpio"; + }; + + config { + pins = "gpio85"; + drive-strength = <16>; /* 16 mA */ + bias-pull-down; /* pull down */ + }; + }; + + sensor_enable_default: sensor_enable_default { + mux { + pins = "gpio87"; + function = "gpio"; + }; + + config { + pins = "gpio87"; + drive-strength = <16>; /* 16 mA */ + bias-pull-up; /* pull up */ + output-low; + }; + }; + + pinctrl_pps: ppsgrp { + mux { + pins = "gpio32"; + function = "nav_gpio"; + }; + + config { + pins = "gpio32"; + bias-pull-down; + }; + }; + + sja1105_pin { + sja1105_default: sja1105_default { + mux { + pins = "gpio89", "gpio91", "gpio102"; + function = "gpio"; + }; + + config { + pins = "gpio89", "gpio91", "gpio102"; + drive-strength = <4>; + bias-pull-up; + output-high; + }; + }; + }; + }; +}; diff --git a/qcom/sa515m.dtsi b/qcom/sa515m.dtsi index 8e0b2039..2d59cae1 100755 --- a/qcom/sa515m.dtsi +++ b/qcom/sa515m.dtsi @@ -1,3 +1,8 @@ +#include <dt-bindings/interconnect/qcom,icc.h> +#include <dt-bindings/interconnect/qcom,sdx55.h> +#include <dt-bindings/interrupt-controller/arm-gic.h> +#include <dt-bindings/soc/qcom,rpmh-rsc.h> + / { #address-cells = <1>; #size-cells = <1>; @@ -43,9 +48,15 @@ label = "smem_mem"; }; + cmd_db: reserved-memory@8fe20000 { + compatible = "qcom,cmd-db"; + no-map; + reg = <0x8fe20000 0x20000>; + }; + peripheral2_mem: peripheral2_region@8fd00000 { no-map; - reg = <0x8fd00000 0x140000>; + reg = <0x8fd00000 0x120000>; label = "peripheral2_mem"; }; @@ -135,6 +146,31 @@ #size-cells = <1>; ranges; + psci { + compatible = "arm,psci-1.0"; + method = "smc"; + }; + + apps_rsc: rsc@17830000 { + label = "apps_rsc"; + compatible = "qcom,rpmh-rsc"; + reg = <0x17830000 0x10000>, + <0x17840000 0x10000>; + reg-names = "drv-0", "drv-1"; + interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; + qcom,tcs-offset = <0xd00>; + qcom,drv-id = <1>; + qcom,tcs-config = <ACTIVE_TCS 2>, + <SLEEP_TCS 2>, + <WAKE_TCS 2>, + <CONTROL_TCS 1>; + + apps_bcm_voter: bcm_voter { + compatible = "qcom,bcm-voter"; + }; + }; + intc: interrupt-controller@17800000 { compatible = "qcom,msm-qgic2"; interrupt-controller; @@ -147,12 +183,42 @@ pdc: interrupt-controller@b210000 { compatible = "qcom,sa515m-pdc"; reg = <0xb210000 0x30000>; - qcom,pdc-ranges = <0 147 52>, <52 266 32>; + qcom,pdc-ranges = <0 147 52>; #interrupt-cells = <3>; interrupt-parent = <&intc>; interrupt-controller; }; + system_noc: interconnect@1620000 { + compatible = "qcom,sdx55-system_noc"; + reg = <0x1620000 0x31200>; + #interconnect-cells = <1>; + qcom,bcm-voter-names = "hlos"; + qcom,bcm-voters = <&apps_bcm_voter>; + }; + + mem_noc: interconnect@9680000 { + compatible = "qcom,sdx55-mem_noc"; + reg = <0x9680000 0x27200>; + #interconnect-cells = <1>; + qcom,bcm-voter-names = "hlos"; + qcom,bcm-voters = <&apps_bcm_voter>; + }; + + mc_virt: interconnect@0 { + compatible = "qcom,sdx55-mc_virt"; + #interconnect-cells = <1>; + qcom,bcm-voter-names = "hlos"; + qcom,bcm-voters = <&apps_bcm_voter>; + }; + + ipa_virt: interconnect@1 { + compatible = "qcom,sdx55-ipa_virt"; + #interconnect-cells = <1>; + qcom,bcm-voter-names = "hlos"; + qcom,bcm-voters = <&apps_bcm_voter>; + }; + timer { compatible = "arm,armv7-timer"; interrupts = <1 13 0xf08>, @@ -257,7 +323,82 @@ compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm"; reg = <0x831000 0x200>; interrupts = <0 26 0>; + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&uart3_console_active>; + pinctrl-1 = <&uart3_console_sleep>; status = "ok"; }; + qcom,msm-imem@1468F000 { + compatible = "qcom,msm-imem"; + reg = <0x1468F000 0x1000>; /* Address and size of IMEM */ + ranges = <0x0 0x1468F000 0x1000>; + #address-cells = <1>; + #size-cells = <1>; + + mem_dump_table@10 { + compatible = "qcom,msm-imem-mem_dump_table"; + reg = <0x10 0x8>; + }; + + restart_reason@65c { + compatible = "qcom,msm-imem-restart_reason"; + reg = <0x65c 0x4>; + }; + + boot_stats@6b0 { + compatible = "qcom,msm-imem-boot_stats"; + reg = <0x6b0 0x20>; + }; + + pil@94c { + compatible = "qcom,msm-imem-pil"; + reg = <0x94c 0xc8>; + }; + + diag_dload@c8 { + compatible = "qcom,msm-imem-diag-dload"; + reg = <0xc8 0xc8>; + }; + }; + mem_dump { + compatible = "qcom,mem-dump"; + memory-region = <&dump_mem>; + + rpmh { + qcom,dump-size = <0x200000>; + qcom,dump-id = <0xec>; + }; + + rpm_sw { + qcom,dump-size = <0x28000>; + qcom,dump-id = <0xea>; + }; + + pmic { + qcom,dump-size = <0x80000>; + qcom,dump-id = <0xe4>; + }; + + + tmc_etf { + qcom,dump-size = <0x4000>; + qcom,dump-id = <0xf1>; + }; + + etr_reg { + qcom,dump-size = <0x1000>; + qcom,dump-id = <0x100>; + }; + + etf_reg { + qcom,dump-size = <0x1000>; + qcom,dump-id = <0x102>; + }; + }; + }; + +#include "sa515m-pinctrl.dtsi" +#include "sa515m-ion.dtsi" +#include "msm-arm-smmu-sa515m.dtsi" diff --git a/qcom/sa6155p-vm-la.dtsi b/qcom/sa6155p-vm-la.dtsi index f99ff365..eff16724 100755 --- a/qcom/sa6155p-vm-la.dtsi +++ b/qcom/sa6155p-vm-la.dtsi @@ -21,16 +21,21 @@ actual-dev = "vda", "vdb", "vdc", "vdd", "vde", "vdf", "vdg", "vdh", "vdi", - "vdj", "vdk"; + "vdj", "vdk", "vdl"; rename-dev = "system", "userdata", "vendor", "persist", "modem", "bluetooth", - "misc", "vbmeta", "boot", "dtbo"; + "misc", "vbmeta", "boot", "dtbo", + "dsp"; rename-dev-ab = "super", "userdata", "metadata", "persist", "modem_a", "bluetooth_a", "misc", "vbmeta_a", "vbmeta_b", - "boot", "dtbo"; + "boot", "dtbo", "dsp_a"; }; }; + + chosen { + bootargs = "rcupdate.rcu_expedited=1 rcu_nocbs=0-7 cgroup.memory=nokmem,nosocket androidboot.usbcontroller=a600000.dwc3"; + }; }; #include "display/quin-vm-display-la.dtsi" diff --git a/qcom/sa8155-vm-la-mt.dtsi b/qcom/sa8155-vm-la-mt.dtsi index 5a5408a7..dd88d3c2 100755 --- a/qcom/sa8155-vm-la-mt.dtsi +++ b/qcom/sa8155-vm-la-mt.dtsi @@ -3,6 +3,14 @@ reg = <0x1 0x2c200000 0x0 0x53e00000>; label = "pmem_shared_mem"; }; + + secure_display_memory: secure_display_region { + compatible = "shared-dma-pool"; + alloc-ranges = <0x0 0x00000000 0x0 0xffffffff>; + reusable; + alignment = <0x0 0x400000>; + size = <0x0 0x0a000000>; + }; }; #include "display/quin-vm-display-la.dtsi" @@ -15,18 +23,21 @@ actual-dev = "vda", "vdb", "vdc", "vdd", "vde", "vdf", "vdg", "vdh", "vdi", - "vdj", "vdk"; + "vdj", "vdk", "vdl"; rename-dev = "system", "userdata", "vendor", "persist", "modem", "bluetooth", - "misc", "vbmeta", "boot", "dtbo"; + "misc", "vbmeta", "boot", "dtbo", + "dsp"; rename-dev-ab = "super", "userdata", "metadata", "persist", "modem_a", "bluetooth_a", "misc", "vbmeta_a", "vbmeta_b", - "boot", "dtbo"; + "boot_a", "dtbo_a", "dsp_a"; }; }; - /delete-node/ cpus; + chosen { + bootargs = "rcupdate.rcu_expedited=1 rcu_nocbs=0-7 cgroup.memory=nokmem,nosocket androidboot.usbcontroller=a600000.dwc3"; + }; }; &usb0 { @@ -52,3 +63,11 @@ &sdhc_2 { status = "ok"; }; + +&msm_ion { + qcom,ion-heap@10 { + reg = <ION_SECURE_DISPLAY_HEAP_ID>; + memory-region = <&secure_display_memory>; + qcom,ion-heap-type = "HYP_CMA"; + }; +}; diff --git a/qcom/sa8155-vm-la.dtsi b/qcom/sa8155-vm-la.dtsi index adc128c2..ddbbd8d1 100755 --- a/qcom/sa8155-vm-la.dtsi +++ b/qcom/sa8155-vm-la.dtsi @@ -21,16 +21,21 @@ actual-dev = "vda", "vdb", "vdc", "vdd", "vde", "vdf", "vdg", "vdh", "vdi", - "vdj", "vdk"; + "vdj", "vdk", "vdl"; rename-dev = "system", "userdata", "vendor", "persist", "modem", "bluetooth", - "misc", "vbmeta", "boot", "dtbo"; + "misc", "vbmeta", "boot", "dtbo", + "dsp"; rename-dev-ab = "super", "userdata", "metadata", "persist", "modem_a", "bluetooth_a", "misc", "vbmeta_a", "vbmeta_b", - "boot", "dtbo"; + "boot_a", "dtbo_a", "dsp_a"; }; }; + + chosen { + bootargs = "rcupdate.rcu_expedited=1 rcu_nocbs=0-7 cgroup.memory=nokmem,nosocket androidboot.usbcontroller=a600000.dwc3"; + }; }; #include "display/quin-vm-display-la.dtsi" diff --git a/qcom/sa8155-vm-usb.dtsi b/qcom/sa8155-vm-usb.dtsi index d4ec643b..873b9b39 100755 --- a/qcom/sa8155-vm-usb.dtsi +++ b/qcom/sa8155-vm-usb.dtsi @@ -52,6 +52,7 @@ snps,has-lpm-erratum; snps,hird-threshold = /bits/ 8 <0x0>; snps,is-utmi-l1-suspend; + snps,usb2-gadget-lpm-disable; maximum-speed = "high-speed"; dr_mode = "otg"; }; @@ -131,10 +132,9 @@ dma-ranges; interrupts-extended = <&pdc 11 IRQ_TYPE_EDGE_RISING>, - <&intc GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>, <&pdc 7 IRQ_TYPE_LEVEL_HIGH>, <&pdc 10 IRQ_TYPE_EDGE_RISING>; - interrupt-names = "dp_hs_phy_irq", "pwr_event_irq", + interrupt-names = "dp_hs_phy_irq", "ss_phy_irq", "dm_hs_phy_irq"; qcom,use-pdc-interrupts; qcom,default-mode-host; @@ -161,7 +161,7 @@ dwc3@a800000 { compatible = "snps,dwc3"; - reg = <0x0a800000 0xcd00>; + reg = <0x0a800000 0xd941>; interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; usb-phy = <&usb2_phy1>, <&usb_qmp_phy>; linux,sysdev_is_parent; @@ -170,11 +170,13 @@ snps,hird-threshold = /bits/ 8 <0x0>; snps,ssp-u3-u0-quirk; snps,is-utmi-l1-suspend; + snps,usb2-gadget-lpm-disable; snps,dis-u1-entry-quirk; snps,dis-u2-entry-quirk; snps,dis_u3_susphy_quirk; + snps,force-gen1; tx-fifo-resize; - maximum-speed = "super-speed-plus"; + maximum-speed = "super-speed"; dr_mode = "otg"; }; }; @@ -262,7 +264,7 @@ USB3_UNI_QSERDES_RX_RX_MODE_00_HIGH2 0x37 0 USB3_UNI_QSERDES_RX_RX_MODE_00_HIGH 0x2f 0 USB3_UNI_QSERDES_RX_RX_MODE_00_LOW 0xaf 0 - USB3_UNI_QSERDES_RX_RX_MODE_01_HIGH4 0xb3 0 + USB3_UNI_QSERDES_RX_RX_MODE_01_HIGH4 0xb6 0 USB3_UNI_QSERDES_RX_RX_MODE_01_HIGH3 0x0b 0 USB3_UNI_QSERDES_RX_RX_MODE_01_HIGH2 0x5c 0 USB3_UNI_QSERDES_RX_RX_MODE_01_HIGH 0xdc 0 @@ -276,7 +278,7 @@ USB3_UNI_QSERDES_RX_UCDR_FASTLOCK_COUNT_LOW 0xff 0 USB3_UNI_QSERDES_RX_UCDR_FASTLOCK_COUNT_HIGH 0x0f 0 USB3_UNI_QSERDES_RX_UCDR_SO_SATURATION_AND_ENABLE 0x7f 0 - USB3_UNI_QSERDES_RX_UCDR_FO_GAIN 0x08 0 + USB3_UNI_QSERDES_RX_UCDR_FO_GAIN 0x0a 0 USB3_UNI_QSERDES_RX_VGA_CAL_CNTRL1 0x54 0 USB3_UNI_QSERDES_RX_VGA_CAL_CNTRL2 0x00 0 USB3_UNI_QSERDES_RX_GM_CAL 0x1f 0 @@ -291,9 +293,10 @@ USB3_UNI_QSERDES_RX_RX_IDAC_TSETTLE_HIGH 0x00 0 USB3_UNI_QSERDES_RX_RX_IDAC_TSETTLE_LOW 0xc0 0 USB3_UNI_QSERDES_RX_DFE_CTLE_POST_CAL_OFFSET 0x20 0 - USB3_UNI_QSERDES_RX_UCDR_SO_GAIN 0x04 0 + USB3_UNI_QSERDES_RX_UCDR_SO_GAIN 0x06 0 USB3_UNI_QSERDES_TX_RCV_DETECT_LVL_2 0x12 0 USB3_UNI_QSERDES_TX_LANE_MODE_1 0x95 0 + USB3_UNI_QSERDES_TX_PI_QEC_CTRL 0x40 0 USB3_UNI_QSERDES_TX_RES_CODE_LANE_TX 0xe4 0 USB3_UNI_QSERDES_TX_RES_CODE_LANE_RX 0xd0 0 USB3_UNI_QSERDES_TX_RES_CODE_LANE_OFFSET_TX 0x10 0 diff --git a/qcom/sa8195-vm-la-mt.dtsi b/qcom/sa8195-vm-la-mt.dtsi index 2b40b187..8f351cfd 100755 --- a/qcom/sa8195-vm-la-mt.dtsi +++ b/qcom/sa8195-vm-la-mt.dtsi @@ -15,18 +15,23 @@ actual-dev = "vda", "vdb", "vdc", "vdd", "vde", "vdf", "vdg", "vdh", "vdi", - "vdj", "vdk"; + "vdj", "vdk", "vdl"; rename-dev = "system", "userdata", "vendor", "persist", "modem", "bluetooth", - "misc", "vbmeta", "boot", "dtbo"; + "misc", "vbmeta", "boot", "dtbo", + "dsp"; rename-dev-ab = "super", "userdata", "metadata", "persist", "modem_a", "bluetooth_a", "misc", "vbmeta_a", "vbmeta_b", - "boot", "dtbo"; + "boot_a", "dtbo_a", "dsp_a"; }; }; /delete-node/ cpus; + + chosen { + bootargs = "rcupdate.rcu_expedited=1 rcu_nocbs=0-7 cgroup.memory=nokmem,nosocket androidboot.usbcontroller=a600000.dwc3"; + }; }; &usb0 { diff --git a/qcom/sa8195-vm-la.dtsi b/qcom/sa8195-vm-la.dtsi index d593da87..5ecc6171 100755 --- a/qcom/sa8195-vm-la.dtsi +++ b/qcom/sa8195-vm-la.dtsi @@ -22,16 +22,21 @@ actual-dev = "vda", "vdb", "vdc", "vdd", "vde", "vdf", "vdg", "vdh", "vdi", - "vdj", "vdk"; + "vdj", "vdk", "vdl"; rename-dev = "system", "userdata", "vendor", "persist", "modem", "bluetooth", - "misc", "vbmeta", "boot", "dtbo"; + "misc", "vbmeta", "boot", "dtbo", + "dsp"; rename-dev-ab = "super", "userdata", "metadata", "persist", "modem_a", "bluetooth_a", "misc", "vbmeta_a", "vbmeta_b", - "boot", "dtbo"; + "boot_a", "dtbo_a", "dsp_a"; }; }; + + chosen { + bootargs = "rcupdate.rcu_expedited=1 rcu_nocbs=0-7 cgroup.memory=nokmem,nosocket androidboot.usbcontroller=a600000.dwc3"; + }; }; #include "display/quin-vm-display-la.dtsi" diff --git a/qcom/sa8195-vm-usb.dtsi b/qcom/sa8195-vm-usb.dtsi index 1231d348..985d1797 100755 --- a/qcom/sa8195-vm-usb.dtsi +++ b/qcom/sa8195-vm-usb.dtsi @@ -54,6 +54,7 @@ snps,has-lpm-erratum; snps,hird-threshold = /bits/ 8 <0x0>; snps,is-utmi-l1-suspend; + snps,usb2-gadget-lpm-disable; maximum-speed = "high-speed"; dr_mode = "otg"; }; @@ -91,8 +92,10 @@ /* Primary USB port related High Speed PHY */ usb2_phy0: hsphy@88e2000 { compatible = "qcom,usb-hsphy-snps-femto"; - reg = <0x88e2000 0x110>; - reg-names = "hsusb_phy_base"; + reg = <0x88e2000 0x110>, + <0x007801f8 0x4>; + reg-names = "hsusb_phy_base", + "phy_rcal_reg"; vdd-supply = <&pm8195_3_l5>; vdda18-supply = <&pm8195_1_l12>; @@ -105,6 +108,7 @@ resets = <&gcc GCC_QUSB2PHY_PRIM_BCR>; reset-names = "phy_reset"; qcom,param-override-seq = <0x43 0x70>; + qcom,rcal-mask = <0x1e00000>; status = "disabled"; }; @@ -168,6 +172,7 @@ snps,has-lpm-erratum; snps,hird-threshold = /bits/ 8 <0x0>; snps,is-utmi-l1-suspend; + snps,usb2-gadget-lpm-disable; maximum-speed = "high-speed"; dr_mode = "otg"; }; @@ -176,8 +181,10 @@ /* Secondary USB port related High Speed PHY */ usb2_phy1: hsphy@88e3000 { compatible = "qcom,usb-hsphy-snps-femto"; - reg = <0x88e3000 0x110>; - reg-names = "hsusb_phy_base"; + reg = <0x88e3000 0x110>, + <0x007801f8 0x4>; + reg-names = "hsusb_phy_base", + "phy_rcal_reg"; vdd-supply = <&pm8195_3_l5>; vdda18-supply = <&pm8195_1_l12>; @@ -190,6 +197,7 @@ resets = <&gcc GCC_QUSB2PHY_SEC_BCR>; reset-names = "phy_reset"; qcom,param-override-seq = <0x43 0x70>; + qcom,rcal-mask = <0x1e00000>; status = "disabled"; }; @@ -238,7 +246,7 @@ status = "disabled"; dwc3@a400000 { compatible = "snps,dwc3"; - reg = <0x0a400000 0xcd00>; + reg = <0x0a400000 0xd941>; interrupts = <GIC_SPI 654 IRQ_TYPE_LEVEL_HIGH>; usb-phy = <&usb2_phy2>, <&usb_qmp_phy0>, <&usb2_phy3>, <&usb_qmp_phy1>; @@ -251,7 +259,8 @@ snps,dis-u1-entry-quirk; snps,dis-u2-entry-quirk; snps,dis_u3_susphy_quirk; - maximum-speed = "super-speed-plus"; + snps,force-gen1; + maximum-speed = "super-speed"; dr_mode = "host"; }; }; diff --git a/qcom/scuba-audio-overlay.dtsi b/qcom/scuba-audio-overlay.dtsi index e79914fc..bf3d39a4 100755 --- a/qcom/scuba-audio-overlay.dtsi +++ b/qcom/scuba-audio-overlay.dtsi @@ -209,7 +209,6 @@ qcom,msm-mbhc-hphl-swh = <1>; qcom,msm-mbhc-gnd-swh = <1>; qcom,cdc-dmic01-gpios = <&cdc_dmic01_gpios>; - qcom,cdc-dmic23-gpios = <&cdc_dmic23_gpios>; nvmem-cells = <&adsp_variant>; nvmem-cell-names = "adsp_variant"; @@ -229,6 +228,7 @@ clocks = <&wsa881x_analog_clk 0>; qcom,wsa-analog-clk-gpio = <&wsa881x_analog_clk_gpio>; qcom,wsa-analog-reset-gpio = <&wsa881x_analog_reset_gpio>; + qcom,wsa-analog-vi-gpio = <&cdc_dmic23_gpios>; qcom,wsa-prefix = "SpkrMono"; }; @@ -307,3 +307,33 @@ &va_cdc_dma_0_tx { qcom,msm-dai-is-island-supported = <1>; }; + +&lpi_tlmm { + cdc_dmic23_clk_active: dmic23_clk_active { + mux { + pins = "gpio8"; + function = "func1"; + }; + + config { + pins = "gpio8"; + drive-strength = <8>; + bias-disable; /* NO PULL */ + output-high; + }; + }; + + cdc_dmic23_clk_sleep: dmic23_clk_sleep { + mux { + pins = "gpio8"; + function = "gpio"; + }; + + config { + pins = "gpio8"; + drive-strength = <2>; + bias-pull-down; + input-enable; + }; + }; +}; diff --git a/qcom/scuba-qrd.dtsi b/qcom/scuba-qrd.dtsi index 54b8f25a..b06b5766 100755 --- a/qcom/scuba-qrd.dtsi +++ b/qcom/scuba-qrd.dtsi @@ -223,7 +223,74 @@ status = "ok"; }; +&tlmm { + key_vol_up { + key_vol_up_default: key_vol_up_default { + pins = "gpio96"; + function = "normal"; + input-enable; + bias-pull-up; + power-source = <0>; + }; + }; +}; + &soc { + gpio_keys { + compatible = "gpio-keys"; + label = "gpio-keys"; + + pinctrl-names = "default"; + pinctrl-0 = <&key_vol_up_default>; + + vol_up { + label = "volume_up"; + gpios = <&tlmm 96 GPIO_ACTIVE_LOW>; + linux,input-type = <1>; + linux,code = <KEY_VOLUMEUP>; + linux,can-disable; + debounce-interval = <15>; + gpio-key,wakeup; + }; + }; + + leds { + compatible = "gpio-leds"; + + wifi_led { + label = "wifi-led_yellow"; + gpios = <&tlmm 47 GPIO_ACTIVE_HIGH>; + default-state = "off"; + }; + + bt_led { + label = "bt-led_blue"; + gpios = <&tlmm 45 GPIO_ACTIVE_HIGH>; + default-state = "off"; + }; + + user_led0 { + label = "user-led0_green"; + gpios = <&tlmm 52 GPIO_ACTIVE_HIGH>; + default-state = "off"; + }; + }; + + pm2250_rg_leds: qcom,rg_leds { + compatible = "pwm-leds"; + user_led1 { + label = "user-led1_green"; + pwms = <&pm2250_pwm1 0 1000000>; + max-brightness = <255>; + }; + + user_led2 { + label = "user-led2_green"; + pwms = <&pm2250_pwm2 0 1000000>; + max-brightness = <255>; + }; + }; + clk40M: can_clock { compatible = "fixed-clock"; #clock-cells = <0>; @@ -241,6 +308,7 @@ interrupts = <39 0>; interrupt-names = "can_irq"; spi-max-frequency = <10000000>; + message-transmit-interval = <800>; gpio-controller; status = "okay"; }; @@ -303,14 +371,12 @@ pinctrl-names = "default"; pinctrl-0 = <&usb_id_interrupt>; + qcom,batteryless-platform; qcom,auto-recharge-soc = <98>; - qcom,suspend-input-on-debug-batt; - qcom,battery-data = <&scuba_batterydata>; io-channels = <&pm2250_vadc ADC5_USB_IN_V_16>, <&pm2250_vadc ADC5_CHG_TEMP>; io-channel-names = "usb_in_voltage", "chg_temp"; - qcom,thermal-mitigation = <2000000 1500000 1000000 500000>; }; &qusb_phy0 { diff --git a/qcom/sdxlemur-coresight.dtsi b/qcom/sdxlemur-coresight.dtsi index 60efffb4..f4ff5cd3 100755 --- a/qcom/sdxlemur-coresight.dtsi +++ b/qcom/sdxlemur-coresight.dtsi @@ -147,6 +147,7 @@ arm,buffer-size = <0x400000>; arm,scatter-gather; + qcom,sw-usb; qcom,qdss-ipa-support; ipa-conn-data-base-pa = <0x1468B000>; diff --git a/qcom/sm6150-audio-overlay.dtsi b/qcom/sm6150-audio-overlay.dtsi index 49ddb30e..fa5c8fb0 100755 --- a/qcom/sm6150-audio-overlay.dtsi +++ b/qcom/sm6150-audio-overlay.dtsi @@ -1,16 +1,32 @@ #include "sm6150-lpi.dtsi" +#include <dt-bindings/sound/qcom,bolero-clk-rsc.h> #include <dt-bindings/clock/qcom,audio-ext-clk.h> #include <dt-bindings/sound/audio-codec-port-types.h> #include <dt-bindings/interrupt-controller/arm-gic.h> &bolero { - qcom,num-macros = <0>; + qcom,num-macros = <4>; + #address-cells = <1>; + #size-cells = <1>; qcom,va-without-decimation; slew_rate_reg1 = <0x62B6F000 0x0>; slew_rate_reg2 = <0x62B6F004 0x0>; slew_rate_val1 = <0x3333 0x0>; slew_rate_val2 = <0xF 0x0>; + bolero-clk-rsc-mngr { + compatible = "qcom,bolero-clk-rsc-mngr"; + qcom,fs-gen-sequence = <0x3000 0x1 0x1>, <0x3004 0x3 0x3>, + <0x3004 0x3 0x1>, <0x3080 0x2 0x2>; + qcom,rx_mclk_mode_muxsel = <0x62c25020>; + clock-names = "tx_core_clk", "tx_npl_clk", "rx_core_clk", "rx_npl_clk", + "wsa_core_clk", "wsa_npl_clk", "va_core_clk"; + clocks = <&clock_audio_tx_1 0>, <&clock_audio_tx_2 0>, + <&clock_audio_rx_1 0>, <&clock_audio_rx_2 0>, + <&clock_audio_wsa_1 0>, <&clock_audio_wsa_2 0>, + <&clock_audio_va 0>; + }; + tx_macro: tx-macro@62ec0000 { compatible = "qcom,tx-macro"; reg = <0x62ec0000 0x0>; @@ -23,6 +39,9 @@ compatible = "qcom,swr-mstr"; #address-cells = <2>; #size-cells = <0>; + clock-names = "lpass_audio_hw_vote"; + clocks = <&lpass_audio_hw_vote 0>; + qcom,swr-master-version = <0x1050000>; qcom,swr_master_id = <3>; swrm-io-base = <0x62ed0000 0x0>; interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 623 IRQ_TYPE_LEVEL_HIGH>; @@ -40,9 +59,8 @@ qcom,swr-clock-stop-mode0 = <1>; qcom,swr-mstr-irq-wakeup-capable = <1>; wcd937x_tx_slave: wcd937x-tx-slave { - status = "disabled"; compatible = "qcom,wcd937x-slave"; - reg = <0x0 0x01170223>; + reg = <0xA 0x01170223>; }; }; }; @@ -56,10 +74,14 @@ qcom,rx-swr-gpios = <&rx_swr_gpios>; qcom,rx_mclk_mode_muxsel = <0x62c25020>; qcom,rx-bcl-pmic-params = /bits/ 8 <0x00 0x00 0x1E>; + qcom,default-clk-id = <TX_CORE_CLK>; swr1: rx_swr_master { compatible = "qcom,swr-mstr"; #address-cells = <2>; #size-cells = <0>; + clock-names = "lpass_audio_hw_vote"; + clocks = <&lpass_audio_hw_vote 0>; + qcom,swr-master-version = <0x1050000>; qcom,swr_master_id = <2>; swrm-io-base = <0x62ef0000 0x0>; interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; @@ -73,9 +95,8 @@ qcom,swr-num-dev = <1>; qcom,swr-clock-stop-mode0 = <1>; wcd937x_rx_slave: wcd937x-rx-slave { - status = "disabled"; compatible = "qcom,wcd937x-slave"; - reg = <0x0 0x01170224>; + reg = <0xA 0x01170224>; }; }; }; @@ -88,10 +109,14 @@ <&clock_audio_wsa_2 0>; qcom,wsa-swr-gpios = <&wsa_swr_gpios>; qcom,wsa-bcl-pmic-params = /bits/ 8 <0x00 0x00 0x1E>; + qcom,default-clk-id = <TX_CORE_CLK>; swr0: wsa_swr_master { compatible = "qcom,swr-mstr"; #address-cells = <2>; #size-cells = <0>; + clock-names = "lpass_audio_hw_vote"; + clocks = <&lpass_audio_hw_vote 0>; + qcom,swr-master-version = <0x1050000>; qcom,swr_master_id = <1>; swrm-io-base = <0x62f10000 0x0>; interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>; @@ -105,30 +130,34 @@ qcom,swr-num-dev = <2>; wsa881x_0211: wsa881x@20170211 { compatible = "qcom,wsa881x"; - reg = <0x0 0x20170211>; + reg = <0x10 0x20170211>; qcom,spkr-sd-n-node = <&wsa_spkr_en1>; qcom,bolero-handle = <&bolero>; + qcom,wsa-prefix = "SpkrLeft"; }; wsa881x_0212: wsa881x@20170212 { compatible = "qcom,wsa881x"; - reg = <0x0 0x20170212>; + reg = <0x10 0x20170212>; qcom,spkr-sd-n-node = <&wsa_spkr_en2>; qcom,bolero-handle = <&bolero>; + qcom,wsa-prefix = "SpkrRight"; }; wsa881x_0213: wsa881x@21170213 { compatible = "qcom,wsa881x"; - reg = <0x0 0x21170213>; + reg = <0x10 0x21170213>; qcom,spkr-sd-n-node = <&wsa_spkr_en1>; qcom,bolero-handle = <&bolero>; + qcom,wsa-prefix = "SpkrLeft"; }; wsa881x_0214: wsa881x@21170214 { compatible = "qcom,wsa881x"; - reg = <0x0 0x21170214>; + reg = <0x10 0x21170214>; qcom,spkr-sd-n-node = <&wsa_spkr_en2>; qcom,bolero-handle = <&bolero>; + qcom,wsa-prefix = "SpkrRight"; }; }; @@ -137,13 +166,16 @@ va_macro: va-macro@62f20000 { compatible = "qcom,va-macro"; reg = <0x62f20000 0x0>; - clock-names = "va_core_clk"; - clocks = <&clock_audio_va 0>; + clock-names = "lpass_audio_hw_vote"; + clocks = <&lpass_audio_hw_vote 0>; + qcom,default-clk-id = <TX_CORE_CLK>; + qcom,is-used-swr-gpio = <0>; }; wcd937x_codec: wcd937x-codec { - status = "disabled"; + status = "okay"; compatible = "qcom,wcd937x-codec"; + qcom,split-codec = <1>; qcom,rx_swr_ch_map = <0 HPH_L 0x1 0 HPH_L>, <0 HPH_R 0x2 0 HPH_R>, <1 CLSH 0x1 0 CLSH>, <2 COMP_L 0x1 0 COMP_L>, <2 COMP_R 0x2 0 COMP_R>, @@ -160,13 +192,13 @@ qcom,rx-slave = <&wcd937x_rx_slave>; qcom,tx-slave = <&wcd937x_tx_slave>; - cdc-vdd-ldo-rxtx-supply = <&L10A>; - qcom,cdc-vdd-ldo-rxtx-voltage = <1800000 1800000>; - qcom,cdc-vdd-ldo-rxtx-current = <25000>; + cdc-vdd-rxtx-supply = <&L10A>; + qcom,cdc-vdd-rxtx-voltage = <1800000 1800000>; + qcom,cdc-vdd-rxtx-current = <25000>; - cdc-vddpx-1-supply = <&L10A>; - qcom,cdc-vddpx-1-voltage = <1800000 1800000>; - qcom,cdc-vddpx-1-current = <10000>; + cdc-vddpx-supply = <&L10A>; + qcom,cdc-vddpx-voltage = <1800000 1800000>; + qcom,cdc-vddpx-current = <10000>; cdc-vdd-buck-supply = <&L15A>; qcom,cdc-vdd-buck-voltage = <1800000 1800000>; @@ -180,8 +212,8 @@ qcom,cdc-micbias2-mv = <1800>; qcom,cdc-micbias3-mv = <1800>; - qcom,cdc-static-supplies = "cdc-vdd-ldo-rxtx", - "cdc-vddpx-1", + qcom,cdc-static-supplies = "cdc-vdd-rxtx", + "cdc-vddpx", "cdc-vdd-mic-bias"; qcom,cdc-on-demand-supplies = "cdc-vdd-buck"; }; @@ -191,28 +223,19 @@ &sm6150_snd { qcom,model = "sm6150-idp-snd-card"; - qcom,msm-mi2s-master = <1>, <1>, <0>, <1>, <1>; - qcom,ext-disp-audio-rx = <1>; + qcom,msm-mi2s-master = <1>, <1>, <1>, <1>, <1>; + qcom,ext-disp-audio-rx = <0>; qcom,audio-routing = - "AMIC2", "MIC BIAS2", - "MIC BIAS2", "Analog Mic2", + "AMIC2", "Analog Mic2", + "Analog Mic2", "MIC BIAS2", + "TX DMIC0", "Digital Mic0", "TX DMIC0", "MIC BIAS1", - "MIC BIAS1", "Digital Mic0", + "TX DMIC1", "Digital Mic1", "TX DMIC1", "MIC BIAS1", - "MIC BIAS1", "Digital Mic1", + "TX DMIC2", "Digital Mic2", "TX DMIC2", "MIC BIAS3", - "MIC BIAS3", "Digital Mic2", + "TX DMIC3", "Digital Mic3", "TX DMIC3", "MIC BIAS3", - "MIC BIAS3", "Digital Mic3", - "TX_AIF1 CAP", "VA_MCLK", - "TX_AIF2 CAP", "VA_MCLK", - "RX AIF1 PB", "VA_MCLK", - "RX AIF2 PB", "VA_MCLK", - "RX AIF3 PB", "VA_MCLK", - "RX AIF4 PB", "VA_MCLK", - "HPHL_OUT", "VA_MCLK", - "HPHR_OUT", "VA_MCLK", - "AUX_OUT", "VA_MCLK", "IN1_HPHL", "HPHL_OUT", "IN2_HPHR", "HPHR_OUT", "IN3_AUX", "AUX_OUT", @@ -226,11 +249,19 @@ "RX_TX DEC2_INP", "TX DEC2 MUX", "RX_TX DEC3_INP", "TX DEC3 MUX", "SpkrLeft IN", "WSA_SPK1 OUT", - "SpkrRight IN", "WSA_SPK2 OUT", - "WSA_SPK1 OUT", "VA_MCLK", - "WSA_SPK2 OUT", "VA_MCLK"; - qcom,msm-mbhc-hphl-swh = <0>; - qcom,msm-mbhc-gnd-swh = <0>; + "SpkrRight IN", "WSA_SPK2 OUT"; + qcom,msm-mbhc-hphl-swh = <1>; + qcom,msm-mbhc-gnd-swh = <1>; + qcom,cdc-dmic01-gpios = <&cdc_dmic01_gpios>; + qcom,cdc-dmic23-gpios = <&cdc_dmic23_gpios>; + qcom,tert-mi2s-gpios = <&cdc_tert_mi2s_gpios>; + asoc-codec = <&stub_codec>, <&bolero>, + <&wcd937x_codec>, + <&wsa881x_0213>, <&wsa881x_0214>; + asoc-codec-names = "msm-stub-codec.1", "bolero_codec", + "wcd937x_codec", + "wsa-codec.3", "wsa-codec.4"; + qcom,wsa-max-devs = <2>; qcom,msm_audio_ssr_devs = <&audio_apr>, <&q6core>, <&lpi_tlmm>, <&bolero>; }; diff --git a/qcom/sm6150-audio.dtsi b/qcom/sm6150-audio.dtsi index 60c14fe2..9aad4a6c 100755 --- a/qcom/sm6150-audio.dtsi +++ b/qcom/sm6150-audio.dtsi @@ -28,8 +28,21 @@ &audio_apr { q6core: qcom,q6core-audio { compatible = "qcom,q6core-audio"; + #address-cells = <1>; + #size-cells = <1>; + lpass_audio_hw_vote: vote_lpass_audio_hw { + compatible = "qcom,audio-ref-clk"; + qcom,codec-ext-clk-src = <AUDIO_LPASS_AUDIO_HW_VOTE>; + #clock-cells = <1>; + }; + bolero: bolero-cdc { compatible = "qcom,bolero-codec"; + clock-names = "lpass_audio_hw_vote"; + clocks = <&lpass_audio_hw_vote 0>; + bolero-clk-rsc-mngr { + compatible = "qcom,bolero-clk-rsc-mngr"; + }; va_macro: va-macro@62f20000 { }; @@ -103,7 +116,10 @@ asoc-cpu-names = "msm-dai-q6-dp.24608", "msm-dai-q6-mi2s.0", "msm-dai-q6-mi2s.1", "msm-dai-q6-mi2s.2", "msm-dai-q6-mi2s.3", - "msm-dai-q6-mi2s.4", "msm-dai-q6-auxpcm.1", + "msm-dai-q6-mi2s.4", "msm-dai-q6-mi2s.5", + "msm-dai-q6-mi2s.6", "msm-dai-q6-mi2s.7", + "msm-dai-q6-mi2s.8", "msm-dai-q6-mi2s.9", + "msm-dai-q6-auxpcm.1", "msm-dai-q6-auxpcm.2", "msm-dai-q6-auxpcm.3", "msm-dai-q6-auxpcm.4", "msm-dai-q6-auxpcm.5", "msm-dai-q6-dev.224", diff --git a/qcom/sm6150-external-codec.dtsi b/qcom/sm6150-external-codec.dtsi index bd564b8a..f2af8775 100755 --- a/qcom/sm6150-external-codec.dtsi +++ b/qcom/sm6150-external-codec.dtsi @@ -25,11 +25,8 @@ &sm6150_snd { qcom,model = "sm6150-tavil-snd-card"; qcom,tavil_codec = <1>; - qcom,msm-mi2s-master = <1>, <1>, <0>, <1>, <1>; qcom,ext-disp-audio-rx = <0>; - qcom,mi2s-audio-intf = <0>; qcom,auxpcm-audio-intf = <0>; - qcom,wcn-btfm = <0>; qcom,audio-routing = "AIF4 VI", "MCLK", "RX_BIAS", "MCLK", @@ -117,6 +114,8 @@ asoc-codec-names = "msm-stub-codec.1", "msm-ext-disp-audio-codec-rx", "tavil_codec", "wsa-codec1", "wsa-codec2"; qcom,wsa-max-devs = <2>; + qcom,msm-mbhc-hphl-swh = <0>; + qcom,msm-mbhc-gnd-swh = <0>; qcom,msm_audio_ssr_devs = <&audio_apr>, <&wcd934x_cdc>, <&q6core>, <&lpi_tlmm>; }; diff --git a/qcom/sm6150-pmic-overlay.dtsi b/qcom/sm6150-pmic-overlay.dtsi index cc3ec84c..601ff25c 100755 --- a/qcom/sm6150-pmic-overlay.dtsi +++ b/qcom/sm6150-pmic-overlay.dtsi @@ -12,6 +12,13 @@ qcom,pre-scaling = <1 1>; }; + smb1390_therm { + reg = <ADC5_AMUX_THM3>; + label = "smb1390_therm"; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + }; + conn_therm { reg = <ADC5_AMUX_THM4_100K_PU>; label = "conn_therm"; diff --git a/qcom/sm6150-regulator.dtsi b/qcom/sm6150-regulator.dtsi index 716dac3c..9f3ca02c 100755 --- a/qcom/sm6150-regulator.dtsi +++ b/qcom/sm6150-regulator.dtsi @@ -37,13 +37,13 @@ rpmh-regulator-cxlvl { compatible = "qcom,rpmh-arc-regulator"; qcom,resource-name = "cx.lvl"; - pm6150_s1_level-parent-supply = <&VDD_MX_LEVEL>; - pm6150_s1_level_ao-parent-supply = <&VDD_MX_LEVEL_AO>; + proxy-supply = <&VDD_CX_LEVEL>; VDD_CX_LEVEL: S1A_LEVEL: pm6150_s1_level: regulator-pm6150-s1 { regulator-name = "pm6150_s1_level"; qcom,set = <RPMH_REGULATOR_SET_ALL>; + pm6150_s1_level-parent-supply = <&VDD_MX_LEVEL>; regulator-min-microvolt = <RPMH_REGULATOR_LEVEL_RETENTION>; regulator-max-microvolt = @@ -57,6 +57,7 @@ S1A_LEVEL_AO: pm6150_s1_level_ao: regulator-pm6150-s1-level-ao { qcom,set = <RPMH_REGULATOR_SET_ACTIVE>; regulator-name = "pm6150_s1_level_ao"; + vin-supply = <&VDD_MX_LEVEL_AO>; regulator-min-microvolt = <RPMH_REGULATOR_LEVEL_RETENTION>; regulator-max-microvolt = diff --git a/qcom/sm6150.dtsi b/qcom/sm6150.dtsi index c6b775a0..12612527 100755 --- a/qcom/sm6150.dtsi +++ b/qcom/sm6150.dtsi @@ -11,6 +11,7 @@ #include <dt-bindings/interconnect/qcom,icc.h> #include <dt-bindings/interconnect/qcom,osm-l3.h> #include <dt-bindings/interconnect/qcom,sm6150.h> +#include <dt-bindings/soc/qcom,dcc_v2.h> #include <dt-bindings/soc/qcom,rpmh-rsc.h> #include <dt-bindings/regulator/qcom,rpmh-regulator-levels.h> @@ -29,9 +30,15 @@ #address-cells = <2>; #size-cells = <2>; + + chosen { + bootargs = "log_buf_len=2M earlycon=msm_geni_serial,0x880000 rcupdate.rcu_expedited=1 rcu_nocbs=0-7 kpti=off"; + }; + memory { device_type = "memory"; reg = <0 0 0 0>; }; + reserved_memory: reserved-memory { }; - aliases { + aliases: aliases { ufshc1 = &ufshc_mem; /* Embedded UFS slot */ serial0 = &qupv3_se0_2uart; sdhc0 = &sdhc_1; @@ -41,6 +48,8 @@ hsuart1 = &qupv3_se4_2uart; }; + firmware: firmware {}; + cpus { #address-cells = <2>; #size-cells = <0>; @@ -254,17 +263,10 @@ }; }; - psci { - compatible = "arm,psci-1.0"; - method = "smc"; - }; - - chosen { - }; - soc: soc { }; +}; - firmware: firmware { + &firmware { android { compatible = "android,firmware"; vbmeta { @@ -286,7 +288,7 @@ }; }; - reserved_memory: reserved-memory { + &reserved_memory { #address-cells = <2>; #size-cells = <2>; ranges; @@ -459,21 +461,73 @@ }; }; - qcom-secure-buffer { - compatible = "qcom,secure-buffer"; - }; - -}; - -#include "display/sm6150-sde-pll.dtsi" -#include "display/sm6150-sde.dtsi" - &soc { #address-cells = <1>; #size-cells = <1>; ranges = <0 0 0 0xffffffff>; compatible = "simple-bus"; + psci { + compatible = "arm,psci-1.0"; + method = "smc"; + }; + + apps_rsc: rsc@18200000 { + label = "apps_rsc"; + compatible = "qcom,rpmh-rsc"; + reg = <0x18200000 0x10000>, + <0x18210000 0x10000>, + <0x18220000 0x10000>; + reg-names = "drv-0", "drv-1", "drv-2"; + interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; + qcom,tcs-offset = <0xd00>; + qcom,drv-id = <2>; + qcom,tcs-config = <ACTIVE_TCS 2>, + <SLEEP_TCS 3>, + <WAKE_TCS 3>, + <CONTROL_TCS 1>; + + apps_bcm_voter: bcm_voter { + compatible = "qcom,bcm-voter"; + }; + + rpmhcc: qcom,rpmhclk { + compatible = "qcom,sm6150-rpmh-clk"; + #clock-cells = <1>; + status = "okay"; + }; + + system_pm { + compatible = "qcom,system-pm"; + }; + }; + + disp_rsc: rsc@af20000 { + label = "disp_rsc"; + compatible = "qcom,rpmh-rsc"; + reg = <0xaf20000 0x10000>; + reg-names = "drv-0"; + interrupts = <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>; + qcom,tcs-offset = <0x1c00>; + qcom,drv-id = <0>; + qcom,tcs-config = <SLEEP_TCS 1>, + <WAKE_TCS 1>, + <ACTIVE_TCS 2>, + <CONTROL_TCS 0>; + + disp_bcm_voter: bcm_voter { + compatible = "qcom,bcm-voter"; + qcom,tcs-wait = <QCOM_ICC_TAG_AMC>; + }; + + sde_rsc_rpmh { + compatible = "qcom,sde-rsc-rpmh"; + cell-index = <0>; + }; + }; + intc: interrupt-controller@17a00000 { compatible = "arm,gic-v3"; #interrupt-cells = <3>; @@ -486,6 +540,43 @@ interrupt-parent = <&intc>; }; + pdc: interrupt-controller@b220000 { + compatible = "qcom,sm6150-pdc"; + reg = <0xb220000 0x30000>, <0x17c000f0 0x60>; + qcom,pdc-ranges = <0 480 94>, <94 609 31>, <125 63 1>; + #interrupt-cells = <2>; + interrupt-parent = <&intc>; + interrupt-controller; + }; + + spmi_bus: qcom,spmi@c440000 { + compatible = "qcom,spmi-pmic-arb"; + reg = <0xc440000 0x1100>, + <0xc600000 0x2000000>, + <0xe600000 0x100000>, + <0xe700000 0xa0000>, + <0xc40a000 0x26000>; + reg-names = "core", "chnls", "obsrvr", "intr", "cnfg"; + interrupts-extended = <&pdc 1 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "periph_irq"; + interrupt-controller; + #interrupt-cells = <4>; + #address-cells = <2>; + #size-cells = <0>; + cell-index = <0>; + qcom,channel = <0>; + qcom,ee = <0>; + }; + + dcc: dcc_v2@010a2000 { + compatible = "qcom,dcc-v2"; + reg = <0x10a2000 0x1000>, + <0x10ae000 0x2000>; + reg-names = "dcc-base", "dcc-ram-base"; + + dcc-ram-offset = <0x6000>; + }; + timer { compatible = "arm,armv8-timer"; interrupts = <1 1 0xf08>, @@ -810,15 +901,6 @@ }; }; - pdc: interrupt-controller@b220000 { - compatible = "qcom,sm6150-pdc"; - reg = <0xb220000 0x30000>, <0x17c000f0 0x60>; - qcom,pdc-ranges = <0 480 94>, <94 609 31>, <125 63 1>; - #interrupt-cells = <2>; - interrupt-parent = <&intc>; - interrupt-controller; - }; - clocks { xo_board: xo_board { compatible = "fixed-clock"; @@ -1193,62 +1275,6 @@ }; }; - apps_rsc: rsc@18200000 { - label = "apps_rsc"; - compatible = "qcom,rpmh-rsc"; - reg = <0x18200000 0x10000>, - <0x18210000 0x10000>, - <0x18220000 0x10000>; - reg-names = "drv-0", "drv-1", "drv-2"; - interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; - qcom,tcs-offset = <0xd00>; - qcom,drv-id = <2>; - qcom,tcs-config = <ACTIVE_TCS 2>, - <SLEEP_TCS 3>, - <WAKE_TCS 3>, - <CONTROL_TCS 1>; - - apps_bcm_voter: bcm_voter { - compatible = "qcom,bcm-voter"; - }; - - rpmhcc: qcom,rpmhclk { - compatible = "qcom,sm6150-rpmh-clk"; - #clock-cells = <1>; - status = "okay"; - }; - - system_pm { - compatible = "qcom,system-pm"; - }; - }; - - disp_rsc: rsc@af20000 { - label = "disp_rsc"; - compatible = "qcom,rpmh-rsc"; - reg = <0xaf20000 0x10000>; - reg-names = "drv-0"; - interrupts = <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>; - qcom,tcs-offset = <0x1c00>; - qcom,drv-id = <0>; - qcom,tcs-config = <SLEEP_TCS 1>, - <WAKE_TCS 1>, - <ACTIVE_TCS 2>, - <CONTROL_TCS 0>; - - disp_bcm_voter: bcm_voter { - compatible = "qcom,bcm-voter"; - qcom,tcs-wait = <QCOM_ICC_TAG_AMC>; - }; - - sde_rsc_rpmh { - compatible = "qcom,sde-rsc-rpmh"; - cell-index = <0>; - }; - }; - camnoc_virt: interconnect@0 { compatible = "qcom,sm6150-camnoc_virt"; #interconnect-cells = <1>; @@ -1531,25 +1557,6 @@ #interconnect-cells = <1>; }; - spmi_bus: qcom,spmi@c440000 { - compatible = "qcom,spmi-pmic-arb"; - reg = <0xc440000 0x1100>, - <0xc600000 0x2000000>, - <0xe600000 0x100000>, - <0xe700000 0xa0000>, - <0xc40a000 0x26000>; - reg-names = "core", "chnls", "obsrvr", "intr", "cnfg"; - interrupts-extended = <&pdc 1 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "periph_irq"; - interrupt-controller; - #interrupt-cells = <4>; - #address-cells = <2>; - #size-cells = <0>; - cell-index = <0>; - qcom,channel = <0>; - qcom,ee = <0>; - }; - thermal_zones: thermal-zones { }; @@ -2374,6 +2381,10 @@ reg-names = "secapp-region"; }; + qcom-secure-buffer { + compatible = "qcom,secure-buffer"; + }; + qcom_rng: qrng@793000 { compatible = "qcom,msm-rng"; reg = <0x793000 0x1000>; @@ -2595,18 +2606,23 @@ }; }; -&firmware { - scm { - compatible = "qcom,scm"; - }; -}; - +#include "sm6150-regulator.dtsi" +#include "sm6150-gdsc.dtsi" +#include "sm6150-thermal.dtsi" +#include "sm6150-pinctrl.dtsi" #include "sm6150-qupv3.dtsi" +#include "sm6150-slpi-pinctrl.dtsi" #include "sm6150-ssc-qupv3.dtsi" -#include "sm6150-pinctrl.dtsi" +#include "sm6150-ion.dtsi" +#include "msm-arm-smmu-sm6150.dtsi" #include "sm6150-pm.dtsi" -#include "sm6150-regulator.dtsi" -#include "sm6150-gdsc.dtsi" +#include "sm6150-coresight.dtsi" +#include "sm6150-usb.dtsi" +#include "sm6150-gpu.dtsi" +#include "sm6150-vidc.dtsi" +#include "display/sm6150-sde-pll.dtsi" +#include "display/sm6150-sde.dtsi" +#include "camera/sm6150-camera.dtsi" &firmware { scm { @@ -2706,13 +2722,3 @@ &venus_gdsc { status = "ok"; }; - -#include "msm-arm-smmu-sm6150.dtsi" -#include "sm6150-slpi-pinctrl.dtsi" -#include "sm6150-gpu.dtsi" -#include "sm6150-usb.dtsi" -#include "sm6150-vidc.dtsi" -#include "sm6150-ion.dtsi" -#include "sm6150-thermal.dtsi" -#include "camera/sm6150-camera.dtsi" -#include "sm6150-coresight.dtsi" |